From 615a1ff234c111e2156f096ecaf3ff80ee0bb835 Mon Sep 17 00:00:00 2001
From: lha <lha@NetBSD.org>
Date: Fri, 3 Jan 2003 19:01:09 +0000
Subject: [PATCH] From freebsd if_vr.c:1.43,1.56 and if_vrreg.h:1.11,1.14

- Windows put the chip in suspended mode, make sure we unsuspend
  it. 1.43, by Takefumi SAYO <stake@po.shiojiri.ne.jp>

- Detect the revision of the Rhine chip we're using, and force reset
  when the chip supports it. 1.65, by silby@freebsd.org
---
 sys/dev/pci/if_vr.c    | 30 +++++++++++++++++++++++++-----
 sys/dev/pci/if_vrreg.h | 29 ++++++++++++++++++++++++++++-
 2 files changed, 53 insertions(+), 6 deletions(-)

diff --git a/sys/dev/pci/if_vr.c b/sys/dev/pci/if_vr.c
index 82bd277cd90e..516342099a20 100644
--- a/sys/dev/pci/if_vr.c
+++ b/sys/dev/pci/if_vr.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_vr.c,v 1.58 2002/10/21 23:38:12 fair Exp $	*/
+/*	$NetBSD: if_vr.c,v 1.59 2003/01/03 19:01:09 lha Exp $	*/
 
 /*-
  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
@@ -104,7 +104,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_vr.c,v 1.58 2002/10/21 23:38:12 fair Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_vr.c,v 1.59 2003/01/03 19:01:09 lha Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -213,6 +213,8 @@ struct vr_softc {
 	u_int8_t 		vr_enaddr[ETHER_ADDR_LEN];
 	struct mii_data		vr_mii;		/* MII/media info */
 
+	u_int8_t		vr_revid;	/* Rhine chip revision */
+
 	struct callout		vr_tick_ch;	/* tick callout */
 
 	bus_dmamap_t		vr_cddmamap;	/* control data DMA map */
@@ -504,9 +506,17 @@ vr_reset(sc)
 		if (!(CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RESET))
 			break;
 	}
-	if (i == VR_TIMEOUT)
-		printf("%s: reset never completed!\n",
-			sc->vr_dev.dv_xname);
+	if (i == VR_TIMEOUT) {
+		if (sc->vr_revid < REV_ID_VT3065_A) {
+			printf("%s: reset never completed!\n",
+			    sc->vr_dev.dv_xname);
+		} else {
+			/* Use newer force reset command */
+			printf("%s: using force reset command.\n",
+			    sc->vr_dev.dv_xname);
+			VR_SETBIT(sc, VR_MISC_CR1, VR_MISCCR1_FORSRST);
+		}
+	}			
 
 	/* Wait a little while for the chip to get its brains in order. */
 	DELAY(1000);
@@ -1453,6 +1463,9 @@ vr_attach(parent, self, aux)
 	command |= PCI_COMMAND_MASTER_ENABLE;
 	PCI_CONF_WRITE(PCI_COMMAND_STATUS_REG, command);
 
+	/* Get revision */
+	sc->vr_revid = PCI_CONF_READ(VR_PCI_REVID) & 0x000000FF;
+	
 	/*
 	 * Map control/status registers.
 	 */
@@ -1512,6 +1525,13 @@ vr_attach(parent, self, aux)
 			sc->vr_dev.dv_xname, intrstr);
 	}
 
+	/*
+	 * Windows may put the chip in suspend mode when it
+	 * shuts down. Be sure to kick it in the head to wake it
+	 * up again.
+	 */
+	VR_CLRBIT(sc, VR_STICKHW, (VR_STICKHW_DS0|VR_STICKHW_DS1));
+
 	/* Reset the adapter. */
 	vr_reset(sc);
 
diff --git a/sys/dev/pci/if_vrreg.h b/sys/dev/pci/if_vrreg.h
index f0ad54a0eb09..ead517414a19 100644
--- a/sys/dev/pci/if_vrreg.h
+++ b/sys/dev/pci/if_vrreg.h
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_vrreg.h,v 1.9 1999/02/12 00:37:07 thorpej Exp $	*/
+/*	$NetBSD: if_vrreg.h,v 1.10 2003/01/03 19:01:09 lha Exp $	*/
 
 /*
  * Copyright (c) 1997, 1998
@@ -81,6 +81,11 @@
 #define	VR_CONFIG		0x78
 #define	VR_MPA_CNT		0x7C
 #define	VR_CRC_CNT		0x7E
+#define VR_STICKHW		0x83
+
+/* Misc Registers */
+#define VR_MISC_CR1		0x81
+#define VR_MISCCR1_FORSRST	0x40
 
 /*
  * RX config bits.
@@ -271,6 +276,13 @@
 #define	VR_CFG_DIAG		0x40000000
 #define	VR_CFG_GPIOEN		0x80000000
 
+/* Sticky HW bits */
+#define VR_STICKHW_DS0		0x01
+#define VR_STICKHW_DS1		0x02
+#define VR_STICKHW_WOL_ENB	0x04
+#define VR_STICKHW_WOL_STS	0x08
+#define VR_STICKHW_LEGWOL_ENB	0x80
+
 /*
  * Rhine TX/RX list structure.
  */
@@ -334,6 +346,20 @@ struct vr_desc {
 
 #define	VR_MIN_FRAMELEN		60
 
+/*
+ * VIA Rhine revision IDs
+ */
+
+#define REV_ID_VT3043_E			0x04
+#define REV_ID_VT3071_A			0x20
+#define REV_ID_VT3071_B			0x21
+#define REV_ID_VT3065_A			0x40
+#define REV_ID_VT3065_B			0x41
+#define REV_ID_VT3065_C			0x42
+#define REV_ID_VT3106			0x80
+#define REV_ID_VT3106_J			0x80    /* 0x80-0x8F */
+#define REV_ID_VT3106_S			0x90    /* 0x90-0xA0 */
+
 /*
  * PCI low memory base and low I/O base register, and
  * other PCI registers.
@@ -343,6 +369,7 @@ struct vr_desc {
 #define	VR_PCI_DEVICE_ID	0x02
 #define	VR_PCI_COMMAND		0x04
 #define	VR_PCI_STATUS		0x06
+#define VR_PCI_REVID		0x08
 #define	VR_PCI_CLASSCODE	0x09
 #define	VR_PCI_LATENCY_TIMER	0x0D
 #define	VR_PCI_HEADER_TYPE	0x0E