Second part of PR/46998. The following is taken from the PR with a slight
edit from me. The TX buffer size is not a function of the SEEQ chip, it is an arbitrary driver threshold, so I've renamed the define accordingly and added a new one to specify how many buffers are used (in my port I allow multiple packets to be in flight at once, so have used #ifndef, such that the makefile can override). Comment corrected, and make use of the above defines. Missing delay(1) added, otherwise the 20,000 timeout loop is dependent on the speed of your processor. Matches ea_stoptx logic now. The FIFO empty check does nothing if the previous mode was 'read', but is required before changing the BUFCODE (per 80C04 datasheet page 19, note [2]). Then the mode is set to write, so a second FIFO empty check is needed incase the previous mode was read. Treat m0 as a pointer not an integer. Remove double write of the NULL packet header. Either do memset/ea_writebuf or two writes to SEEQ_BUFWIN, but not both. The calculation of nextpacket (for hdr[]) assumes bufstart = 0, and puts the packet header pointing in the wrong place when it isn't. The setting of CFG2_OUTPUT is done in ea_init(), so doing it in ea_rxinit is duplicated code.
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0fe66f4512
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5c95220e86
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@ -1,4 +1,4 @@
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/* $NetBSD: seeq8005.c,v 1.50 2012/10/10 22:17:44 skrll Exp $ */
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/* $NetBSD: seeq8005.c,v 1.51 2012/10/10 22:40:33 skrll Exp $ */
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/*
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* Copyright (c) 2000, 2001 Ben Harris
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@ -61,7 +61,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: seeq8005.c,v 1.50 2012/10/10 22:17:44 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: seeq8005.c,v 1.51 2012/10/10 22:40:33 skrll Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -106,7 +106,12 @@ int seeq8005_debug = 0;
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#define DPRINTF(f, x)
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#endif
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#define SEEQ_TX_BUFFER_SIZE 0x800 /* (> ETHER_MAX_LEN) */
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#ifndef EA_TX_BUFFER_SIZE
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#define EA_TX_BUFFER_SIZE 0x800 /* (> ETHER_MAX_LEN) */
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#endif
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#ifndef EA_TX_BUFFER_COUNT
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#define EA_TX_BUFFER_COUNT 1 /* (> 0) */
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#endif
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#define SEEQ_READ16(sc, iot, ioh, reg) \
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((sc)->sc_flags & SF_8BIT ? \
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@ -225,12 +230,11 @@ seeq8005_attach(struct seeq8005_softc *sc, const u_int8_t *myaddr, int *media,
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/*
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* Set up tx and rx buffers.
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*
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* We use approximately a quarter of the packet memory for TX
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* We set aside EA_TX_BUFFER_SIZE * EA_TX_BUFFER_COUNT for TX
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* buffers and the rest for RX buffers
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*/
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/* sc->sc_tx_bufs = sc->sc_buffersize / SEEQ_TX_BUFFER_SIZE / 4; */
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sc->sc_tx_bufs = 1;
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sc->sc_tx_bufsize = sc->sc_tx_bufs * SEEQ_TX_BUFFER_SIZE;
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sc->sc_tx_bufs = EA_TX_BUFFER_COUNT;
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sc->sc_tx_bufsize = sc->sc_tx_bufs * EA_TX_BUFFER_SIZE;
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sc->sc_rx_bufsize = sc->sc_buffersize - sc->sc_tx_bufsize;
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sc->sc_enabled = 0;
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@ -443,6 +447,7 @@ ea_stoprx(struct seeq8005_softc *sc)
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timeout = 20000;
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do {
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status = SEEQ_READ16(sc, iot, ioh, SEEQ_STATUS);
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delay(1);
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} while ((status & SEEQ_STATUS_RX_ON) && --timeout > 0);
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if (timeout == 0)
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log(LOG_ERR, "%s: timeout waiting for rx termination\n",
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@ -604,6 +609,9 @@ ea_writebuf(struct seeq8005_softc *sc, u_char *buf, int addr, size_t len)
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ea_select_buffer(sc, SEEQ_BUFCODE_LOCAL_MEM);
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SEEQ_WRITE16(sc, iot, ioh, SEEQ_COMMAND,
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sc->sc_command | SEEQ_CMD_FIFO_WRITE);
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ea_await_fifo_empty(sc);
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SEEQ_WRITE16(sc, iot, ioh, SEEQ_DMA_ADDR, addr);
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}
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@ -901,7 +909,7 @@ ea_txpacket(struct seeq8005_softc *sc)
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IFQ_DEQUEUE(&ifp->if_snd, m0);
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/* If there's nothing to send, return. */
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if (!m0) {
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if (m0 == NULL) {
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ifp->if_flags &= ~IFF_OACTIVE;
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sc->sc_config2 |= SEEQ_CFG2_OUTPUT;
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SEEQ_WRITE16(sc, iot, ioh, SEEQ_CONFIG2, sc->sc_config2);
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@ -968,20 +976,18 @@ ea_writembuf(struct seeq8005_softc *sc, struct mbuf *m0, int bufstart)
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/* Follow it with a NULL packet header */
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memset(hdr, 0, 4);
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ea_writebuf(sc, hdr, bufstart + 4 + len, 4);
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SEEQ_WRITE16(sc, sc->sc_iot, sc->sc_ioh, SEEQ_BUFWIN, 0x0000);
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SEEQ_WRITE16(sc, sc->sc_iot, sc->sc_ioh, SEEQ_BUFWIN, 0x0000);
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/* Ok we now have a packet len bytes long in our packet buffer */
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DPRINTF(SEEQ_DEBUG_TX, ("ea_writembuf: length=%d\n", len));
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/* Write the packet header */
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nextpacket = len + 4;
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nextpacket = bufstart + len + 4;
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hdr[0] = (nextpacket >> 8) & 0xff;
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hdr[1] = nextpacket & 0xff;
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hdr[2] = SEEQ_PKTCMD_TX | SEEQ_PKTCMD_DATA_FOLLOWS |
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SEEQ_TXCMD_XMIT_SUCCESS_INT | SEEQ_TXCMD_COLLISION_INT;
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hdr[3] = 0; /* Status byte -- will be updated by hardware. */
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ea_writebuf(sc, hdr, 0x0000, 4);
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ea_writebuf(sc, hdr, bufstart, 4);
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return len;
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}
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@ -1195,9 +1201,6 @@ ea_rxint(struct seeq8005_softc *sc)
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log(LOG_ERR,
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"%s: rx packet size error at %04x (len=%d)\n",
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device_xname(sc->sc_dev), addr, len);
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sc->sc_config2 |= SEEQ_CFG2_OUTPUT;
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SEEQ_WRITE16(sc, iot, ioh, SEEQ_CONFIG2,
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sc->sc_config2);
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ea_init(ifp);
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return;
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}
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