edit from me.
The TX buffer size is not a function of the SEEQ chip, it is an arbitrary
driver threshold, so I've renamed the define accordingly and added a new
one to specify how many buffers are used (in my port I allow multiple
packets to be in flight at once, so have used #ifndef, such that the
makefile can override).
Comment corrected, and make use of the above defines.
Missing delay(1) added, otherwise the 20,000 timeout loop is dependent
on the speed of your processor. Matches ea_stoptx logic now.
The FIFO empty check does nothing if the previous mode was 'read', but is
required before changing the BUFCODE (per 80C04 datasheet page 19,
note [2]). Then the mode is set to write, so a second FIFO empty check is
needed incase the previous mode was read.
Treat m0 as a pointer not an integer.
Remove double write of the NULL packet header. Either do
memset/ea_writebuf or two writes to SEEQ_BUFWIN, but not both.
The calculation of nextpacket (for hdr[]) assumes bufstart = 0, and puts
the packet header pointing in the wrong place when it isn't.
The setting of CFG2_OUTPUT is done in ea_init(), so doing it in ea_rxinit
is duplicated code.
5c95220e86