Get the physical memory layout from the /memory node instead of reading
from the memory controller registers.
This commit is contained in:
jmcneill
parent
74e0d90157
commit
47bf9afcdc
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@ -1,4 +1,4 @@
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/* $NetBSD: tegra_mc.c,v 1.6 2017/04/12 00:39:28 jmcneill Exp $ */
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/* $NetBSD: tegra_mc.c,v 1.7 2017/04/21 21:13:04 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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@ -29,7 +29,7 @@
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#include "locators.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: tegra_mc.c,v 1.6 2017/04/12 00:39:28 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: tegra_mc.c,v 1.7 2017/04/21 21:13:04 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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@ -145,24 +145,3 @@ tegra_mc_intr(void *v)
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return status;
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}
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psize_t
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tegra_mc_memsize(void)
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{
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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if (mc_softc) {
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bst = mc_softc->sc_bst;
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bsh = mc_softc->sc_bsh;
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} else {
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bst = &armv7_generic_bs_tag;
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bus_space_subregion(bst, tegra_apb_bsh,
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TEGRA_MC_OFFSET, TEGRA_MC_SIZE, &bsh);
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}
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const uint32_t emem_cfg = bus_space_read_4(bst, bsh, MC_EMEM_CFG_0_REG);
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const psize_t nmb = __SHIFTOUT(emem_cfg, MC_EMEM_CFG_0_EMEM_SIZE_MB);
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return nmb * 1024 * 1024;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: tegra_reg.h,v 1.21 2016/03/26 09:07:31 skrll Exp $ */
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/* $NetBSD: tegra_reg.h,v 1.22 2017/04/21 21:13:04 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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@ -31,8 +31,6 @@
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#define CONSADDR_VA (CONSADDR - TEGRA_APB_BASE + TEGRA_APB_VBASE)
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#define TEGRA_EXTMEM_BASE 0x80000000
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#define TEGRA_PCIE_OFFSET 0x01000000
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#define TEGRA_PCIE_SIZE 0x3f000000
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#define TEGRA_PCIE_RPCONF_BASE 0x01000000
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@ -1,4 +1,4 @@
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/* $NetBSD: tegra_var.h,v 1.31 2017/04/14 00:19:34 jmcneill Exp $ */
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/* $NetBSD: tegra_var.h,v 1.32 2017/04/21 21:13:04 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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@ -85,8 +85,6 @@ void tegra_pmc_power(u_int, bool);
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void tegra_pmc_remove_clamping(u_int);
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void tegra_pmc_hdmi_enable(void);
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psize_t tegra_mc_memsize(void);
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uint32_t tegra_fuse_read(u_int);
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void tegra_xusbpad_sata_enable(void);
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@ -1,4 +1,4 @@
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/* $NetBSD: tegra_machdep.c,v 1.38 2016/03/26 09:07:31 skrll Exp $ */
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/* $NetBSD: tegra_machdep.c,v 1.39 2017/04/21 21:13:04 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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@ -27,7 +27,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: tegra_machdep.c,v 1.38 2016/03/26 09:07:31 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: tegra_machdep.c,v 1.39 2017/04/21 21:13:04 jmcneill Exp $");
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#include "opt_tegra.h"
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#include "opt_machdep.h"
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@ -157,7 +157,6 @@ static const struct pmap_devmap devmap[] = {
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#ifdef PMAP_NEED_ALLOC_POOLPAGE
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static struct boot_physmem bp_lowgig = {
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.bp_start = TEGRA_EXTMEM_BASE / NBPG,
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.bp_pages = (KERNEL_VM_BASE - KERNEL_BASE) / NBPG,
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.bp_freelist = VM_FREELIST_ISADMA,
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.bp_flags = 0
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@ -232,6 +231,8 @@ extern void cortex_mpstart(void);
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u_int
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initarm(void *arg)
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{
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bus_addr_t memory_addr;
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bus_size_t memory_size;
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psize_t ram_size = 0;
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DPRINT("initarm:");
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@ -305,7 +306,15 @@ initarm(void *arg)
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DPRINTF("KERNEL_BASE=0x%x, KERNEL_VM_BASE=0x%x, KERNEL_VM_BASE - KERNEL_BASE=0x%x, KERNEL_BASE_VOFFSET=0x%x\n",
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KERNEL_BASE, KERNEL_VM_BASE, KERNEL_VM_BASE - KERNEL_BASE, KERNEL_BASE_VOFFSET);
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ram_size = tegra_mc_memsize();
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const int memory = OF_finddevice("/memory");
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if (fdtbus_get_reg(memory, 0, &memory_addr, &memory_size) != 0)
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panic("Cannot determine memory size");
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DPRINTF("FDT memory node = %d, addr %llx, size %llu\n",
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memory, (unsigned long long)memory_addr,
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(unsigned long long)memory_size);
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ram_size = memory_size;
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#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
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const bool mapallmem_p = true;
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@ -338,7 +347,7 @@ initarm(void *arg)
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/* Fake bootconfig structure for the benefit of pmap.c. */
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bootconfig.dramblocks = 1;
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bootconfig.dram[0].address = TEGRA_EXTMEM_BASE; /* DDR PHY addr */
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bootconfig.dram[0].address = memory_addr;
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bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
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KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
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@ -361,6 +370,7 @@ initarm(void *arg)
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evbarm_device_register = tegra_device_register;
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#ifdef PMAP_NEED_ALLOC_POOLPAGE
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bp_lowgig.bp_start = memory_addr / NBPG;
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if (atop(ram_size) > bp_lowgig.bp_pages) {
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arm_poolpage_vmfreelist = bp_lowgig.bp_freelist;
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return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE,
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