diff --git a/sys/arch/arm/nvidia/tegra_mc.c b/sys/arch/arm/nvidia/tegra_mc.c
index e035edc554a0..fe94d2f793e1 100644
--- a/sys/arch/arm/nvidia/tegra_mc.c
+++ b/sys/arch/arm/nvidia/tegra_mc.c
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_mc.c,v 1.6 2017/04/12 00:39:28 jmcneill Exp $ */
+/* $NetBSD: tegra_mc.c,v 1.7 2017/04/21 21:13:04 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
@@ -29,7 +29,7 @@
 #include "locators.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_mc.c,v 1.6 2017/04/12 00:39:28 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_mc.c,v 1.7 2017/04/21 21:13:04 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -145,24 +145,3 @@ tegra_mc_intr(void *v)
 
 	return status;
 }
-
-psize_t
-tegra_mc_memsize(void)
-{
-	bus_space_tag_t bst;
-	bus_space_handle_t bsh;
-
-	if (mc_softc) {
-		bst = mc_softc->sc_bst;
-		bsh = mc_softc->sc_bsh;
-	} else {
-		bst = &armv7_generic_bs_tag;
-		bus_space_subregion(bst, tegra_apb_bsh,
-		    TEGRA_MC_OFFSET, TEGRA_MC_SIZE, &bsh);
-	}
-
-	const uint32_t emem_cfg = bus_space_read_4(bst, bsh, MC_EMEM_CFG_0_REG);
-	const psize_t nmb = __SHIFTOUT(emem_cfg, MC_EMEM_CFG_0_EMEM_SIZE_MB);
-
-	return nmb * 1024 * 1024;
-}
diff --git a/sys/arch/arm/nvidia/tegra_reg.h b/sys/arch/arm/nvidia/tegra_reg.h
index 465e6ca51cfe..c2936fb1627d 100644
--- a/sys/arch/arm/nvidia/tegra_reg.h
+++ b/sys/arch/arm/nvidia/tegra_reg.h
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_reg.h,v 1.21 2016/03/26 09:07:31 skrll Exp $ */
+/* $NetBSD: tegra_reg.h,v 1.22 2017/04/21 21:13:04 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
@@ -31,8 +31,6 @@
 
 #define CONSADDR_VA	(CONSADDR - TEGRA_APB_BASE + TEGRA_APB_VBASE)
 
-#define TEGRA_EXTMEM_BASE	0x80000000
-
 #define TEGRA_PCIE_OFFSET	0x01000000
 #define TEGRA_PCIE_SIZE		0x3f000000
 #define TEGRA_PCIE_RPCONF_BASE	0x01000000
diff --git a/sys/arch/arm/nvidia/tegra_var.h b/sys/arch/arm/nvidia/tegra_var.h
index e306cff23133..a6c5c15c7279 100644
--- a/sys/arch/arm/nvidia/tegra_var.h
+++ b/sys/arch/arm/nvidia/tegra_var.h
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_var.h,v 1.31 2017/04/14 00:19:34 jmcneill Exp $ */
+/* $NetBSD: tegra_var.h,v 1.32 2017/04/21 21:13:04 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
@@ -85,8 +85,6 @@ void	tegra_pmc_power(u_int, bool);
 void	tegra_pmc_remove_clamping(u_int);
 void	tegra_pmc_hdmi_enable(void);
 
-psize_t	tegra_mc_memsize(void);
-
 uint32_t tegra_fuse_read(u_int);
 
 void	tegra_xusbpad_sata_enable(void);
diff --git a/sys/arch/evbarm/tegra/tegra_machdep.c b/sys/arch/evbarm/tegra/tegra_machdep.c
index 4fd32da128ef..725d12a234fe 100644
--- a/sys/arch/evbarm/tegra/tegra_machdep.c
+++ b/sys/arch/evbarm/tegra/tegra_machdep.c
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_machdep.c,v 1.38 2016/03/26 09:07:31 skrll Exp $ */
+/* $NetBSD: tegra_machdep.c,v 1.39 2017/04/21 21:13:04 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_machdep.c,v 1.38 2016/03/26 09:07:31 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_machdep.c,v 1.39 2017/04/21 21:13:04 jmcneill Exp $");
 
 #include "opt_tegra.h"
 #include "opt_machdep.h"
@@ -157,7 +157,6 @@ static const struct pmap_devmap devmap[] = {
 
 #ifdef PMAP_NEED_ALLOC_POOLPAGE
 static struct boot_physmem bp_lowgig = {
-	.bp_start = TEGRA_EXTMEM_BASE / NBPG,
 	.bp_pages = (KERNEL_VM_BASE - KERNEL_BASE) / NBPG,
 	.bp_freelist = VM_FREELIST_ISADMA,
 	.bp_flags = 0
@@ -232,6 +231,8 @@ extern void cortex_mpstart(void);
 u_int
 initarm(void *arg)
 {
+	bus_addr_t memory_addr;
+	bus_size_t memory_size;
 	psize_t ram_size = 0;
 	DPRINT("initarm:");
 
@@ -305,7 +306,15 @@ initarm(void *arg)
 	DPRINTF("KERNEL_BASE=0x%x, KERNEL_VM_BASE=0x%x, KERNEL_VM_BASE - KERNEL_BASE=0x%x, KERNEL_BASE_VOFFSET=0x%x\n",
 		KERNEL_BASE, KERNEL_VM_BASE, KERNEL_VM_BASE - KERNEL_BASE, KERNEL_BASE_VOFFSET);
 
-	ram_size = tegra_mc_memsize();
+	const int memory = OF_finddevice("/memory");
+	if (fdtbus_get_reg(memory, 0, &memory_addr, &memory_size) != 0)
+		panic("Cannot determine memory size");
+
+	DPRINTF("FDT memory node = %d, addr %llx, size %llu\n",
+	    memory, (unsigned long long)memory_addr,
+	    (unsigned long long)memory_size);
+
+	ram_size = memory_size;
 
 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
 	const bool mapallmem_p = true;
@@ -338,7 +347,7 @@ initarm(void *arg)
 
 	/* Fake bootconfig structure for the benefit of pmap.c. */
 	bootconfig.dramblocks = 1;
-	bootconfig.dram[0].address = TEGRA_EXTMEM_BASE; /* DDR PHY addr */
+	bootconfig.dram[0].address = memory_addr;
 	bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
 
 	KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
@@ -361,6 +370,7 @@ initarm(void *arg)
 	evbarm_device_register = tegra_device_register;
 
 #ifdef PMAP_NEED_ALLOC_POOLPAGE
+	bp_lowgig.bp_start = memory_addr / NBPG;
 	if (atop(ram_size) > bp_lowgig.bp_pages) {
 		arm_poolpage_vmfreelist = bp_lowgig.bp_freelist;
 		return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE,