Minor cleanups:
- move some driver specific definitions from rtl81x9reg.h to rtl81x9var.h - move several macro where related structures are declared - remove unused macro - fix some comments - unwrap some lines
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tsutsui
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a8d1516f11
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304b305c9e
@ -1,4 +1,4 @@
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/* $NetBSD: rtl81x9reg.h,v 1.19 2006/11/03 14:41:40 tsutsui Exp $ */
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/* $NetBSD: rtl81x9reg.h,v 1.20 2006/11/03 17:01:54 tsutsui Exp $ */
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/*
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* Copyright (c) 1997, 1998
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@ -253,6 +253,7 @@
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#define RTK_RXBUF_16 0x00000800
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#define RTK_RXBUF_32 0x00001000
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#define RTK_RXBUF_64 0x00001800
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#define RTK_RXBUF_LEN(x) (1 << (((x) >> 11) + 13))
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#define RTK_RXFIFO_16BYTES 0x00000000
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#define RTK_RXFIFO_32BYTES 0x00002000
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@ -411,28 +412,7 @@
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#define RTK_GMEDIASTAT_TXFLOW 0x40 /* TX flow control on */
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#define RTK_GMEDIASTAT_TBI 0x80 /* TBI enabled */
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/*
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* The RealTek doesn't use a fragment-based descriptor mechanism.
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* Instead, there are only four register sets, each or which represents
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* one 'descriptor.' Basically, each TX descriptor is just a contiguous
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* packet buffer (32-bit aligned!) and we place the buffer addresses in
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* the registers so the chip knows where they are.
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*
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* We can sort of kludge together the same kind of buffer management
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* used in previous drivers, but we have to do buffer copies almost all
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* the time, so it doesn't really buy us much.
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*
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* For reception, there's just one large buffer where the chip stores
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* all received packets.
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*/
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#ifdef dreamcast
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#define RTK_RX_BUF_SZ RTK_RXBUF_16
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#else
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#define RTK_RX_BUF_SZ RTK_RXBUF_64
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#endif
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#define RTK_RXBUFLEN (1 << ((RTK_RX_BUF_SZ >> 11) + 13))
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#define RTK_TX_LIST_CNT 4
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#define RTK_TX_EARLYTHRESH ((256 / 32) << 16)
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#define RTK_RX_FIFOTHRESH RTK_RXFIFO_256BYTES
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#define RTK_RX_MAXDMA RTK_RXDMA_256BYTES
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@ -442,13 +422,6 @@
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#define RTK_TXCFG_CONFIG (RTK_TXCFG_IFG|RTK_TX_MAXDMA)
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/*
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* The 8139C+ and 8160 gigE chips support descriptor-based TX
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* and RX. In fact, they even support TCP large send. Descriptors
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* must be allocated in contiguous blocks that are aligned on a
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* 256-byte boundary. The rings can hold a maximum of 64 descriptors.
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*/
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/*
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* RX/TX descriptor definition. When large send mode is enabled, the
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* lower 11 bits of the TX rtk_cmd word are used to hold the MSS, and
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@ -533,6 +506,9 @@ struct rtk_desc {
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#define RTK_UDPPKT(x) (((x) & RTK_RDESC_STAT_PROTOID) == \
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RTK_PROTOID_UDPIP)
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#define RTK_ADDR_LO(y) ((uint64_t)(y) & 0xFFFFFFFF)
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#define RTK_ADDR_HI(y) ((uint64_t)(y) >> 32)
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/*
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* Statistics counter structure (8139C+ and 8169 only)
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*/
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@ -555,16 +531,7 @@ struct rtk_stats {
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uint16_t rtk_rx_underruns;
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};
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#define RTK_RX_DESC_CNT 64
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#define RTK_TX_DESC_CNT_8139 64
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#define RTK_TX_DESC_CNT_8169 1024
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#define RTK_RX_LIST_SZ (RTK_RX_DESC_CNT * sizeof(struct rtk_desc))
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#define RTK_RING_ALIGN 256
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#define RTK_IFQ_MAXLEN 512
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#define RTK_PKTSZ(x) ((x)/* >> 3*/)
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#define RTK_ADDR_LO(y) ((uint64_t)(y) & 0xFFFFFFFF)
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#define RTK_ADDR_HI(y) ((uint64_t)(y) >> 32)
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#define RTK_JUMBO_FRAMELEN 9018
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#define RTK_JUMBO_MTU (RTK_JUMBO_FRAMELEN-ETHER_HDR_LEN-ETHER_CRC_LEN)
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@ -1,4 +1,4 @@
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/* $NetBSD: rtl81x9var.h,v 1.29 2006/11/03 14:41:41 tsutsui Exp $ */
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/* $NetBSD: rtl81x9var.h,v 1.30 2006/11/03 17:01:54 tsutsui Exp $ */
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/*
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* Copyright (c) 1997, 1998
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@ -60,6 +60,15 @@ struct rtk_hwrev {
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const char *rtk_desc;
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};
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#define RTK_8129 1
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#define RTK_8139 2
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#define RTK_8139CPLUS 3
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#define RTK_8169 4
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#define RTK_ISCPLUS(x) ((x)->rtk_type == RTK_8139CPLUS || \
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(x)->rtk_type == RTK_8169)
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struct rtk_mii_frame {
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uint8_t mii_stdelim;
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uint8_t mii_opcode;
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@ -77,22 +86,44 @@ struct rtk_mii_frame {
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#define RTK_MII_WRITEOP 0x01
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#define RTK_MII_TURNAROUND 0x02
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#define RTK_8129 1
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#define RTK_8139 2
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#define RTK_8139CPLUS 3
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#define RTK_8169 4
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#define RTK_ISCPLUS(x) ((x)->rtk_type == RTK_8139CPLUS || \
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(x)->rtk_type == RTK_8169)
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#define RTK_TX_QLEN 64
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/*
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* The 8139C+ and 8160 gigE chips support descriptor-based TX
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* The RealTek doesn't use a fragment-based descriptor mechanism.
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* Instead, there are only four register sets, each or which represents
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* one 'descriptor.' Basically, each TX descriptor is just a contiguous
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* packet buffer (32-bit aligned!) and we place the buffer addresses in
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* the registers so the chip knows where they are.
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*
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* We can sort of kludge together the same kind of buffer management
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* used in previous drivers, but we have to do buffer copies almost all
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* the time, so it doesn't really buy us much.
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*
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* For reception, there's just one large buffer where the chip stores
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* all received packets.
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*/
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#ifdef dreamcast
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#define RTK_RX_BUF_SZ RTK_RXBUF_16
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#else
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#define RTK_RX_BUF_SZ RTK_RXBUF_64
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#endif
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#define RTK_RXBUFLEN RTK_RXBUF_LEN(RTK_RX_BUF_SZ)
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#define RTK_TX_LIST_CNT 4
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/*
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* The 8139C+ and 8169 gigE chips support descriptor-based TX
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* and RX. In fact, they even support TCP large send. Descriptors
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* must be allocated in contiguous blocks that are aligned on a
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* 256-byte boundary. The rings can hold a maximum of 64 descriptors.
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* 256-byte boundary. The RX rings can hold a maximum of 64 descriptors.
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* The TX rings can hold upto 64 descriptors on 8139C+, and
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* 1024 descriptors on 8169 gigE chips.
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*/
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#define RTK_RING_ALIGN 256
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#define RTK_RX_DESC_CNT 64
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#define RTK_TX_DESC_CNT_8139 64
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#define RTK_TX_DESC_CNT_8169 1024
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#define RTK_TX_QLEN 64
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struct rtk_rxsoft {
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struct mbuf *rxs_mbuf;
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@ -170,16 +201,14 @@ struct rtk_softc {
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#endif
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};
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#define RTK_TX_DESC_CNT(sc) \
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((sc)->rtk_ldata.rtk_tx_desc_cnt)
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#define RTK_TX_LIST_SZ(sc) \
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(RTK_TX_DESC_CNT(sc) * sizeof(struct rtk_desc))
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#define RTK_NEXT_TX_DESC(sc, x) \
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(((x) + 1) % RTK_TX_DESC_CNT(sc))
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#define RTK_NEXT_RX_DESC(sc, x) \
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(((x) + 1) % RTK_RX_DESC_CNT)
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#define RTK_NEXT_TXQ(sc, x) \
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(((x) + 1) % RTK_TX_QLEN)
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#define RTK_TX_DESC_CNT(sc) ((sc)->rtk_ldata.rtk_tx_desc_cnt)
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#define RTK_TX_LIST_SZ(sc) (RTK_TX_DESC_CNT(sc) * sizeof(struct rtk_desc))
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#define RTK_NEXT_TX_DESC(sc, x) (((x) + 1) % RTK_TX_DESC_CNT(sc))
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#define RTK_RX_LIST_SZ (RTK_RX_DESC_CNT * sizeof(struct rtk_desc))
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#define RTK_NEXT_RX_DESC(sc, x) (((x) + 1) % RTK_RX_DESC_CNT)
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#define RTK_NEXT_TXQ(sc, x) (((x) + 1) % RTK_TX_QLEN)
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#define RTK_TXDESCSYNC(sc, idx, ops) \
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bus_dmamap_sync((sc)->sc_dmat, \
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