Merge forward matt-nb5-mips64
Adapt to new interrupt/spl framework (XXX don't know how to deal with use of spllower in sleep/pause code so hpcmips kernel will fail to compile).
This commit is contained in:
matt
parent
996804a59b
commit
0351e90100
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@ -1,4 +1,4 @@
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# $NetBSD: std.hpcmips,v 1.19 2005/12/11 12:17:33 christos Exp $
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# $NetBSD: std.hpcmips,v 1.20 2011/02/20 07:58:13 matt Exp $
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# standard, required hpcmips info
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machine hpcmips mips
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@ -6,7 +6,7 @@ include "conf/std" # MI standard options
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makeoptions MACHINE_ARCH="mipsel"
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options NOFPU # No FPU
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options SOFTFLOAT # emulate FPU insn
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options FPEMUL # emulate FPU insn
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mainbus0 at root
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cpu* at mainbus0
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@ -1,4 +1,4 @@
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# $NetBSD: std.lcard,v 1.7 2006/09/16 02:14:56 gdamore Exp $
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# $NetBSD: std.lcard,v 1.8 2011/02/20 07:58:13 matt Exp $
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# standard, required hpcmips info
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machine hpcmips mips
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@ -6,7 +6,7 @@ include "conf/std" # MI standard options
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makeoptions MACHINE_ARCH="mipsel"
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options NOFPU # No FPU
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options SOFTFLOAT # emulate FPU insn
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options FPEMUL # emulate FPU insn
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options MIPS3 # R4000/R4400/R4600 CPUs
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options MIPS3_4100 # VR4100 core
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@ -1,4 +1,4 @@
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/* $NetBSD: autoconf.c,v 1.23 2011/02/08 20:20:14 rmind Exp $ */
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/* $NetBSD: autoconf.c,v 1.24 2011/02/20 07:58:13 matt Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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@ -39,7 +39,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.23 2011/02/08 20:20:14 rmind Exp $");
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__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.24 2011/02/20 07:58:13 matt Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -76,7 +76,7 @@ cpu_configure(void)
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panic("no mainbus found");
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/* Configuration is finished, turn on interrupts. */
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_splnone(); /* enable all source forcing SOFT_INTs cleared */
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spl0(); /* enable all source forcing SOFT_INTs cleared */
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}
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void
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@ -1,4 +1,4 @@
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/* $NetBSD: bus_dma.c,v 1.35 2009/12/14 00:46:03 matt Exp $ */
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/* $NetBSD: bus_dma.c,v 1.36 2011/02/20 07:58:13 matt Exp $ */
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/*-
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* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
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@ -31,7 +31,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.35 2009/12/14 00:46:03 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.36 2011/02/20 07:58:13 matt Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -516,13 +516,12 @@ _hpcmips_bd_mem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
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bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
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int flags)
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{
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extern paddr_t avail_start, avail_end; /* XXX */
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psize_t high;
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high = avail_end - PAGE_SIZE;
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high = mips_avail_end - PAGE_SIZE;
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return (_hpcmips_bd_mem_alloc_range(t, size, alignment, boundary,
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segs, nsegs, rsegs, flags, avail_start, high));
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segs, nsegs, rsegs, flags, mips_avail_start, high));
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}
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/*
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@ -536,10 +535,9 @@ _hpcmips_bd_mem_alloc_range(bus_dma_tag_t t, bus_size_t size,
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int flags, paddr_t low, paddr_t high)
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{
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#ifdef DIAGNOSTIC
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extern paddr_t avail_start, avail_end; /* XXX */
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high = high<(avail_end - PAGE_SIZE)? high: (avail_end - PAGE_SIZE);
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low = low>avail_start? low: avail_start;
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high = high<(mips_avail_end - PAGE_SIZE)? high: (mips_avail_end - PAGE_SIZE);
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low = low>mips_avail_start? low: mips_avail_start;
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#endif
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return (_bus_dmamem_alloc_range_common(t, size, alignment, boundary,
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@ -1,4 +1,4 @@
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/* $NetBSD: bus_space.c,v 1.28 2009/11/07 07:27:43 cegger Exp $ */
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/* $NetBSD: bus_space.c,v 1.29 2011/02/20 07:58:14 matt Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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@ -31,7 +31,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: bus_space.c,v 1.28 2009/11/07 07:27:43 cegger Exp $");
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__KERNEL_RCSID(0, "$NetBSD: bus_space.c,v 1.29 2011/02/20 07:58:14 matt Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -250,7 +250,7 @@ __hpcmips_cacheable(struct bus_space_tag_hpcmips *t, bus_addr_t bpa,
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/*
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* Update the same virtual address entry.
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*/
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MachTLBUpdate(va, opte);
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tlb_update(va, opte);
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}
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return (bpa);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.c,v 1.16 2009/12/14 00:46:04 matt Exp $ */
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/* $NetBSD: cpu.c,v 1.17 2011/02/20 07:58:14 matt Exp $ */
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/*-
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* Copyright (c) 1999 Shin Takemura, All rights reserved.
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* Copyright (c) 1999-2001 SATO Kazumi, All rights reserved.
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@ -56,27 +56,28 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.16 2009/12/14 00:46:04 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.17 2011/02/20 07:58:14 matt Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/cpu.h>
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#include <sys/bus.h>
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#include <machine/sysconf.h>
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#include <machine/autoconf.h>
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/* Definition of the driver for autoconfig. */
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static int cpumatch(struct device *, struct cfdata *, void *);
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static void cpuattach(struct device *, struct device *, void *);
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static int cpumatch(device_t, cfdata_t, void *);
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static void cpuattach(device_t, device_t, void *);
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CFATTACH_DECL(cpu, sizeof (struct device),
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CFATTACH_DECL_NEW(cpu, 0,
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cpumatch, cpuattach, NULL, NULL);
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extern struct cfdriver cpu_cd;
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static int
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cpumatch(struct device *parent, struct cfdata *cf, void *aux)
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cpumatch(device_t parent, cfdata_t cf, void *aux)
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{
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struct mainbus_attach_args *ma = aux;
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@ -85,12 +86,16 @@ cpumatch(struct device *parent, struct cfdata *cf, void *aux)
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}
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static void
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cpuattach(struct device *parent, struct device *dev, void *aux)
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cpuattach(device_t parent, device_t self, void *aux)
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{
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struct cpu_info * const ci = curcpu();
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printf(": ");
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ci->ci_dev = self;
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self->dv_private = ci;
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cpu_identify();
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aprint_normal(": ");
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cpu_identify(self);
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/* install CPU specific idle routine if any. */
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if (platform.cpu_idle != NULL)
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@ -1,4 +1,4 @@
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/* $NetBSD: hpcapm_machdep.c,v 1.3 2009/03/18 10:22:29 cegger Exp $ */
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/* $NetBSD: hpcapm_machdep.c,v 1.4 2011/02/20 07:58:14 matt Exp $ */
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/*
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* Copyright (c) 2000 Takemura Shin
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@ -29,7 +29,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: hpcapm_machdep.c,v 1.3 2009/03/18 10:22:29 cegger Exp $");
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__KERNEL_RCSID(0, "$NetBSD: hpcapm_machdep.c,v 1.4 2011/02/20 07:58:14 matt Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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@ -91,35 +91,35 @@ void
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machine_sleep(void)
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{
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#if NVRIP_COMMON > 0
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if (platid_match(&platid, &platid_mask_CPU_MIPS_VR_41XX)) {
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/*
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* disable all interrupts except PIU interrupt
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*/
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vrip_intr_suspend();
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_spllower(~MIPS_INT_MASK_0);
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if (platid_match(&platid, &platid_mask_CPU_MIPS_VR_41XX)) {
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/*
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* disable all interrupts except PIU interrupt
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*/
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vrip_intr_suspend();
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_spllower(~MIPS_INT_MASK_0);
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/*
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* SUSPEND instruction puts the CPU into power saveing
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* state until some interrupt occuer.
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* It sleeps until you push the power button.
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*/
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__asm(".set noreorder");
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__asm(".word " ___STRING(VR_OPCODE_SUSPEND));
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__asm("nop");
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__asm("nop");
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__asm("nop");
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__asm("nop");
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__asm("nop");
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__asm(".set reorder");
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/*
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* SUSPEND instruction puts the CPU into power saveing
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* state until some interrupt occuer.
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* It sleeps until you push the power button.
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*/
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__asm(".set noreorder");
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__asm(".word " ___STRING(VR_OPCODE_SUSPEND));
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__asm("nop");
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__asm("nop");
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__asm("nop");
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__asm("nop");
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__asm("nop");
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__asm(".set reorder");
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splhigh();
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vrip_intr_resume();
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delay(1000); /* 1msec */
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}
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splhigh();
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vrip_intr_resume();
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delay(1000); /* 1msec */
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}
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#endif /* NVRIP_COMMON > 0 */
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#ifdef TX39XX
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if (platid_match(&platid, &platid_mask_CPU_MIPS_TX)) {
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tx39power_suspend_cpu();
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}
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if (platid_match(&platid, &platid_mask_CPU_MIPS_TX)) {
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tx39power_suspend_cpu();
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}
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#endif
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: interrupt.c,v 1.17 2010/12/20 00:25:34 matt Exp $ */
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/* $NetBSD: interrupt.c,v 1.18 2011/02/20 07:58:14 matt Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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@ -30,26 +30,24 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.17 2010/12/20 00:25:34 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.18 2011/02/20 07:58:14 matt Exp $");
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#include "opt_vr41xx.h"
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#include "opt_tx39xx.h"
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#define __INTR_PRIVATE
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#include <sys/param.h>
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#include <sys/malloc.h>
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#include <sys/intr.h>
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#include <machine/sysconf.h>
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extern const u_int32_t __ipl_sr_bits_vr[];
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extern const u_int32_t __ipl_sr_bits_tx[];
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const u_int32_t *ipl_sr_bits;
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void
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intr_init(void)
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{
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ipl_sr_bits = CPUISMIPS3 ? __ipl_sr_bits_vr : __ipl_sr_bits_tx;
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ipl_sr_map = CPUISMIPS3 ? __ipl_sr_map_vr : __ipl_sr_map_tx;
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}
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#if defined(VR41XX) && defined(TX39XX)
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@ -62,9 +60,9 @@ intr_init(void)
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*
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*/
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void
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cpu_intr(uint32_t status, uint32_t cause, vaddr_t pc, uint32_t ipending)
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cpu_intr(int ppl, vaddr_t pc, uint32_t status)
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{
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(*platform.cpu_intr)(status, cause, pc, ipending);
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(*platform.cpu_intr)(ppl, pc, status);
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}
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#endif /* VR41XX && TX39XX */
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.113 2011/02/08 20:20:15 rmind Exp $ */
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/* $NetBSD: machdep.c,v 1.114 2011/02/20 07:58:14 matt Exp $ */
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/*-
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* Copyright (c) 1999 Shin Takemura, All rights reserved.
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@ -69,7 +69,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.113 2011/02/08 20:20:15 rmind Exp $");
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.114 2011/02/20 07:58:14 matt Exp $");
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#include "opt_vr41xx.h"
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#include "opt_tx39xx.h"
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@ -103,6 +103,7 @@ __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.113 2011/02/08 20:20:15 rmind Exp $");
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#include <ufs/mfs/mfs_extern.h> /* mfs_initminiroot() */
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#include <dev/cons.h> /* cntab access (cpu_reboot) */
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#include <machine/locore.h>
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#include <machine/psl.h>
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#include <machine/sysconf.h>
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#include <machine/platid.h>
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@ -184,15 +185,6 @@ int physmem; /* max supported memory, changes to actual */
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int mem_cluster_cnt;
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phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
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/*
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* safepri is a safe priority for sleep to set for a spin-wait
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* during autoconfiguration or after a panic.
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* Used as an argument to splx().
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* XXX disables interrupt 5 to disable mips3 on-chip clock, which also
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* disables mips1 FPU interrupts.
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*/
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int safepri = MIPS3_PSL_LOWIPL; /* XXX */
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void mach_init(int, char *[], struct bootinfo *);
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#ifdef DEBUG
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@ -326,7 +318,7 @@ mach_init(int argc, char *argv[], struct bootinfo *bi)
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* Initialize locore-function vector.
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* Clear out the I and D caches.
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*/
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mips_vector_init();
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mips_vector_init(NULL, false);
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intr_init();
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#ifdef DEBUG
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@ -448,22 +440,8 @@ mach_init(int argc, char *argv[], struct bootinfo *bi)
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physmem += atop(mem_clusters[i].size);
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}
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/* Cluster 0 is always the kernel, which doesn't get loaded. */
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for (i = 1; i < mem_cluster_cnt; i++) {
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paddr_t start;
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psize_t size;
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start = (paddr_t)mem_clusters[i].start;
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size = (psize_t)mem_clusters[i].size;
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printf("loading %#"PRIxPADDR",%#"PRIxPSIZE"\n", start, size);
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memset((void *)MIPS_PHYS_TO_KSEG1(start), 0, size);
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uvm_page_physload(atop(start), atop(start + size),
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atop(start), atop(start + size),
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VM_FREELIST_DEFAULT);
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}
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mips_page_physload(MIPS_KSEG0_START, (vaddr_t)kernend,
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mem_clusters, mem_cluster_cnt, NULL, 0);
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/*
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* Initialize error message buffer (at end of core).
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@ -544,7 +522,6 @@ cpu_reboot(int howto, char *bootstr)
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{
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/* take a snap shot before clobbering any registers */
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if (curlwp)
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savectx(curpcb);
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#ifdef DEBUG
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@ -1,4 +1,4 @@
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/* $NetBSD: mainbus.c,v 1.30 2008/01/04 22:13:56 ad Exp $ */
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/* $NetBSD: mainbus.c,v 1.31 2011/02/20 07:58:14 matt Exp $ */
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/*-
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* Copyright (c) 1999
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@ -35,7 +35,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.30 2008/01/04 22:13:56 ad Exp $");
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__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.31 2011/02/20 07:58:14 matt Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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|
|
@ -54,28 +54,27 @@ __KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.30 2008/01/04 22:13:56 ad Exp $");
|
|||
#define STATIC static
|
||||
#endif
|
||||
|
||||
STATIC int mainbus_match(struct device *, struct cfdata *, void *);
|
||||
STATIC void mainbus_attach(struct device *, struct device *, void *);
|
||||
STATIC int mainbus_search(struct device *, struct cfdata *,
|
||||
const int *, void *);
|
||||
STATIC int mainbus_match(device_t, cfdata_t, void *);
|
||||
STATIC void mainbus_attach(device_t, device_t, void *);
|
||||
STATIC int mainbus_search(device_t, cfdata_t, const int *, void *);
|
||||
STATIC int mainbus_print(void *, const char *);
|
||||
|
||||
CFATTACH_DECL(mainbus, sizeof(struct device),
|
||||
CFATTACH_DECL_NEW(mainbus, 0,
|
||||
mainbus_match, mainbus_attach, NULL, NULL);
|
||||
|
||||
STATIC int __mainbus_attached;
|
||||
|
||||
int
|
||||
mainbus_match(struct device *parent, struct cfdata *cf, void *aux)
|
||||
mainbus_match(device_t parent, cfdata_t cf, void *aux)
|
||||
{
|
||||
|
||||
return (__mainbus_attached ? 0 : 1); /* don't attach twice */
|
||||
}
|
||||
|
||||
void
|
||||
mainbus_attach(struct device *parent, struct device *self, void *aux)
|
||||
mainbus_attach(device_t parent, device_t self, void *aux)
|
||||
{
|
||||
static const char *devnames[] = { /* ATTACH ORDER */
|
||||
static const char * const devnames[] = { /* ATTACH ORDER */
|
||||
"cpu", /* 1. CPU */
|
||||
"vrip", "vr4102ip", "vr4122ip",
|
||||
"vr4181ip", /* 2. System BUS */
|
||||
|
|
@ -106,8 +105,7 @@ mainbus_attach(struct device *parent, struct device *self, void *aux)
|
|||
}
|
||||
|
||||
int
|
||||
mainbus_search(struct device *parent, struct cfdata *cf,
|
||||
const int *ldesc, void *aux)
|
||||
mainbus_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
|
||||
{
|
||||
struct mainbus_attach_args *ma = (void *)aux;
|
||||
int locator = cf->cf_loc[MAINBUSCF_PLATFORM];
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: intr.h,v 1.22 2008/01/04 22:03:25 ad Exp $ */
|
||||
/* $NetBSD: intr.h,v 1.23 2011/02/20 07:58:14 matt Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
|
||||
|
|
@ -33,62 +33,17 @@
|
|||
#ifndef _HPCMIPS_INTR_H_
|
||||
#define _HPCMIPS_INTR_H_
|
||||
|
||||
#define IPL_NONE 0 /* disable only this interrupt */
|
||||
#define IPL_SOFTCLOCK 1 /* clock software interrupts (SI 0) */
|
||||
#define IPL_SOFTBIO 1 /* bio software interrupts (SI 0) */
|
||||
#define IPL_SOFTNET 2 /* network software interrupts (SI 1) */
|
||||
#define IPL_SOFTSERIAL 2 /* serial software interrupts (SI 1) */
|
||||
#define IPL_VM 3
|
||||
#define IPL_SCHED 4
|
||||
#define IPL_HIGH 4 /* disable all interrupts */
|
||||
|
||||
#define _IPL_N 5
|
||||
|
||||
#define _IPL_SI0_FIRST IPL_SOFTCLOCK
|
||||
#define _IPL_SI0_LAST IPL_SOFTBIO
|
||||
|
||||
#define _IPL_SI1_FIRST IPL_SOFTNET
|
||||
#define _IPL_SI1_LAST IPL_SOFTSERIAL
|
||||
|
||||
/* Interrupt sharing types. */
|
||||
#define IST_UNUSABLE -1 /* interrupt cannot be used */
|
||||
#define IST_NONE 0 /* none */
|
||||
#define IST_PULSE 1 /* pulsed */
|
||||
#define IST_EDGE 2 /* edge-triggered */
|
||||
#define IST_LEVEL 3 /* level-triggered */
|
||||
#include <mips/intr.h>
|
||||
|
||||
#ifdef _KERNEL
|
||||
#ifndef _LOCORE
|
||||
#include <mips/cpuregs.h>
|
||||
#include <mips/locore.h>
|
||||
|
||||
extern const u_int32_t *ipl_sr_bits;
|
||||
|
||||
void intr_init(void);
|
||||
|
||||
#define spl0() (void) _spllower(0)
|
||||
#define splx(s) (void) _splset(s)
|
||||
|
||||
typedef int ipl_t;
|
||||
typedef struct {
|
||||
ipl_t _sr;
|
||||
} ipl_cookie_t;
|
||||
|
||||
static inline ipl_cookie_t
|
||||
makeiplcookie(ipl_t ipl)
|
||||
{
|
||||
|
||||
return (ipl_cookie_t){._sr = ipl_sr_bits[ipl]};
|
||||
}
|
||||
|
||||
static inline int
|
||||
splraiseipl(ipl_cookie_t icookie)
|
||||
{
|
||||
|
||||
return _splraise(icookie._sr);
|
||||
}
|
||||
|
||||
#include <sys/spl.h>
|
||||
#ifdef __INTR_PRIVATE
|
||||
extern const struct ipl_sr_map __ipl_sr_map_vr;
|
||||
extern const struct ipl_sr_map __ipl_sr_map_tx;
|
||||
#endif
|
||||
|
||||
#endif /* !_LOCORE */
|
||||
#endif /* _KERNEL */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: sysconf.h,v 1.15 2009/12/15 06:01:43 mrg Exp $ */
|
||||
/* $NetBSD: sysconf.h,v 1.16 2011/02/20 07:58:14 matt Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
|
||||
|
|
@ -62,7 +62,7 @@ extern struct platform {
|
|||
* reboot - reboot or powerdown
|
||||
* clock -
|
||||
*/
|
||||
void (*cpu_intr)(uint32_t, uint32_t, vaddr_t, uint32_t);
|
||||
void (*cpu_intr)(int, vaddr_t, u_int32_t);
|
||||
void (*cpu_idle)(void);
|
||||
void (*cons_init)(void);
|
||||
void (*fb_init)(void **);
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: tx39.c,v 1.41 2010/01/21 01:23:15 pooka Exp $ */
|
||||
/* $NetBSD: tx39.c,v 1.42 2011/02/20 07:58:14 matt Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
|
||||
|
|
@ -30,7 +30,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: tx39.c,v 1.41 2010/01/21 01:23:15 pooka Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: tx39.c,v 1.42 2011/02/20 07:58:14 matt Exp $");
|
||||
|
||||
#include "opt_vr41xx.h"
|
||||
#include "opt_tx39xx.h"
|
||||
|
|
@ -39,12 +39,12 @@ __KERNEL_RCSID(0, "$NetBSD: tx39.c,v 1.41 2010/01/21 01:23:15 pooka Exp $");
|
|||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/intr.h>
|
||||
|
||||
#include <uvm/uvm_extern.h>
|
||||
|
||||
#include <mips/cache.h>
|
||||
|
||||
#include <machine/locore.h> /* cpu_id */
|
||||
#include <machine/bootinfo.h> /* bootinfo */
|
||||
#include <machine/sysconf.h> /* platform */
|
||||
|
||||
|
|
@ -84,7 +84,7 @@ void tx_init(void);
|
|||
#define TX_INTR cpu_intr /* locore_mips3 directly call this */
|
||||
#endif
|
||||
|
||||
extern void TX_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
|
||||
extern void TX_INTR(int, vaddr_t, uint32_t);
|
||||
|
||||
void tx39clock_cpuspeed(int *, int *);
|
||||
|
||||
|
|
@ -114,7 +114,7 @@ tx_init(void)
|
|||
platform.reboot = tx_reboot;
|
||||
|
||||
|
||||
model = MIPS_PRID_REV(cpu_id);
|
||||
model = MIPS_PRID_REV(mips_options.mips_cpu_id);
|
||||
|
||||
switch (model) {
|
||||
default:
|
||||
|
|
@ -181,9 +181,9 @@ void
|
|||
tx_find_dram(paddr_t start, paddr_t end)
|
||||
{
|
||||
char *page, *startaddr, *endaddr;
|
||||
u_int32_t magic0, magic1;
|
||||
#define MAGIC0 (*(volatile u_int32_t *)(page + 0))
|
||||
#define MAGIC1 (*(volatile u_int32_t *)(page + 4))
|
||||
uint32_t magic0, magic1;
|
||||
#define MAGIC0 (*(volatile uint32_t *)(page + 0))
|
||||
#define MAGIC1 (*(volatile uint32_t *)(page + 4))
|
||||
|
||||
startaddr = (char *)MIPS_PHYS_TO_KSEG1(start);
|
||||
endaddr = (char *)MIPS_PHYS_TO_KSEG1(end);
|
||||
|
|
@ -238,7 +238,7 @@ void
|
|||
tx_reboot(int howto, char *bootstr)
|
||||
{
|
||||
|
||||
goto *(u_int32_t *)MIPS_RESET_EXC_VEC;
|
||||
goto *(uint32_t *)MIPS_RESET_EXC_VEC;
|
||||
}
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: tx39icu.c,v 1.27 2010/12/20 00:25:34 matt Exp $ */
|
||||
/* $NetBSD: tx39icu.c,v 1.28 2011/02/20 07:58:14 matt Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1999-2001 The NetBSD Foundation, Inc.
|
||||
|
|
@ -30,7 +30,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: tx39icu.c,v 1.27 2010/12/20 00:25:34 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: tx39icu.c,v 1.28 2011/02/20 07:58:14 matt Exp $");
|
||||
|
||||
#include "opt_vr41xx.h"
|
||||
#include "opt_tx39xx.h"
|
||||
|
|
@ -305,7 +305,7 @@ tx39icu_attach(struct device *parent, struct device *self, void *aux)
|
|||
}
|
||||
|
||||
void
|
||||
TX_INTR(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
|
||||
TX_INTR(u_int32_t status, u_int32_t cause, vaddr_t pc, u_int32_t ipending)
|
||||
{
|
||||
struct tx39icu_softc *sc;
|
||||
tx_chipset_tag_t tc;
|
||||
|
|
@ -417,8 +417,10 @@ TX_INTR(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
|
|||
#endif
|
||||
ci->ci_idepth--;
|
||||
#ifdef __HAVE_FAST_SOFTINTS
|
||||
_splset((status & ~cause & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
|
||||
softintr(ipending);
|
||||
ipending &= MIPS_SOFT_INT_MASK;
|
||||
if (ipending == 0)
|
||||
return;
|
||||
softint_process(ipending);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: vr.c,v 1.58 2010/12/20 00:25:34 matt Exp $ */
|
||||
/* $NetBSD: vr.c,v 1.59 2011/02/20 07:58:14 matt Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1999-2002
|
||||
|
|
@ -35,12 +35,14 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: vr.c,v 1.58 2010/12/20 00:25:34 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: vr.c,v 1.59 2011/02/20 07:58:14 matt Exp $");
|
||||
|
||||
#include "opt_vr41xx.h"
|
||||
#include "opt_tx39xx.h"
|
||||
#include "opt_kgdb.h"
|
||||
|
||||
#define __INTR_PRIVATE
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/reboot.h>
|
||||
|
|
@ -127,22 +129,19 @@ __KERNEL_RCSID(0, "$NetBSD: vr.c,v 1.58 2010/12/20 00:25:34 matt Exp $");
|
|||
* This is a mask of bits to clear in the SR when we go to a
|
||||
* given interrupt priority level.
|
||||
*/
|
||||
const u_int32_t __ipl_sr_bits_vr[_IPL_N] = {
|
||||
0, /* IPL_NONE */
|
||||
|
||||
MIPS_SOFT_INT_MASK_0, /* IPL_SOFTCLOCK */
|
||||
|
||||
MIPS_SOFT_INT_MASK_0|
|
||||
MIPS_SOFT_INT_MASK_1, /* IPL_SOFTNET */
|
||||
|
||||
MIPS_SOFT_INT_MASK_0|
|
||||
MIPS_SOFT_INT_MASK_1|
|
||||
MIPS_INT_MASK_0, /* IPL_VM */
|
||||
|
||||
MIPS_SOFT_INT_MASK_0|
|
||||
MIPS_SOFT_INT_MASK_1|
|
||||
MIPS_INT_MASK_0|
|
||||
MIPS_INT_MASK_1, /* IPL_SCHED */
|
||||
const struct ipl_sr_map __ipl_sr_map_vr = {
|
||||
.sr_bits = {
|
||||
[IPL_NONE] = 0,
|
||||
[IPL_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
|
||||
[IPL_SOFTNET] = MIPS_SOFT_INT_MASK,
|
||||
[IPL_VM] = MIPS_SOFT_INT_MASK
|
||||
| MIPS_INT_MASK_0,
|
||||
[IPL_SCHED] = MIPS_SOFT_INT_MASK
|
||||
| MIPS_INT_MASK_0
|
||||
| MIPS_INT_MASK_1,
|
||||
[IPL_DDB] = MIPS_INT_MASK,
|
||||
[IPL_VM] = MIPS_INT_MASK,
|
||||
},
|
||||
};
|
||||
|
||||
#if defined(VR41XX) && defined(TX39XX)
|
||||
|
|
@ -152,7 +151,7 @@ const u_int32_t __ipl_sr_bits_vr[_IPL_N] = {
|
|||
#endif
|
||||
|
||||
void vr_init(void);
|
||||
void VR_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
|
||||
void VR_INTR(int, vaddr_t, uint32_t);
|
||||
extern void vr_idle(void);
|
||||
STATIC void vr_cons_init(void);
|
||||
STATIC void vr_fb_init(void **);
|
||||
|
|
@ -163,8 +162,8 @@ STATIC void vr_reboot(int, char *);
|
|||
/*
|
||||
* CPU interrupt dispatch table (HwInt[0:3])
|
||||
*/
|
||||
STATIC int vr_null_handler(void *, u_int32_t, u_int32_t);
|
||||
STATIC int (*vr_intr_handler[4])(void *, u_int32_t, u_int32_t) =
|
||||
STATIC int vr_null_handler(void *, uint32_t, uint32_t);
|
||||
STATIC int (*vr_intr_handler[4])(void *, uint32_t, uint32_t) =
|
||||
{
|
||||
vr_null_handler,
|
||||
vr_null_handler,
|
||||
|
|
@ -535,51 +534,30 @@ vr_reboot(int howto, char *bootstr)
|
|||
* Handle interrupts.
|
||||
*/
|
||||
void
|
||||
VR_INTR(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
|
||||
VR_INTR(int ppl, vaddr_t pc, uint32_t status)
|
||||
{
|
||||
struct cpu_info *ci;
|
||||
uint32_t ipending;
|
||||
int ipl;
|
||||
|
||||
ci = curcpu();
|
||||
ci->ci_idepth++;
|
||||
ci->ci_data.cpu_nintr++;
|
||||
while (ppl < (ipl = splintr(&ipending))) {
|
||||
/* Deal with unneded compare interrupts occasionally so that
|
||||
* we can keep spllowersoftclock. */
|
||||
if (ipending & MIPS_INT_MASK_5) {
|
||||
mips3_cp0_compare_write(0);
|
||||
}
|
||||
|
||||
/* Deal with unneded compare interrupts occasionally so that we can
|
||||
* keep spllowersoftclock. */
|
||||
if (ipending & MIPS_INT_MASK_5) {
|
||||
mips3_cp0_compare_write(0);
|
||||
if (ipending & MIPS_INT_MASK_1) {
|
||||
(*vr_intr_handler[1])(vr_intr_arg[1], pc, ipending);
|
||||
}
|
||||
|
||||
if (ipending & MIPS_INT_MASK_0) {
|
||||
(*vr_intr_handler[0])(vr_intr_arg[0], pc, status);
|
||||
}
|
||||
}
|
||||
|
||||
if (ipending & MIPS_INT_MASK_1) {
|
||||
_splset(MIPS_SR_INT_IE); /* for spllowersoftclock */
|
||||
/* Remove the lower priority pending bits from status so that
|
||||
* spllowersoftclock will not happen if other interrupts are
|
||||
* pending. */
|
||||
(*vr_intr_handler[1])(vr_intr_arg[1], pc, status & ~(ipending
|
||||
& (MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)));
|
||||
}
|
||||
|
||||
if (ipending & MIPS_INT_MASK_0) {
|
||||
_splset(MIPS_INT_MASK_1|MIPS_SR_INT_IE);
|
||||
(*vr_intr_handler[0])(vr_intr_arg[0], pc, status);
|
||||
}
|
||||
ci->ci_idepth--;
|
||||
|
||||
#ifdef __HAVE_FAST_SOFTINTS
|
||||
if (ipending & MIPS_SOFT_INT_MASK_1) {
|
||||
_splset(MIPS_INT_MASK_1|MIPS_INT_MASK_0|MIPS_SR_INT_IE);
|
||||
softintr(MIPS_SOFT_INT_MASK_1);
|
||||
}
|
||||
|
||||
if (ipending & MIPS_SOFT_INT_MASK_0) {
|
||||
_splset(MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_1|MIPS_INT_MASK_0|
|
||||
MIPS_SR_INT_IE);
|
||||
softintr(MIPS_SOFT_INT_MASK_0);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void *
|
||||
vr_intr_establish(int line, int (*ih_fun)(void *, u_int32_t, u_int32_t),
|
||||
vr_intr_establish(int line, int (*ih_fun)(void *, uint32_t, uint32_t),
|
||||
void *ih_arg)
|
||||
{
|
||||
|
||||
|
|
@ -601,7 +579,7 @@ vr_intr_disestablish(void *ih)
|
|||
}
|
||||
|
||||
int
|
||||
vr_null_handler(void *arg, u_int32_t pc, u_int32_t status)
|
||||
vr_null_handler(void *arg, uint32_t pc, uint32_t status)
|
||||
{
|
||||
|
||||
printf("vr_null_handler\n");
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: vrdcu.c,v 1.5 2005/12/11 12:17:34 christos Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: vrdcu.c,v 1.6 2011/02/20 07:58:14 matt Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -219,17 +219,16 @@ _vrdcu_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
|
|||
bus_size_t boundary, bus_dma_segment_t *segs,
|
||||
int nsegs, int *rsegs, int flags)
|
||||
{
|
||||
extern paddr_t avail_start, avail_end; /* XXX */
|
||||
paddr_t high;
|
||||
|
||||
DPRINTFN(1, ("_vrdcu_dmamem_alloc\n"));
|
||||
|
||||
high = (avail_end < VRDMAAU_BOUNCE_THRESHOLD ?
|
||||
avail_end : VRDMAAU_BOUNCE_THRESHOLD) - PAGE_SIZE;
|
||||
high = (mips_avail_end < VRDMAAU_BOUNCE_THRESHOLD ?
|
||||
mips_avail_end : VRDMAAU_BOUNCE_THRESHOLD) - PAGE_SIZE;
|
||||
alignment = alignment > VRDMAAU_ALIGNMENT ?
|
||||
alignment : VRDMAAU_ALIGNMENT;
|
||||
|
||||
return _hpcmips_bd_mem_alloc_range(t, size, alignment, boundary,
|
||||
segs, nsegs, rsegs, flags,
|
||||
avail_start, high);
|
||||
mips_avail_start, high);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue