2005-12-11 15:16:03 +03:00
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/* $NetBSD: rs5c372reg.h,v 1.2 2005/12/11 12:21:23 christos Exp $ */
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2005-08-16 15:09:12 +04:00
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/*
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* Copyright (c) 2005 Kimihiro Nonaka
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_I2C_RS5C372REG_H_
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#define _DEV_I2C_RS5C372REG_H_
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/*
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* RS5C372[AB] Real-Time Clock
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*/
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#define RS5C372_ADDR 0x32 /* Fixed I2C Slave Address */
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#define RS5C372_SECONDS 0
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#define RS5C372_MINUTES 1
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#define RS5C372_HOURS 2
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#define RS5C372_DAY 3
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#define RS5C372_DATE 4
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#define RS5C372_MONTH 5
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#define RS5C372_YEAR 6
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#define RS5C372_CLOCK_CORRECT 7
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#define RS5C372_ALARMA_MIN 8
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#define RS5C372_ALARMA_HOUR 9
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#define RS5C372_ALARMA_DATE 10
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#define RS5C372_ALARMB_MIN 11
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#define RS5C372_ALARMB_HOUR 12
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#define RS5C372_ALARMB_DATE 13
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#define RS5C372_CONTROL1 14
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#define RS5C372_CONTROL2 15
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#define RS5C372_NREGS 16
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#define RS5C372_NRTC_REGS 7
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/*
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* Bit definitions.
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*/
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#define RS5C372_SECONDS_MASK 0x7f
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#define RS5C372_MINUTES_MASK 0x7f
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#define RS5C372_HOURS_12HRS_PM (1u << 5) /* If 12 hr mode, set = PM */
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#define RS5C372_HOURS_12MASK 0x1f
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#define RS5C372_HOURS_24MASK 0x3f
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#define RS5C372_DAY_MASK 0x07
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#define RS5C372_DATE_MASK 0x3f
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#define RS5C372_MONTH_MASK 0x1f
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#define RS5C372_CONTROL2_24HRS (1u << 5)
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#define RS5C372_CONTROL2_XSTP (1u << 4) /* read */
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#define RS5C372_CONTROL2_ADJ (1u << 4) /* write */
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#define RS5C372_CONTROL2_NCLEN (1u << 3)
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#define RS5C372_CONTROL2_CTFG (1u << 2)
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#define RS5C372_CONTROL2_AAFG (1u << 1)
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#define RS5C372_CONTROL2_BAFG (1u << 0)
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#endif /* _DEV_I2C_RS5C372REG_H_ */
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