Added RICOH RS5C372[AB] Real Time Clock.
This commit is contained in:
nonaka
parent
27a681b048
commit
f4372b7c37
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@ -1,4 +1,4 @@
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# $NetBSD: files.i2c,v 1.4 2005/08/10 14:18:28 macallan Exp $
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# $NetBSD: files.i2c,v 1.5 2005/08/16 11:09:12 nonaka Exp $
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define i2cbus { }
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define i2cexec
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@ -69,3 +69,8 @@ define adm1030c {}
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device adm1030c: sysmon_envsys
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attach adm1030c at iic
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file dev/i2c/adm1030.c adm1030c
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# RICOH RS5C372[AB] Real Time Clock
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device rs5c372rtc
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attach rs5c372rtc at iic
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file dev/i2c/rs5c372.c rs5c372rtc
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@ -0,0 +1,247 @@
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/* $NetBSD: rs5c372.c,v 1.1 2005/08/16 11:09:12 nonaka Exp $ */
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/*
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* Copyright (c) 2005 Kimihiro Nonaka
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/fcntl.h>
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#include <sys/uio.h>
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#include <sys/conf.h>
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#include <sys/event.h>
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#include <dev/clock_subr.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/rs5c372reg.h>
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struct rs5c372rtc_softc {
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struct device sc_dev;
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i2c_tag_t sc_tag;
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int sc_address;
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struct todr_chip_handle sc_todr;
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};
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static int rs5c372rtc_match(struct device *, struct cfdata *, void *);
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static void rs5c372rtc_attach(struct device *, struct device *, void *);
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CFATTACH_DECL(rs5c372rtc, sizeof(struct rs5c372rtc_softc),
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rs5c372rtc_match, rs5c372rtc_attach, NULL, NULL);
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static void rs5c372rtc_init(struct rs5c372rtc_softc *);
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static int rs5c372rtc_clock_read(struct rs5c372rtc_softc *, struct clock_ymdhms *);
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static int rs5c372rtc_clock_write(struct rs5c372rtc_softc *, struct clock_ymdhms *);
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static int rs5c372rtc_gettime(struct todr_chip_handle *, volatile struct timeval *);
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static int rs5c372rtc_settime(struct todr_chip_handle *, volatile struct timeval *);
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static int rs5c372rtc_getcal(struct todr_chip_handle *, int *);
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static int rs5c372rtc_setcal(struct todr_chip_handle *, int);
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static int
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rs5c372rtc_match(struct device *parent, struct cfdata *cf, void *arg)
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{
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struct i2c_attach_args *ia = arg;
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if (ia->ia_addr == RS5C372_ADDR)
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return (1);
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return (0);
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}
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static void
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rs5c372rtc_attach(struct device *parent, struct device *self, void *arg)
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{
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struct rs5c372rtc_softc *sc = (struct rs5c372rtc_softc *)self;
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struct i2c_attach_args *ia = arg;
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aprint_naive(": Real-time Clock\n");
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aprint_normal(": RICOH RS5C372[AB] Real-time Clock\n");
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sc->sc_tag = ia->ia_tag;
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sc->sc_address = ia->ia_addr;
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sc->sc_todr.cookie = sc;
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sc->sc_todr.todr_gettime = rs5c372rtc_gettime;
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sc->sc_todr.todr_settime = rs5c372rtc_settime;
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sc->sc_todr.todr_getcal = rs5c372rtc_getcal;
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sc->sc_todr.todr_setcal = rs5c372rtc_setcal;
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sc->sc_todr.todr_setwen = NULL;
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todr_attach(&sc->sc_todr);
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rs5c372rtc_init(sc);
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}
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static int
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rs5c372rtc_gettime(struct todr_chip_handle *ch, volatile struct timeval *tv)
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{
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struct rs5c372rtc_softc *sc = ch->cookie;
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struct clock_ymdhms dt, check;
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int retries;
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memset(&dt, 0, sizeof(dt));
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memset(&check, 0, sizeof(check));
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/*
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* Since we don't support Burst Read, we have to read the clock twice
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* until we get two consecutive identical results.
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*/
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retries = 5;
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do {
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rs5c372rtc_clock_read(sc, &dt);
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rs5c372rtc_clock_read(sc, &check);
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} while (memcmp(&dt, &check, sizeof(check)) != 0 && --retries);
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tv->tv_sec = clock_ymdhms_to_secs(&dt);
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tv->tv_usec = 0;
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return (0);
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}
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static int
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rs5c372rtc_settime(struct todr_chip_handle *ch, volatile struct timeval *tv)
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{
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struct rs5c372rtc_softc *sc = ch->cookie;
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struct clock_ymdhms dt;
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clock_secs_to_ymdhms(tv->tv_sec, &dt);
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if (rs5c372rtc_clock_write(sc, &dt) == 0)
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return (-1);
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return (0);
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}
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static int
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rs5c372rtc_setcal(struct todr_chip_handle *ch, int cal)
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{
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return (EOPNOTSUPP);
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}
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static int
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rs5c372rtc_getcal(struct todr_chip_handle *ch, int *cal)
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{
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return (EOPNOTSUPP);
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}
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static void
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rs5c372rtc_init(struct rs5c372rtc_softc *sc)
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{
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uint8_t cmdbuf[2];
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if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
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printf("%s: rs5c372rtc_init: failed to acquire I2C bus\n",
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sc->sc_dev.dv_xname);
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return;
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}
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cmdbuf[0] = (RS5C372_CONTROL2 << 4);
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cmdbuf[1] = RS5C372_CONTROL2_24HRS;
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if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
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cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: rs5c372rtc_clock_read: failed to write control2\n",
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sc->sc_dev.dv_xname);
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return;
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}
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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}
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static int
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rs5c372rtc_clock_read(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt)
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{
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uint8_t bcd[RS5C372_NRTC_REGS];
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uint8_t cmdbuf[1];
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if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
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printf("%s: rs5c372rtc_clock_read: failed to acquire I2C bus\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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cmdbuf[0] = (RS5C372_SECONDS << 4);
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if (iic_exec(sc->sc_tag, I2C_OP_READ, sc->sc_address,
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cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: rs5c372rtc_clock_read: failed to read rtc\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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/*
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* Convert the RS5C372's register values into something useable
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*/
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dt->dt_sec = FROMBCD(bcd[RS5C372_SECONDS] & RS5C372_SECONDS_MASK);
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dt->dt_min = FROMBCD(bcd[RS5C372_MINUTES] & RS5C372_MINUTES_MASK);
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dt->dt_hour = FROMBCD(bcd[RS5C372_HOURS] & RS5C372_HOURS_24MASK);
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dt->dt_day = FROMBCD(bcd[RS5C372_DATE] & RS5C372_DATE_MASK);
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dt->dt_mon = FROMBCD(bcd[RS5C372_MONTH] & RS5C372_MONTH_MASK);
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dt->dt_year = FROMBCD(bcd[RS5C372_YEAR]) + 2000;
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return (1);
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}
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static int
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rs5c372rtc_clock_write(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt)
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{
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uint8_t bcd[RS5C372_NRTC_REGS];
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uint8_t cmdbuf[1];
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/*
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* Convert our time representation into something the RS5C372
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* can understand.
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*/
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bcd[RS5C372_SECONDS] = TOBCD(dt->dt_sec);
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bcd[RS5C372_MINUTES] = TOBCD(dt->dt_min);
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bcd[RS5C372_HOURS] = TOBCD(dt->dt_hour);
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bcd[RS5C372_DATE] = TOBCD(dt->dt_day);
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bcd[RS5C372_DAY] = TOBCD(dt->dt_wday);
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bcd[RS5C372_MONTH] = TOBCD(dt->dt_mon);
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bcd[RS5C372_YEAR] = TOBCD(dt->dt_year % 100);
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if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
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printf("%s: rs5c372rtc_clock_write: failed to "
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"acquire I2C bus\n", sc->sc_dev.dv_xname);
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return (0);
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}
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cmdbuf[0] = (RS5C372_SECONDS << 4);
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if (iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address,
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cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: rs5c372rtc_clock_write: failed to write rtc\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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return (1);
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}
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@ -0,0 +1,76 @@
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/* $NetBSD: rs5c372reg.h,v 1.1 2005/08/16 11:09:12 nonaka Exp $ */
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/*
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* Copyright (c) 2005 Kimihiro Nonaka
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_I2C_RS5C372REG_H_
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#define _DEV_I2C_RS5C372REG_H_
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/*
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* RS5C372[AB] Real-Time Clock
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*/
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#define RS5C372_ADDR 0x32 /* Fixed I2C Slave Address */
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#define RS5C372_SECONDS 0
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#define RS5C372_MINUTES 1
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#define RS5C372_HOURS 2
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#define RS5C372_DAY 3
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#define RS5C372_DATE 4
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#define RS5C372_MONTH 5
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#define RS5C372_YEAR 6
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#define RS5C372_CLOCK_CORRECT 7
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#define RS5C372_ALARMA_MIN 8
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#define RS5C372_ALARMA_HOUR 9
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#define RS5C372_ALARMA_DATE 10
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#define RS5C372_ALARMB_MIN 11
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#define RS5C372_ALARMB_HOUR 12
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#define RS5C372_ALARMB_DATE 13
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#define RS5C372_CONTROL1 14
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#define RS5C372_CONTROL2 15
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#define RS5C372_NREGS 16
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#define RS5C372_NRTC_REGS 7
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/*
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* Bit definitions.
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*/
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#define RS5C372_SECONDS_MASK 0x7f
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#define RS5C372_MINUTES_MASK 0x7f
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#define RS5C372_HOURS_12HRS_PM (1u << 5) /* If 12 hr mode, set = PM */
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#define RS5C372_HOURS_12MASK 0x1f
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#define RS5C372_HOURS_24MASK 0x3f
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#define RS5C372_DAY_MASK 0x07
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#define RS5C372_DATE_MASK 0x3f
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#define RS5C372_MONTH_MASK 0x1f
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#define RS5C372_CONTROL2_24HRS (1u << 5)
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#define RS5C372_CONTROL2_XSTP (1u << 4) /* read */
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#define RS5C372_CONTROL2_ADJ (1u << 4) /* write */
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#define RS5C372_CONTROL2_NCLEN (1u << 3)
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#define RS5C372_CONTROL2_CTFG (1u << 2)
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#define RS5C372_CONTROL2_AAFG (1u << 1)
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#define RS5C372_CONTROL2_BAFG (1u << 0)
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#endif /* _DEV_I2C_RS5C372REG_H_ */
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