1997-09-05 05:48:33 +04:00
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/* $NetBSD: isadma.c,v 1.32 1997/09/05 01:48:33 thorpej Exp $ */
|
1997-06-07 03:43:45 +04:00
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Device driver for the ISA on-board DMA controller.
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*/
|
1994-10-27 07:14:23 +03:00
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|
1993-10-17 08:34:23 +03:00
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|
#include <sys/param.h>
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|
|
#include <sys/systm.h>
|
1996-04-30 00:02:32 +04:00
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|
#include <sys/proc.h>
|
1997-06-07 03:43:45 +04:00
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|
#include <sys/device.h>
|
1994-04-23 02:58:50 +04:00
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|
1993-10-17 08:34:23 +03:00
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#include <vm/vm.h>
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|
1997-06-07 03:43:45 +04:00
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|
#include <machine/bus.h>
|
1993-10-17 08:34:23 +03:00
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|
|
1995-04-17 16:06:30 +04:00
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|
#include <dev/isa/isareg.h>
|
1997-06-07 03:43:45 +04:00
|
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|
#include <dev/isa/isavar.h>
|
1995-04-17 16:06:30 +04:00
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|
#include <dev/isa/isadmavar.h>
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|
#include <dev/isa/isadmareg.h>
|
1993-10-14 08:22:57 +03:00
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|
|
1997-07-27 05:16:32 +04:00
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|
/* Used by isa_malloc() */
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|
#include <sys/malloc.h>
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|
struct isa_mem {
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|
struct device *isadev;
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|
|
int chan;
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|
bus_size_t size;
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|
bus_addr_t addr;
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|
|
caddr_t kva;
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|
|
struct isa_mem *next;
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|
|
} *isa_mem_head = 0;
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|
1997-06-07 03:43:45 +04:00
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/*
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|
|
* High byte of DMA address is stored in this DMAPG register for
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* the Nth DMA channel.
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|
*/
|
1996-04-01 00:51:43 +04:00
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|
static int dmapageport[2][4] = {
|
1997-06-07 03:43:45 +04:00
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|
{0x7, 0x3, 0x1, 0x2},
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|
|
{0xf, 0xb, 0x9, 0xa}
|
1996-03-01 07:08:13 +03:00
|
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|
};
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static u_int8_t dmamode[4] = {
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DMA37MD_READ | DMA37MD_SINGLE,
|
1996-03-01 07:35:27 +03:00
|
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|
DMA37MD_WRITE | DMA37MD_SINGLE,
|
1997-05-30 01:46:07 +04:00
|
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|
DMA37MD_READ | DMA37MD_SINGLE | DMA37MD_LOOP,
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|
|
DMA37MD_WRITE | DMA37MD_SINGLE | DMA37MD_LOOP
|
1996-03-01 07:08:13 +03:00
|
|
|
};
|
1993-10-14 08:22:57 +03:00
|
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|
1997-06-07 03:43:45 +04:00
|
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|
static inline void isa_dmaunmask __P((struct isa_softc *, int));
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|
|
static inline void isa_dmamask __P((struct isa_softc *, int));
|
1996-04-30 00:02:32 +04:00
|
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|
|
1997-06-07 03:43:45 +04:00
|
|
|
static inline void
|
|
|
|
isa_dmaunmask(sc, chan)
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|
|
struct isa_softc *sc;
|
1997-03-21 05:17:11 +03:00
|
|
|
int chan;
|
|
|
|
{
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|
|
|
int ochan = chan & 3;
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|
|
|
|
|
|
/* set dma channel mode, and set dma channel mode */
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|
|
if ((chan & 4) == 0)
|
1997-06-07 03:43:45 +04:00
|
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|
bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
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|
|
DMA1_SMSK, ochan | DMA37SM_CLEAR);
|
1997-03-21 05:17:11 +03:00
|
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|
else
|
1997-06-07 03:43:45 +04:00
|
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|
bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
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|
|
DMA2_SMSK, ochan | DMA37SM_CLEAR);
|
1997-03-21 05:17:11 +03:00
|
|
|
}
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|
1997-06-07 03:43:45 +04:00
|
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|
static inline void
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|
|
isa_dmamask(sc, chan)
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|
|
struct isa_softc *sc;
|
1997-03-21 05:17:11 +03:00
|
|
|
int chan;
|
|
|
|
{
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|
|
|
int ochan = chan & 3;
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|
|
|
|
|
|
|
/* set dma channel mode, and set dma channel mode */
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|
|
|
if ((chan & 4) == 0) {
|
1997-06-07 03:43:45 +04:00
|
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|
bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
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|
|
DMA1_SMSK, ochan | DMA37SM_SET);
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|
bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
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|
|
|
DMA1_FFC, 0);
|
1997-03-21 05:17:11 +03:00
|
|
|
} else {
|
1997-06-07 03:43:45 +04:00
|
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|
bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
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|
|
DMA2_SMSK, ochan | DMA37SM_SET);
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|
|
bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
|
|
|
|
DMA2_FFC, 0);
|
1997-03-21 05:17:11 +03:00
|
|
|
}
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|
|
|
}
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|
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|
1993-10-22 23:24:14 +03:00
|
|
|
/*
|
1994-04-23 02:58:50 +04:00
|
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|
* isa_dmacascade(): program 8237 DMA controller channel to accept
|
1993-10-14 08:22:57 +03:00
|
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|
* external dma control by a board.
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|
*/
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void
|
1997-06-07 03:43:45 +04:00
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|
isa_dmacascade(isadev, chan)
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struct device *isadev;
|
1993-10-22 23:24:14 +03:00
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int chan;
|
1993-10-14 08:22:57 +03:00
|
|
|
{
|
1997-06-07 03:43:45 +04:00
|
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|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
1997-03-21 05:17:11 +03:00
|
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int ochan = chan & 3;
|
1993-10-22 23:24:14 +03:00
|
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|
1997-06-07 03:43:45 +04:00
|
|
|
if (chan < 0 || chan > 7) {
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|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
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|
|
goto lose;
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|
|
|
}
|
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|
|
|
|
|
|
if (ISA_DRQ_ISFREE(sc, chan) == 0) {
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|
|
printf("%s: DRQ %d is not free\n", sc->sc_dev.dv_xname, chan);
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|
|
goto lose;
|
|
|
|
}
|
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|
|
|
|
|
|
ISA_DRQ_ALLOC(sc, chan);
|
1993-10-14 08:22:57 +03:00
|
|
|
|
|
|
|
/* set dma channel mode, and set dma channel mode */
|
1997-03-21 05:17:11 +03:00
|
|
|
if ((chan & 4) == 0)
|
1997-06-07 03:43:45 +04:00
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
|
|
|
|
DMA1_MODE, ochan | DMA37MD_CASCADE);
|
|
|
|
else
|
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
|
|
|
|
DMA2_MODE, ochan | DMA37MD_CASCADE);
|
|
|
|
|
|
|
|
isa_dmaunmask(sc, chan);
|
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|
|
return;
|
|
|
|
|
|
|
|
lose:
|
|
|
|
panic("isa_dmacascade");
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
isa_dmamap_create(isadev, chan, size, flags)
|
|
|
|
struct device *isadev;
|
|
|
|
int chan;
|
|
|
|
bus_size_t size;
|
|
|
|
int flags;
|
|
|
|
{
|
|
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
|
|
bus_size_t maxsize;
|
|
|
|
|
|
|
|
if (chan < 0 || chan > 7) {
|
|
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
|
|
goto lose;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chan & 4)
|
|
|
|
maxsize = (1 << 17);
|
1997-03-21 05:17:11 +03:00
|
|
|
else
|
1997-06-07 03:43:45 +04:00
|
|
|
maxsize = (1 << 16);
|
1996-03-01 07:08:13 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
if (size > maxsize)
|
|
|
|
return (EINVAL);
|
|
|
|
|
|
|
|
if (ISA_DRQ_ISFREE(sc, chan) == 0) {
|
|
|
|
printf("%s: drq %d is not free\n", sc->sc_dev.dv_xname, chan);
|
1997-08-05 02:13:32 +04:00
|
|
|
goto lose;
|
1997-06-07 03:43:45 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
ISA_DRQ_ALLOC(sc, chan);
|
|
|
|
|
|
|
|
return (bus_dmamap_create(sc->sc_dmat, size, 1, size, maxsize,
|
|
|
|
flags, &sc->sc_dmamaps[chan]));
|
|
|
|
|
|
|
|
lose:
|
|
|
|
panic("isa_dmamap_create");
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
isa_dmamap_destroy(isadev, chan)
|
|
|
|
struct device *isadev;
|
|
|
|
int chan;
|
|
|
|
{
|
|
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
|
|
|
|
|
|
if (chan < 0 || chan > 7) {
|
|
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
|
|
goto lose;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ISA_DRQ_ISFREE(sc, chan)) {
|
|
|
|
printf("%s: drq %d is already free\n",
|
|
|
|
sc->sc_dev.dv_xname, chan);
|
|
|
|
goto lose;
|
|
|
|
}
|
|
|
|
|
|
|
|
ISA_DRQ_FREE(sc, chan);
|
|
|
|
|
|
|
|
bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamaps[chan]);
|
|
|
|
return;
|
|
|
|
|
|
|
|
lose:
|
|
|
|
panic("isa_dmamap_destroy");
|
1993-10-14 08:22:57 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
1997-06-07 03:43:45 +04:00
|
|
|
* isa_dmastart(): program 8237 DMA controller channel and set it
|
|
|
|
* in motion.
|
1993-10-14 08:22:57 +03:00
|
|
|
*/
|
1997-06-07 03:43:45 +04:00
|
|
|
int
|
|
|
|
isa_dmastart(isadev, chan, addr, nbytes, p, flags, busdmaflags)
|
|
|
|
struct device *isadev;
|
1993-10-22 23:24:14 +03:00
|
|
|
int chan;
|
1997-06-07 03:43:45 +04:00
|
|
|
void *addr;
|
|
|
|
bus_size_t nbytes;
|
|
|
|
struct proc *p;
|
|
|
|
int flags;
|
|
|
|
int busdmaflags;
|
1993-10-14 08:22:57 +03:00
|
|
|
{
|
1997-06-07 03:43:45 +04:00
|
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
|
|
bus_dmamap_t dmam;
|
|
|
|
bus_addr_t dmaaddr;
|
1993-10-14 08:22:57 +03:00
|
|
|
int waport;
|
1997-03-21 05:17:11 +03:00
|
|
|
int ochan = chan & 3;
|
1997-06-07 03:43:45 +04:00
|
|
|
int error;
|
|
|
|
|
|
|
|
if (chan < 0 || chan > 7) {
|
|
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
|
|
goto lose;
|
|
|
|
}
|
1993-10-14 08:22:57 +03:00
|
|
|
|
1996-02-20 07:17:05 +03:00
|
|
|
#ifdef ISADMA_DEBUG
|
1997-06-07 03:43:45 +04:00
|
|
|
printf("isa_dmastart: drq %d, addr %p, nbytes 0x%lx, p %p, "
|
|
|
|
"flags 0x%x, dmaflags 0x%x\n",
|
|
|
|
chan, addr, nbytes, p, flags, busdmaflags);
|
1993-10-22 23:24:14 +03:00
|
|
|
#endif
|
1993-10-14 08:22:57 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
if (chan & 4) {
|
|
|
|
if (nbytes > (1 << 17) || nbytes & 1 || (u_long)addr & 1) {
|
|
|
|
printf("%s: drq %d, nbytes 0x%lx, addr %p\n",
|
|
|
|
sc->sc_dev.dv_xname, chan, nbytes, addr);
|
|
|
|
goto lose;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (nbytes > (1 << 16)) {
|
|
|
|
printf("%s: drq %d, nbytes 0x%lx\n",
|
|
|
|
sc->sc_dev.dv_xname, chan, nbytes);
|
|
|
|
goto lose;
|
|
|
|
}
|
1993-10-14 08:22:57 +03:00
|
|
|
}
|
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
dmam = sc->sc_dmamaps[chan];
|
1997-08-30 21:33:49 +04:00
|
|
|
if (dmam == NULL)
|
|
|
|
panic("isa_dmastart: no DMA map for chan %d\n", chan);
|
1997-05-29 00:02:39 +04:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
error = bus_dmamap_load(sc->sc_dmat, dmam, addr, nbytes,
|
|
|
|
p, busdmaflags);
|
|
|
|
if (error)
|
|
|
|
return (error);
|
1993-10-14 08:22:57 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
#ifdef ISADMA_DEBUG
|
|
|
|
__asm(".globl isa_dmastart_afterload ; isa_dmastart_afterload:");
|
|
|
|
#endif
|
|
|
|
|
|
|
|
if (flags & DMAMODE_READ) {
|
|
|
|
bus_dmamap_sync(sc->sc_dmat, dmam, BUS_DMASYNC_PREREAD);
|
|
|
|
sc->sc_dmareads |= (1 << chan);
|
|
|
|
} else {
|
|
|
|
bus_dmamap_sync(sc->sc_dmat, dmam, BUS_DMASYNC_PREWRITE);
|
|
|
|
sc->sc_dmareads &= ~(1 << chan);
|
|
|
|
}
|
|
|
|
|
|
|
|
dmaaddr = dmam->dm_segs[0].ds_addr;
|
|
|
|
|
|
|
|
#ifdef ISADMA_DEBUG
|
|
|
|
printf(" dmaaddr 0x%lx\n", dmaaddr);
|
|
|
|
|
|
|
|
__asm(".globl isa_dmastart_aftersync ; isa_dmastart_aftersync:");
|
|
|
|
#endif
|
|
|
|
|
|
|
|
sc->sc_dmalength[chan] = nbytes;
|
|
|
|
|
|
|
|
isa_dmamask(sc, chan);
|
|
|
|
sc->sc_dmafinished &= ~(1 << chan);
|
1996-02-22 09:21:48 +03:00
|
|
|
|
1993-10-14 08:22:57 +03:00
|
|
|
if ((chan & 4) == 0) {
|
1997-03-21 05:17:11 +03:00
|
|
|
/* set dma channel mode */
|
1997-06-07 03:43:45 +04:00
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dma1h, DMA1_MODE,
|
|
|
|
ochan | dmamode[flags]);
|
1993-10-14 08:22:57 +03:00
|
|
|
|
|
|
|
/* send start address */
|
1997-03-21 05:17:11 +03:00
|
|
|
waport = DMA1_CHN(ochan);
|
1997-06-07 03:43:45 +04:00
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dmapgh,
|
|
|
|
dmapageport[0][ochan], (dmaaddr >> 16) & 0xff);
|
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport,
|
|
|
|
dmaaddr & 0xff);
|
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport,
|
|
|
|
(dmaaddr >> 8) & 0xff);
|
1993-10-14 08:22:57 +03:00
|
|
|
|
|
|
|
/* send count */
|
1997-06-07 03:43:45 +04:00
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1,
|
|
|
|
(--nbytes) & 0xff);
|
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1,
|
|
|
|
(nbytes >> 8) & 0xff);
|
1993-10-14 08:22:57 +03:00
|
|
|
} else {
|
1997-03-21 05:17:11 +03:00
|
|
|
/* set dma channel mode */
|
1997-06-07 03:43:45 +04:00
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dma2h, DMA2_MODE,
|
|
|
|
ochan | dmamode[flags]);
|
1993-10-14 08:22:57 +03:00
|
|
|
|
|
|
|
/* send start address */
|
1997-03-21 05:17:11 +03:00
|
|
|
waport = DMA2_CHN(ochan);
|
1997-06-07 03:43:45 +04:00
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dmapgh,
|
|
|
|
dmapageport[1][ochan], (dmaaddr >> 16) & 0xff);
|
|
|
|
dmaaddr >>= 1;
|
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport,
|
|
|
|
dmaaddr & 0xff);
|
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport,
|
|
|
|
(dmaaddr >> 8) & 0xff);
|
1993-10-14 08:22:57 +03:00
|
|
|
|
|
|
|
/* send count */
|
|
|
|
nbytes >>= 1;
|
1997-06-07 03:43:45 +04:00
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2,
|
|
|
|
(--nbytes) & 0xff);
|
|
|
|
bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2,
|
|
|
|
(nbytes >> 8) & 0xff);
|
1993-10-14 08:22:57 +03:00
|
|
|
}
|
1997-03-21 05:17:11 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
isa_dmaunmask(sc, chan);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
lose:
|
|
|
|
panic("isa_dmastart");
|
1993-10-14 08:22:57 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
1997-06-07 03:43:45 +04:00
|
|
|
isa_dmaabort(isadev, chan)
|
|
|
|
struct device *isadev;
|
1993-10-22 23:24:14 +03:00
|
|
|
int chan;
|
1993-10-14 08:22:57 +03:00
|
|
|
{
|
1997-06-07 03:43:45 +04:00
|
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
1993-10-14 08:22:57 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
if (chan < 0 || chan > 7) {
|
|
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
|
|
panic("isa_dmaabort");
|
|
|
|
}
|
1997-03-21 03:00:21 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
isa_dmamask(sc, chan);
|
|
|
|
bus_dmamap_unload(sc->sc_dmat, sc->sc_dmamaps[chan]);
|
|
|
|
sc->sc_dmareads &= ~(1 << chan);
|
1997-03-21 03:00:21 +03:00
|
|
|
}
|
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
bus_size_t
|
|
|
|
isa_dmacount(isadev, chan)
|
|
|
|
struct device *isadev;
|
1997-03-21 03:00:21 +03:00
|
|
|
int chan;
|
|
|
|
{
|
1997-06-07 03:43:45 +04:00
|
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
1997-03-21 03:00:21 +03:00
|
|
|
int waport;
|
1997-06-07 03:43:45 +04:00
|
|
|
bus_size_t nbytes;
|
1997-03-21 05:17:11 +03:00
|
|
|
int ochan = chan & 3;
|
1997-03-21 03:00:21 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
if (chan < 0 || chan > 7) {
|
|
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
|
|
panic("isa_dmacount");
|
|
|
|
}
|
1997-03-21 03:00:21 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
isa_dmamask(sc, chan);
|
1997-03-21 03:00:21 +03:00
|
|
|
|
1997-05-29 00:02:39 +04:00
|
|
|
/*
|
|
|
|
* We have to shift the byte count by 1. If we're in auto-initialize
|
|
|
|
* mode, the count may have wrapped around to the initial value. We
|
|
|
|
* can't use the TC bit to check for this case, so instead we compare
|
|
|
|
* against the original byte count.
|
|
|
|
* If we're not in auto-initialize mode, then the count will wrap to
|
|
|
|
* -1, so we also handle that case.
|
|
|
|
*/
|
|
|
|
if ((chan & 4) == 0) {
|
|
|
|
waport = DMA1_CHN(ochan);
|
1997-06-07 03:43:45 +04:00
|
|
|
nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma1h,
|
|
|
|
waport + 1) + 1;
|
|
|
|
nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma1h,
|
|
|
|
waport + 1) << 8;
|
1997-05-29 00:02:39 +04:00
|
|
|
nbytes &= 0xffff;
|
|
|
|
} else {
|
|
|
|
waport = DMA2_CHN(ochan);
|
1997-06-07 03:43:45 +04:00
|
|
|
nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma2h,
|
|
|
|
waport + 2) + 1;
|
|
|
|
nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma2h,
|
|
|
|
waport + 2) << 8;
|
1997-05-29 00:02:39 +04:00
|
|
|
nbytes <<= 1;
|
|
|
|
nbytes &= 0x1ffff;
|
|
|
|
}
|
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
if (nbytes == sc->sc_dmalength[chan])
|
1997-03-21 05:17:11 +03:00
|
|
|
nbytes = 0;
|
1997-03-21 03:00:21 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
isa_dmaunmask(sc, chan);
|
1997-03-21 03:00:21 +03:00
|
|
|
return (nbytes);
|
1993-10-14 08:22:57 +03:00
|
|
|
}
|
|
|
|
|
1996-02-20 07:17:05 +03:00
|
|
|
int
|
1997-06-07 03:43:45 +04:00
|
|
|
isa_dmafinished(isadev, chan)
|
|
|
|
struct device *isadev;
|
1994-04-23 02:58:50 +04:00
|
|
|
int chan;
|
1993-10-14 08:22:57 +03:00
|
|
|
{
|
1997-06-07 03:43:45 +04:00
|
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
1993-10-14 08:22:57 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
if (chan < 0 || chan > 7) {
|
|
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
|
|
panic("isa_dmafinished");
|
|
|
|
}
|
1993-10-14 08:22:57 +03:00
|
|
|
|
|
|
|
/* check that the terminal count was reached */
|
|
|
|
if ((chan & 4) == 0)
|
1997-06-07 03:43:45 +04:00
|
|
|
sc->sc_dmafinished |= bus_space_read_1(sc->sc_iot,
|
|
|
|
sc->sc_dma1h, DMA1_SR) & 0x0f;
|
1993-10-14 08:22:57 +03:00
|
|
|
else
|
1997-06-07 03:43:45 +04:00
|
|
|
sc->sc_dmafinished |= (bus_space_read_1(sc->sc_iot,
|
|
|
|
sc->sc_dma2h, DMA2_SR) & 0x0f) << 4;
|
1996-02-22 09:21:48 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
return ((sc->sc_dmafinished & (1 << chan)) != 0);
|
1996-02-20 07:17:05 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
1997-06-07 03:43:45 +04:00
|
|
|
isa_dmadone(isadev, chan)
|
|
|
|
struct device *isadev;
|
1996-02-20 07:17:05 +03:00
|
|
|
int chan;
|
|
|
|
{
|
1997-06-07 03:43:45 +04:00
|
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
|
|
bus_dmamap_t dmam;
|
1996-02-20 07:17:05 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
if (chan < 0 || chan > 7) {
|
|
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
|
|
panic("isa_dmadone");
|
|
|
|
}
|
1994-04-23 02:58:50 +04:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
dmam = sc->sc_dmamaps[chan];
|
1997-03-21 05:17:11 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
isa_dmamask(sc, chan);
|
1996-02-22 09:21:48 +03:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
if (isa_dmafinished(isadev, chan) == 0)
|
|
|
|
printf("%s: isa_dmadone: channel %d not finished\n",
|
|
|
|
sc->sc_dev.dv_xname, chan);
|
|
|
|
|
|
|
|
bus_dmamap_sync(sc->sc_dmat, dmam,
|
|
|
|
(sc->sc_dmareads & (1 << chan)) ? BUS_DMASYNC_POSTREAD :
|
|
|
|
BUS_DMASYNC_POSTWRITE);
|
|
|
|
|
|
|
|
bus_dmamap_unload(sc->sc_dmat, dmam);
|
|
|
|
sc->sc_dmareads &= ~(1 << chan);
|
1993-10-14 08:22:57 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
1997-06-07 03:43:45 +04:00
|
|
|
isa_dmamem_alloc(isadev, chan, size, addrp, flags)
|
|
|
|
struct device *isadev;
|
1993-10-22 23:24:14 +03:00
|
|
|
int chan;
|
1997-06-07 03:43:45 +04:00
|
|
|
bus_size_t size;
|
|
|
|
bus_addr_t *addrp;
|
|
|
|
int flags;
|
1993-10-14 08:22:57 +03:00
|
|
|
{
|
1997-06-07 03:43:45 +04:00
|
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
|
|
bus_dma_segment_t seg;
|
|
|
|
int error, boundary, rsegs;
|
|
|
|
|
|
|
|
if (chan < 0 || chan > 7) {
|
|
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
|
|
panic("isa_dmamem_alloc");
|
1993-10-14 08:22:57 +03:00
|
|
|
}
|
1997-06-07 03:43:45 +04:00
|
|
|
|
|
|
|
boundary = (chan & 4) ? (1 << 17) : (1 << 16);
|
|
|
|
|
|
|
|
size = round_page(size);
|
|
|
|
|
|
|
|
error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, boundary,
|
|
|
|
&seg, 1, &rsegs, flags);
|
|
|
|
if (error)
|
|
|
|
return (error);
|
|
|
|
|
|
|
|
*addrp = seg.ds_addr;
|
|
|
|
return (0);
|
1993-10-14 08:22:57 +03:00
|
|
|
}
|
1994-04-23 02:58:50 +04:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
void
|
|
|
|
isa_dmamem_free(isadev, chan, addr, size)
|
|
|
|
struct device *isadev;
|
|
|
|
int chan;
|
|
|
|
bus_addr_t addr;
|
|
|
|
bus_size_t size;
|
|
|
|
{
|
|
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
|
|
bus_dma_segment_t seg;
|
1994-04-23 02:58:50 +04:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
if (chan < 0 || chan > 7) {
|
|
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
|
|
panic("isa_dmamem_free");
|
|
|
|
}
|
1994-04-23 02:58:50 +04:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
seg.ds_addr = addr;
|
|
|
|
seg.ds_len = size;
|
|
|
|
|
|
|
|
bus_dmamem_free(sc->sc_dmat, &seg, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
isa_dmamem_map(isadev, chan, addr, size, kvap, flags)
|
|
|
|
struct device *isadev;
|
|
|
|
int chan;
|
|
|
|
bus_addr_t addr;
|
|
|
|
bus_size_t size;
|
|
|
|
caddr_t *kvap;
|
|
|
|
int flags;
|
1996-04-30 00:02:32 +04:00
|
|
|
{
|
1997-06-07 03:43:45 +04:00
|
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
|
|
bus_dma_segment_t seg;
|
|
|
|
|
|
|
|
if (chan < 0 || chan > 7) {
|
|
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
|
|
panic("isa_dmamem_map");
|
1994-04-23 02:58:50 +04:00
|
|
|
}
|
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
seg.ds_addr = addr;
|
|
|
|
seg.ds_len = size;
|
|
|
|
|
|
|
|
return (bus_dmamem_map(sc->sc_dmat, &seg, 1, size, kvap, flags));
|
1994-04-23 02:58:50 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
1997-06-07 03:43:45 +04:00
|
|
|
isa_dmamem_unmap(isadev, chan, kva, size)
|
|
|
|
struct device *isadev;
|
|
|
|
int chan;
|
|
|
|
caddr_t kva;
|
|
|
|
size_t size;
|
1996-04-30 00:02:32 +04:00
|
|
|
{
|
1997-06-07 03:43:45 +04:00
|
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
1994-04-23 02:58:50 +04:00
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
if (chan < 0 || chan > 7) {
|
|
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
|
|
panic("isa_dmamem_unmap");
|
1994-04-23 02:58:50 +04:00
|
|
|
}
|
1997-06-07 03:43:45 +04:00
|
|
|
|
|
|
|
bus_dmamem_unmap(sc->sc_dmat, kva, size);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
isa_dmamem_mmap(isadev, chan, addr, size, off, prot, flags)
|
|
|
|
struct device *isadev;
|
|
|
|
int chan;
|
|
|
|
bus_addr_t addr;
|
|
|
|
bus_size_t size;
|
|
|
|
int off, prot, flags;
|
|
|
|
{
|
|
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
|
|
bus_dma_segment_t seg;
|
|
|
|
|
|
|
|
if (chan < 0 || chan > 7) {
|
|
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
|
|
panic("isa_dmamem_mmap");
|
|
|
|
}
|
|
|
|
|
|
|
|
seg.ds_addr = addr;
|
|
|
|
seg.ds_len = size;
|
|
|
|
|
|
|
|
return (bus_dmamem_mmap(sc->sc_dmat, &seg, 1, off, prot, flags));
|
1994-04-23 02:58:50 +04:00
|
|
|
}
|
1997-07-27 05:16:32 +04:00
|
|
|
|
1997-08-05 02:13:32 +04:00
|
|
|
int
|
|
|
|
isa_drq_isfree(isadev, chan)
|
|
|
|
struct device *isadev;
|
|
|
|
int chan;
|
|
|
|
{
|
|
|
|
struct isa_softc *sc = (struct isa_softc *)isadev;
|
|
|
|
if (chan < 0 || chan > 7) {
|
|
|
|
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
|
|
|
|
panic("isa_drq_isfree");
|
|
|
|
}
|
|
|
|
return ISA_DRQ_ISFREE(sc, chan);
|
|
|
|
}
|
|
|
|
|
1997-07-27 05:16:32 +04:00
|
|
|
void *
|
|
|
|
isa_malloc(isadev, chan, size, pool, flags)
|
|
|
|
struct device *isadev;
|
|
|
|
int chan;
|
|
|
|
size_t size;
|
|
|
|
int pool;
|
|
|
|
int flags;
|
|
|
|
{
|
|
|
|
bus_addr_t addr;
|
|
|
|
caddr_t kva;
|
|
|
|
int bflags;
|
|
|
|
struct isa_mem *m;
|
|
|
|
|
|
|
|
bflags = flags & M_WAITOK ? BUS_DMA_WAITOK : BUS_DMA_NOWAIT;
|
|
|
|
|
|
|
|
if (isa_dmamem_alloc(isadev, chan, size, &addr, bflags))
|
|
|
|
return 0;
|
|
|
|
if (isa_dmamem_map(isadev, chan, addr, size, &kva, bflags)) {
|
|
|
|
isa_dmamem_free(isadev, chan, addr, size);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
m = malloc(sizeof(*m), pool, flags);
|
|
|
|
if (m == 0) {
|
|
|
|
isa_dmamem_unmap(isadev, chan, kva, size);
|
|
|
|
isa_dmamem_free(isadev, chan, addr, size);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
m->isadev = isadev;
|
|
|
|
m->chan = chan;
|
|
|
|
m->size = size;
|
|
|
|
m->addr = addr;
|
|
|
|
m->kva = kva;
|
|
|
|
m->next = isa_mem_head;
|
|
|
|
isa_mem_head = m;
|
|
|
|
return (void *)kva;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
isa_free(addr, pool)
|
|
|
|
void *addr;
|
|
|
|
int pool;
|
|
|
|
{
|
|
|
|
struct isa_mem **mp, *m;
|
|
|
|
caddr_t kva = (caddr_t)addr;
|
|
|
|
|
|
|
|
for(mp = &isa_mem_head; *mp && (*mp)->kva != kva; mp = &(*mp)->next)
|
|
|
|
;
|
|
|
|
m = *mp;
|
|
|
|
if (!m) {
|
|
|
|
printf("isa_free: freeing unallocted memory\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
*mp = m->next;
|
|
|
|
isa_dmamem_unmap(m->isadev, m->chan, kva, m->size);
|
|
|
|
isa_dmamem_free(m->isadev, m->chan, m->addr, m->size);
|
|
|
|
free(m, pool);
|
|
|
|
}
|
1997-07-29 00:56:05 +04:00
|
|
|
|
|
|
|
int
|
|
|
|
isa_mappage(mem, off, prot)
|
|
|
|
void *mem;
|
|
|
|
int off;
|
|
|
|
int prot;
|
|
|
|
{
|
|
|
|
struct isa_mem *m;
|
|
|
|
|
|
|
|
for(m = isa_mem_head; m && m->kva != (caddr_t)mem; m = m->next)
|
|
|
|
;
|
|
|
|
if (!m) {
|
|
|
|
printf("isa_mappage: mapping unallocted memory\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
return isa_dmamem_mmap(m->isadev, m->chan, m->addr,
|
|
|
|
m->size, off, prot, BUS_DMA_WAITOK);
|
|
|
|
}
|