1998-08-26 17:08:44 +04:00
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/* $NetBSD: ess.c,v 1.26 1998/08/26 13:08:44 augustss Exp $ */
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1998-06-30 00:56:21 +04:00
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/*
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* Copyright 1997
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* Digital Equipment Corporation. All rights reserved.
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*
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* This software is furnished under license and may be used and
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* copied only in accordance with the following terms and conditions.
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* Subject to these conditions, you may download, copy, install,
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* use, modify and distribute this software in source and/or binary
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* form. No title or ownership is transferred hereby.
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*
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* 1) Any source code used, modified or distributed must reproduce
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* and retain this copyright notice and list of conditions as
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* they appear in the source file.
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*
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* 2) No right is granted to use any trade name, trademark, or logo of
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* Digital Equipment Corporation. Neither the "Digital Equipment
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* Corporation" name nor any trademark or logo of Digital Equipment
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* Corporation may be used to endorse or promote products derived
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* from this software without the prior written permission of
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* Digital Equipment Corporation.
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*
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* 3) This software is provided "AS-IS" and any express or implied
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* warranties, including but not limited to, any implied warranties
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* of merchantability, fitness for a particular purpose, or
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* non-infringement are disclaimed. In no event shall DIGITAL be
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* liable for any damages whatsoever, and in particular, DIGITAL
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* shall not be liable for special, indirect, consequential, or
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* incidental damages or damages for lost profits, loss of
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* revenue or loss of use, whether such damages arise in contract,
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* negligence, tort, under statute, in equity, at law or otherwise,
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* even if advised of the possibility of such damage.
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*/
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/*
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**++
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**
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** ess.c
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**
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** FACILITY:
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**
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** DIGITAL Network Appliance Reference Design (DNARD)
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**
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** MODULE DESCRIPTION:
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**
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** This module contains the device driver for the ESS
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** Technologies 1888/1887/888 sound chip. The code in sbdsp.c was
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** used as a reference point when implementing this driver.
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**
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** AUTHORS:
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**
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** Blair Fidler Software Engineering Australia
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** Gold Coast, Australia.
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**
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** CREATION DATE:
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**
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** March 10, 1997.
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**
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** MODIFICATION HISTORY:
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**
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1998-08-10 19:32:18 +04:00
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** Heavily modified by Lennart Augustsson and Charles M. Hannum for
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** bus_dma, changes to audio interface, and many bug fixes.
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1998-06-30 00:56:21 +04:00
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**--
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <sys/proc.h>
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#include <machine/cpu.h>
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#include <machine/intr.h>
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1998-08-04 17:14:42 +04:00
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#include <machine/bus.h>
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1998-06-30 00:56:21 +04:00
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#include <sys/audioio.h>
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#include <dev/audio_if.h>
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#include <dev/auconv.h>
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#include <dev/mulaw.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isadmavar.h>
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#include <dev/isa/essvar.h>
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#include <dev/isa/essreg.h>
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#ifdef AUDIO_DEBUG
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#define DPRINTF(x) if (essdebug) printf x
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1998-07-30 18:11:42 +04:00
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#define DPRINTFN(n,x) if (essdebug>(n)) printf x
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1998-06-30 00:56:21 +04:00
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int essdebug = 0;
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#else
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#define DPRINTF(x)
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1998-07-30 18:11:42 +04:00
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#define DPRINTFN(n,x)
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1998-06-30 00:56:21 +04:00
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#endif
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1998-07-30 18:11:42 +04:00
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#if 0
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unsigned uuu;
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#define EREAD1(t, h, a) (uuu=bus_space_read_1(t, h, a),printf("EREAD %02x=%02x\n", ((int)h&0xfff)+a, uuu),uuu)
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#define EWRITE1(t, h, a, d) (printf("EWRITE %02x=%02x\n", ((int)h & 0xfff)+a, d), bus_space_write_1(t, h, a, d))
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#else
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#define EREAD1(t, h, a) bus_space_read_1(t, h, a)
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#define EWRITE1(t, h, a, d) bus_space_write_1(t, h, a, d)
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#endif
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1998-06-30 00:56:21 +04:00
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1998-07-30 18:11:42 +04:00
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int ess_setup_sc __P((struct ess_softc *, int));
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1998-06-30 00:56:21 +04:00
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int ess_open __P((void *, int));
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void ess_close __P((void *));
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int ess_getdev __P((void *, struct audio_device *));
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int ess_drain __P((void *));
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int ess_query_encoding __P((void *, struct audio_encoding *));
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int ess_set_params __P((void *, int, int, struct audio_params *,
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1998-08-10 19:32:18 +04:00
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struct audio_params *));
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1998-06-30 00:56:21 +04:00
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int ess_round_blocksize __P((void *, int));
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1998-08-10 19:32:18 +04:00
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int ess_trigger_output __P((void *, void *, void *, int, void (*)(void *),
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void *, struct audio_params *));
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int ess_trigger_input __P((void *, void *, void *, int, void (*)(void *),
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void *, struct audio_params *));
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1998-06-30 00:56:21 +04:00
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int ess_halt_output __P((void *));
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int ess_halt_input __P((void *));
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int ess_intr_output __P((void *));
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int ess_intr_input __P((void *));
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int ess_speaker_ctl __P((void *, int));
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int ess_getdev __P((void *, struct audio_device *));
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int ess_set_port __P((void *, mixer_ctrl_t *));
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int ess_get_port __P((void *, mixer_ctrl_t *));
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1998-07-31 19:17:17 +04:00
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void *ess_malloc __P((void *, unsigned long, int, int));
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void ess_free __P((void *, void *, int));
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unsigned long ess_round __P((void *, unsigned long));
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int ess_mappage __P((void *, void *, int, int));
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1998-06-30 00:56:21 +04:00
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int ess_query_devinfo __P((void *, mixer_devinfo_t *));
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int ess_get_props __P((void *));
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1998-07-31 19:17:17 +04:00
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void ess_speaker_on __P((struct ess_softc *));
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void ess_speaker_off __P((struct ess_softc *));
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1998-06-30 00:56:21 +04:00
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int ess_config_addr __P((struct ess_softc *));
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1998-07-31 19:17:17 +04:00
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void ess_config_irq __P((struct ess_softc *));
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void ess_config_drq __P((struct ess_softc *));
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void ess_setup __P((struct ess_softc *));
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1998-06-30 00:56:21 +04:00
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int ess_identify __P((struct ess_softc *));
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int ess_reset __P((struct ess_softc *));
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void ess_set_gain __P((struct ess_softc *, int, int));
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int ess_set_in_ports __P((struct ess_softc *, int));
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u_int ess_srtotc __P((u_int));
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u_int ess_srtofc __P((u_int));
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u_char ess_get_dsp_status __P((struct ess_softc *));
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u_char ess_dsp_read_ready __P((struct ess_softc *));
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u_char ess_dsp_write_ready __P((struct ess_softc *sc));
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int ess_rdsp __P((struct ess_softc *));
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int ess_wdsp __P((struct ess_softc *, u_char));
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u_char ess_read_x_reg __P((struct ess_softc *, u_char));
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int ess_write_x_reg __P((struct ess_softc *, u_char, u_char));
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void ess_clear_xreg_bits __P((struct ess_softc *, u_char, u_char));
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void ess_set_xreg_bits __P((struct ess_softc *, u_char, u_char));
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u_char ess_read_mix_reg __P((struct ess_softc *, u_char));
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void ess_write_mix_reg __P((struct ess_softc *, u_char, u_char));
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void ess_clear_mreg_bits __P((struct ess_softc *, u_char, u_char));
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void ess_set_mreg_bits __P((struct ess_softc *, u_char, u_char));
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static char *essmodel[] = {
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"unsupported",
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"1888",
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"1887",
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"888"
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};
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struct audio_device ess_device = {
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"ESS Technology",
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"x",
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"ess"
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};
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/*
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* Define our interface to the higher level audio driver.
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*/
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struct audio_hw_if ess_hw_if = {
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ess_open,
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ess_close,
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1998-08-04 17:14:42 +04:00
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ess_drain,
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1998-06-30 00:56:21 +04:00
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ess_query_encoding,
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ess_set_params,
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ess_round_blocksize,
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NULL,
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1998-08-10 19:32:18 +04:00
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NULL,
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NULL,
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NULL,
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NULL,
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1998-06-30 00:56:21 +04:00
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ess_halt_output,
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ess_halt_input,
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ess_speaker_ctl,
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ess_getdev,
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NULL,
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ess_set_port,
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ess_get_port,
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ess_query_devinfo,
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1998-07-31 19:17:17 +04:00
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ess_malloc,
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ess_free,
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ess_round,
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ess_mappage,
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1998-06-30 00:56:21 +04:00
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ess_get_props,
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1998-08-10 19:32:18 +04:00
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ess_trigger_output,
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ess_trigger_input,
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1998-06-30 00:56:21 +04:00
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};
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#ifdef AUDIO_DEBUG
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void ess_printsc __P((struct ess_softc *));
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void ess_dump_mixer __P((struct ess_softc *));
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void
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ess_printsc(sc)
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struct ess_softc *sc;
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{
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int i;
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printf("open %d iobase 0x%x outport %u inport %u speaker %s\n",
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(int)sc->sc_open, sc->sc_iobase, sc->out_port,
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sc->in_port, sc->spkr_state ? "on" : "off");
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printf("play: dmachan %d irq %d nintr %lu intr %p arg %p\n",
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sc->sc_out.drq, sc->sc_out.irq, sc->sc_out.nintr,
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sc->sc_out.intr, sc->sc_out.arg);
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printf("record: dmachan %d irq %d nintr %lu intr %p arg %p\n",
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sc->sc_in.drq, sc->sc_in.irq, sc->sc_in.nintr,
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sc->sc_in.intr, sc->sc_in.arg);
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printf("gain:");
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for (i = 0; i < ESS_NDEVS; i++)
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printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]);
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printf("\n");
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}
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void
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ess_dump_mixer(sc)
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struct ess_softc *sc;
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{
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printf("ESS_DAC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
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0x7C, ess_read_mix_reg(sc, 0x7C));
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printf("ESS_MIC_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
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0x1A, ess_read_mix_reg(sc, 0x1A));
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printf("ESS_LINE_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
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0x3E, ess_read_mix_reg(sc, 0x3E));
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printf("ESS_SYNTH_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
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0x36, ess_read_mix_reg(sc, 0x36));
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printf("ESS_CD_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
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0x38, ess_read_mix_reg(sc, 0x38));
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printf("ESS_AUXB_PLAY_VOL: mix reg 0x%02x=0x%02x\n",
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0x3A, ess_read_mix_reg(sc, 0x3A));
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printf("ESS_MASTER_VOL: mix reg 0x%02x=0x%02x\n",
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0x32, ess_read_mix_reg(sc, 0x32));
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printf("ESS_PCSPEAKER_VOL: mix reg 0x%02x=0x%02x\n",
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0x3C, ess_read_mix_reg(sc, 0x3C));
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printf("ESS_DAC_REC_VOL: mix reg 0x%02x=0x%02x\n",
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0x69, ess_read_mix_reg(sc, 0x69));
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printf("ESS_MIC_REC_VOL: mix reg 0x%02x=0x%02x\n",
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0x68, ess_read_mix_reg(sc, 0x68));
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printf("ESS_LINE_REC_VOL: mix reg 0x%02x=0x%02x\n",
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0x6E, ess_read_mix_reg(sc, 0x6E));
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printf("ESS_SYNTH_REC_VOL: mix reg 0x%02x=0x%02x\n",
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0x6B, ess_read_mix_reg(sc, 0x6B));
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printf("ESS_CD_REC_VOL: mix reg 0x%02x=0x%02x\n",
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0x6A, ess_read_mix_reg(sc, 0x6A));
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printf("ESS_AUXB_REC_VOL: mix reg 0x%02x=0x%02x\n",
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0x6C, ess_read_mix_reg(sc, 0x6C));
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printf("ESS_RECORD_VOL: x reg 0x%02x=0x%02x\n",
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0xB4, ess_read_x_reg(sc, 0xB4));
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printf("Audio 1 play vol (unused): mix reg 0x%02x=0x%02x\n",
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0x14, ess_read_mix_reg(sc, 0x14));
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printf("ESS_MIC_PREAMP: x reg 0x%02x=0x%02x\n",
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ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL));
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printf("ESS_RECORD_MONITOR: x reg 0x%02x=0x%02x\n",
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ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL));
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printf("Record source: mix reg 0x%02x=0x%02x, 0x%02x=0x%02x\n",
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0x1c, ess_read_mix_reg(sc, 0x1c),
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0x7a, ess_read_mix_reg(sc, 0x7a));
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}
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#endif
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/*
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* Configure the ESS chip for the desired audio base address.
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*/
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int
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ess_config_addr(sc)
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struct ess_softc *sc;
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{
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int iobase = sc->sc_iobase;
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bus_space_tag_t iot = sc->sc_iot;
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/*
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* Configure using the System Control Register method. This
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* method is used when the AMODE line is tied high, which is
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* the case for the Shark, but not for the evaluation board.
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|
*/
|
|
|
|
|
|
|
|
bus_space_handle_t scr_access_ioh;
|
|
|
|
bus_space_handle_t scr_ioh;
|
|
|
|
u_short scr_value;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set the SCR bit to enable audio.
|
|
|
|
*/
|
|
|
|
scr_value = ESS_SCR_AUDIO_ENABLE;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set the SCR bits necessary to select the specified audio
|
|
|
|
* base address.
|
|
|
|
*/
|
|
|
|
switch(iobase) {
|
|
|
|
case 0x220:
|
|
|
|
scr_value |= ESS_SCR_AUDIO_220;
|
|
|
|
break;
|
|
|
|
case 0x230:
|
|
|
|
scr_value |= ESS_SCR_AUDIO_230;
|
|
|
|
break;
|
|
|
|
case 0x240:
|
|
|
|
scr_value |= ESS_SCR_AUDIO_240;
|
|
|
|
break;
|
|
|
|
case 0x250:
|
|
|
|
scr_value |= ESS_SCR_AUDIO_250;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
printf("ess: configured iobase 0x%x invalid\n", iobase);
|
|
|
|
return (1);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Get a mapping for the System Control Register (SCR) access
|
|
|
|
* registers and the SCR data registers.
|
|
|
|
*/
|
|
|
|
if (bus_space_map(iot, ESS_SCR_ACCESS_BASE, ESS_SCR_ACCESS_PORTS,
|
|
|
|
0, &scr_access_ioh)) {
|
|
|
|
printf("ess: can't map SCR access registers\n");
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
if (bus_space_map(iot, ESS_SCR_BASE, ESS_SCR_PORTS,
|
|
|
|
0, &scr_ioh)) {
|
|
|
|
printf("ess: can't map SCR registers\n");
|
|
|
|
bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Unlock the SCR. */
|
1998-07-30 18:11:42 +04:00
|
|
|
EWRITE1(iot, scr_access_ioh, ESS_SCR_UNLOCK, 0);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
/* Write the base address information into SCR[0]. */
|
1998-07-30 18:11:42 +04:00
|
|
|
EWRITE1(iot, scr_ioh, ESS_SCR_INDEX, 0);
|
|
|
|
EWRITE1(iot, scr_ioh, ESS_SCR_DATA, scr_value);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
/* Lock the SCR. */
|
1998-07-30 18:11:42 +04:00
|
|
|
EWRITE1(iot, scr_access_ioh, ESS_SCR_LOCK, 0);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
/* Unmap the SCR access ports and the SCR data ports. */
|
|
|
|
bus_space_unmap(iot, scr_access_ioh, ESS_SCR_ACCESS_PORTS);
|
|
|
|
bus_space_unmap(iot, scr_ioh, ESS_SCR_PORTS);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Configure the ESS chip for the desired IRQ and DMA channels.
|
1998-07-30 18:11:42 +04:00
|
|
|
* ESS ISA
|
|
|
|
* --------
|
|
|
|
* IRQA irq9
|
|
|
|
* IRQB irq5
|
|
|
|
* IRQC irq7
|
|
|
|
* IRQD irq10
|
|
|
|
* IRQE irq15
|
1998-07-31 19:17:17 +04:00
|
|
|
*
|
1998-07-30 18:11:42 +04:00
|
|
|
* DRQA drq0
|
|
|
|
* DRQB drq1
|
|
|
|
* DRQC drq3
|
|
|
|
* DRQD drq5
|
1998-06-30 00:56:21 +04:00
|
|
|
*/
|
|
|
|
void
|
1998-07-31 19:17:17 +04:00
|
|
|
ess_config_irq(sc)
|
1998-06-30 00:56:21 +04:00
|
|
|
struct ess_softc *sc;
|
|
|
|
{
|
1998-07-31 19:17:17 +04:00
|
|
|
int v;
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
DPRINTFN(2,("ess_config_irq\n"));
|
|
|
|
|
|
|
|
if (sc->sc_in.irq != sc->sc_out.irq) {
|
|
|
|
/* Configure Audio 1 (record) for the appropriate IRQ line. */
|
|
|
|
v = ESS_IRQ_CTRL_MASK | ESS_IRQ_CTRL_EXT; /* All intrs on */
|
|
|
|
switch(sc->sc_in.irq) {
|
|
|
|
case 5:
|
|
|
|
v |= ESS_IRQ_CTRL_INTRB;
|
|
|
|
break;
|
|
|
|
case 7:
|
|
|
|
v |= ESS_IRQ_CTRL_INTRC;
|
|
|
|
break;
|
|
|
|
case 9:
|
|
|
|
v |= ESS_IRQ_CTRL_INTRA;
|
|
|
|
break;
|
|
|
|
case 10:
|
|
|
|
v |= ESS_IRQ_CTRL_INTRD;
|
|
|
|
break;
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
default:
|
|
|
|
printf("ess: configured irq %d not supported for Audio 1\n",
|
|
|
|
sc->sc_in.irq);
|
|
|
|
return;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
ess_write_x_reg(sc, ESS_XCMD_IRQ_CTRL, v);
|
|
|
|
/* irq2 is hardwired to 15 in this mode */
|
|
|
|
ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
|
|
|
|
ESS_AUDIO2_CTRL2_IRQ2_ENABLE);
|
|
|
|
/* Use old method. */
|
|
|
|
ess_write_mix_reg(sc, ESS_MREG_INTR_ST, ESS_IS_ES1888);
|
|
|
|
} else {
|
|
|
|
/* Use new method, both interrupts are the same. */
|
|
|
|
v = ESS_IS_SELECT_IRQ; /* enable intrs */
|
|
|
|
switch(sc->sc_out.irq) {
|
|
|
|
case 5:
|
|
|
|
v |= ESS_IS_INTRB;
|
|
|
|
break;
|
|
|
|
case 7:
|
|
|
|
v |= ESS_IS_INTRC;
|
|
|
|
break;
|
|
|
|
case 9:
|
|
|
|
v |= ESS_IS_INTRA;
|
|
|
|
break;
|
|
|
|
case 10:
|
|
|
|
v |= ESS_IS_INTRD;
|
|
|
|
break;
|
|
|
|
case 15:
|
|
|
|
v |= ESS_IS_INTRE;
|
|
|
|
break;
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
default:
|
|
|
|
printf("ess_config_irq: configured irq %d not supported for Audio 1\n",
|
|
|
|
sc->sc_in.irq);
|
|
|
|
return;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
/* Set the IRQ */
|
|
|
|
ess_write_mix_reg(sc, ESS_MREG_INTR_ST, v);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
ess_config_drq(sc)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
{
|
|
|
|
int v;
|
|
|
|
|
|
|
|
DPRINTFN(2,("ess_config_drq\n"));
|
|
|
|
|
|
|
|
/* Configure Audio 1 (record) for DMA on the appropriate channel. */
|
|
|
|
v = ESS_DRQ_CTRL_PU | ESS_DRQ_CTRL_EXT;
|
|
|
|
switch(sc->sc_in.drq) {
|
|
|
|
case 0:
|
|
|
|
v |= ESS_DRQ_CTRL_DRQA;
|
1998-06-30 00:56:21 +04:00
|
|
|
break;
|
1998-07-31 19:17:17 +04:00
|
|
|
case 1:
|
|
|
|
v |= ESS_DRQ_CTRL_DRQB;
|
1998-06-30 00:56:21 +04:00
|
|
|
break;
|
1998-07-31 19:17:17 +04:00
|
|
|
case 3:
|
|
|
|
v |= ESS_DRQ_CTRL_DRQC;
|
1998-06-30 00:56:21 +04:00
|
|
|
break;
|
1998-07-30 18:11:42 +04:00
|
|
|
#ifdef DIAGNOSTIC
|
1998-06-30 00:56:21 +04:00
|
|
|
default:
|
1998-07-31 19:17:17 +04:00
|
|
|
printf("ess_config_drq: configured dma chan %d not supported for Audio 1\n",
|
|
|
|
sc->sc_in.drq);
|
1998-06-30 00:56:21 +04:00
|
|
|
return;
|
1998-07-31 19:17:17 +04:00
|
|
|
#endif
|
1998-08-01 03:54:09 +04:00
|
|
|
}
|
1998-07-31 19:17:17 +04:00
|
|
|
/* Set DRQ1 */
|
|
|
|
ess_write_x_reg(sc, ESS_XCMD_DRQ_CTRL, v);
|
|
|
|
|
|
|
|
/* Configure DRQ2 */
|
|
|
|
v = ESS_AUDIO2_CTRL3_DRQ_PD;
|
|
|
|
switch(sc->sc_out.drq) {
|
1998-06-30 00:56:21 +04:00
|
|
|
case 0:
|
1998-07-31 19:17:17 +04:00
|
|
|
v |= ESS_AUDIO2_CTRL3_DRQA;
|
1998-06-30 00:56:21 +04:00
|
|
|
break;
|
|
|
|
case 1:
|
1998-07-31 19:17:17 +04:00
|
|
|
v |= ESS_AUDIO2_CTRL3_DRQB;
|
1998-06-30 00:56:21 +04:00
|
|
|
break;
|
|
|
|
case 3:
|
1998-07-31 19:17:17 +04:00
|
|
|
v |= ESS_AUDIO2_CTRL3_DRQC;
|
|
|
|
break;
|
|
|
|
case 5:
|
|
|
|
v |= ESS_AUDIO2_CTRL3_DRQC;
|
1998-06-30 00:56:21 +04:00
|
|
|
break;
|
1998-07-30 18:11:42 +04:00
|
|
|
#ifdef DIAGNOSTIC
|
1998-06-30 00:56:21 +04:00
|
|
|
default:
|
1998-07-31 19:17:17 +04:00
|
|
|
printf("ess_config_drq: configured dma chan %d not supported for Audio 2\n",
|
|
|
|
sc->sc_out.drq);
|
1998-06-30 00:56:21 +04:00
|
|
|
return;
|
1998-07-30 18:11:42 +04:00
|
|
|
#endif
|
1998-08-01 03:54:09 +04:00
|
|
|
}
|
1998-07-31 19:17:17 +04:00
|
|
|
ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL3, v);
|
|
|
|
/* Enable DMA 2 */
|
|
|
|
ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
|
|
|
|
ESS_AUDIO2_CTRL2_DMA_ENABLE);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set up registers after a reset.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
ess_setup(sc)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
{
|
1998-08-09 10:52:57 +04:00
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
ess_config_irq(sc);
|
|
|
|
ess_config_drq(sc);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
DPRINTFN(2,("ess_setup: done\n"));
|
1998-07-30 18:11:42 +04:00
|
|
|
}
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Determine the model of ESS chip we are talking to. Currently we
|
|
|
|
* only support ES1888, ES1887 and ES888. The method of determining
|
|
|
|
* the chip is based on the information on page 27 of the ES1887 data
|
|
|
|
* sheet.
|
|
|
|
*
|
|
|
|
* This routine sets the values of sc->sc_model and sc->sc_version.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
ess_identify(sc)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
{
|
|
|
|
u_char reg1;
|
|
|
|
u_char reg2;
|
|
|
|
u_char reg3;
|
|
|
|
|
|
|
|
sc->sc_model = ESS_UNSUPPORTED;
|
|
|
|
sc->sc_version = 0;
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* 1. Check legacy ID bytes. These should be 0x68 0x8n, where
|
|
|
|
* n >= 8 for an ES1887 or an ES888. Other values indicate
|
|
|
|
* earlier (unsupported) chips.
|
|
|
|
*/
|
|
|
|
ess_wdsp(sc, ESS_ACMD_LEGACY_ID);
|
|
|
|
|
|
|
|
if ((reg1 = ess_rdsp(sc)) != 0x68) {
|
|
|
|
printf("ess: First ID byte wrong (0x%02x)\n", reg1);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
reg2 = ess_rdsp(sc);
|
|
|
|
if (((reg2 & 0xf0) != 0x80) ||
|
|
|
|
((reg2 & 0x0f) < 8)) {
|
|
|
|
printf("ess: Second ID byte wrong (0x%02x)\n", reg2);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Store the ID bytes as the version.
|
|
|
|
*/
|
|
|
|
sc->sc_version = (reg1 << 8) + reg2;
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* 2. Verify we can change bit 2 in mixer register 0x64. This
|
|
|
|
* should be possible on all supported chips.
|
|
|
|
*/
|
|
|
|
reg1 = ess_read_mix_reg(sc, 0x64);
|
|
|
|
reg2 = reg1 ^ 0x04; /* toggle bit 2 */
|
|
|
|
|
|
|
|
ess_write_mix_reg(sc, 0x64, reg2);
|
|
|
|
|
|
|
|
if (ess_read_mix_reg(sc, 0x64) != reg2) {
|
|
|
|
printf("ess: Hardware error (unable to toggle bit 2 of mixer register 0x64)\n");
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Restore the original value of mixer register 0x64.
|
|
|
|
*/
|
|
|
|
ess_write_mix_reg(sc, 0x64, reg1);
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
1998-07-31 19:17:17 +04:00
|
|
|
* 3. Verify we can change the value of mixer register
|
|
|
|
* ESS_MREG_SAMPLE_RATE.
|
1998-06-30 00:56:21 +04:00
|
|
|
* This should be possible on all supported chips.
|
1998-07-31 19:17:17 +04:00
|
|
|
* It is not necessary to restore the value of this mixer register.
|
1998-06-30 00:56:21 +04:00
|
|
|
*/
|
1998-07-31 19:17:17 +04:00
|
|
|
reg1 = ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE);
|
1998-06-30 00:56:21 +04:00
|
|
|
reg2 = reg1 ^ 0xff; /* toggle all bits */
|
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, reg2);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
if (ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE) != reg2) {
|
1998-06-30 00:56:21 +04:00
|
|
|
printf("ess: Hardware error (unable to change mixer register 0x70)\n");
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* 4. Determine if we can change bit 5 in mixer register 0x64.
|
|
|
|
* This determines whether we have an ES1887:
|
|
|
|
*
|
|
|
|
* - can change indicates ES1887
|
|
|
|
* - can't change indicates ES1888 or ES888
|
|
|
|
*/
|
|
|
|
reg1 = ess_read_mix_reg(sc, 0x64);
|
|
|
|
reg2 = reg1 ^ 0x20; /* toggle bit 5 */
|
|
|
|
|
|
|
|
ess_write_mix_reg(sc, 0x64, reg2);
|
|
|
|
|
|
|
|
if (ess_read_mix_reg(sc, 0x64) == reg2) {
|
|
|
|
sc->sc_model = ESS_1887;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Restore the original value of mixer register 0x64.
|
|
|
|
*/
|
|
|
|
ess_write_mix_reg(sc, 0x64, reg1);
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* 5. Determine if we can change the value of mixer
|
|
|
|
* register 0x69 independently of mixer register
|
|
|
|
* 0x68. This determines which chip we have:
|
|
|
|
*
|
|
|
|
* - can modify idependently indicates ES888
|
|
|
|
* - register 0x69 is an alias of 0x68 indicates ES1888
|
|
|
|
*/
|
|
|
|
reg1 = ess_read_mix_reg(sc, 0x68);
|
|
|
|
reg2 = ess_read_mix_reg(sc, 0x69);
|
|
|
|
reg3 = reg2 ^ 0xff; /* toggle all bits */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write different values to each register.
|
|
|
|
*/
|
|
|
|
ess_write_mix_reg(sc, 0x68, reg2);
|
|
|
|
ess_write_mix_reg(sc, 0x69, reg3);
|
|
|
|
|
|
|
|
if (ess_read_mix_reg(sc, 0x68) == reg2)
|
|
|
|
sc->sc_model = ESS_888;
|
|
|
|
else
|
|
|
|
sc->sc_model = ESS_1888;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Restore the original value of the registers.
|
|
|
|
*/
|
|
|
|
ess_write_mix_reg(sc, 0x68, reg1);
|
|
|
|
ess_write_mix_reg(sc, 0x69, reg2);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
int
|
1998-07-30 18:11:42 +04:00
|
|
|
ess_setup_sc(sc, doinit)
|
1998-06-30 00:56:21 +04:00
|
|
|
struct ess_softc *sc;
|
|
|
|
int doinit;
|
|
|
|
{
|
|
|
|
/* Reset the chip. */
|
1998-07-31 19:17:17 +04:00
|
|
|
if (ess_reset(sc) != 0) {
|
|
|
|
DPRINTF(("ess_setup_sc: couldn't reset chip\n"));
|
1998-06-30 00:56:21 +04:00
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Identify the ESS chip, and check that it is supported. */
|
|
|
|
if (ess_identify(sc)) {
|
|
|
|
DPRINTF(("ess_setup_sc: couldn't identify\n"));
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Probe for the ESS hardware.
|
|
|
|
*/
|
|
|
|
int
|
1998-07-30 18:11:42 +04:00
|
|
|
essmatch(sc)
|
|
|
|
struct ess_softc *sc;
|
1998-06-30 00:56:21 +04:00
|
|
|
{
|
1998-07-30 18:11:42 +04:00
|
|
|
if (!ESS_BASE_VALID(sc->sc_iobase)) {
|
|
|
|
printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase);
|
1998-06-30 00:56:21 +04:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
/* Configure the ESS chip for the desired audio base address. */
|
|
|
|
if (ess_config_addr(sc))
|
|
|
|
return (0);
|
|
|
|
|
1998-07-30 18:11:42 +04:00
|
|
|
if (ess_setup_sc(sc, 1))
|
|
|
|
return (0);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
if (sc->sc_model == ESS_UNSUPPORTED) {
|
|
|
|
DPRINTF(("ess: Unsupported model\n"));
|
1998-07-31 19:17:17 +04:00
|
|
|
return (0);
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Check that requested DMA channels are valid and different. */
|
1998-07-31 19:17:17 +04:00
|
|
|
if (!ESS_DRQ1_VALID(sc->sc_in.drq)) {
|
1998-06-30 00:56:21 +04:00
|
|
|
printf("ess: record dma chan %d invalid\n", sc->sc_in.drq);
|
1998-07-31 19:17:17 +04:00
|
|
|
return (0);
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
|
|
|
if (!ESS_DRQ2_VALID(sc->sc_out.drq, sc->sc_model)) {
|
|
|
|
printf("ess: play dma chan %d invalid\n", sc->sc_out.drq);
|
1998-07-31 19:17:17 +04:00
|
|
|
return (0);
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
|
|
|
if (sc->sc_in.drq == sc->sc_out.drq) {
|
|
|
|
printf("ess: play and record dma chan both %d\n",
|
|
|
|
sc->sc_in.drq);
|
1998-07-31 19:17:17 +04:00
|
|
|
return (0);
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
if (sc->sc_model == ESS_1887) {
|
|
|
|
/*
|
|
|
|
* Either use the 1887 interrupt mode with all interrupts
|
|
|
|
* mapped to the same irq, or use the 1888 method with
|
|
|
|
* irq fixed at 15.
|
|
|
|
*/
|
|
|
|
if (sc->sc_in.irq == sc->sc_out.irq) {
|
|
|
|
if (!ESS_IRQ12_VALID(sc->sc_in.irq)) {
|
|
|
|
printf("ess: irq %d invalid\n", sc->sc_in.irq);
|
|
|
|
return (0);
|
|
|
|
}
|
1998-08-07 04:51:06 +04:00
|
|
|
goto irq_not1888;
|
|
|
|
}
|
1998-07-31 19:17:17 +04:00
|
|
|
} else {
|
|
|
|
/* Must use separate interrupts */
|
|
|
|
if (sc->sc_in.irq == sc->sc_out.irq) {
|
|
|
|
printf("ess: play and record irq both %d\n",
|
|
|
|
sc->sc_in.irq);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
1998-06-30 00:56:21 +04:00
|
|
|
/* Check that requested IRQ lines are valid and different. */
|
1998-07-31 19:17:17 +04:00
|
|
|
if (!ESS_IRQ1_VALID(sc->sc_in.irq)) {
|
1998-06-30 00:56:21 +04:00
|
|
|
printf("ess: record irq %d invalid\n", sc->sc_in.irq);
|
1998-07-31 19:17:17 +04:00
|
|
|
return (0);
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
1998-07-31 19:17:17 +04:00
|
|
|
if (!ESS_IRQ2_VALID(sc->sc_out.irq)) {
|
1998-06-30 00:56:21 +04:00
|
|
|
printf("ess: play irq %d invalid\n", sc->sc_out.irq);
|
1998-07-31 19:17:17 +04:00
|
|
|
return (0);
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
1998-08-07 04:51:06 +04:00
|
|
|
irq_not1888:
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
/* Check that the DRQs are free. */
|
|
|
|
if (!isa_drq_isfree(sc->sc_ic, sc->sc_in.drq) ||
|
|
|
|
!isa_drq_isfree(sc->sc_ic, sc->sc_out.drq))
|
1998-07-31 19:17:17 +04:00
|
|
|
return (0);
|
1998-06-30 00:56:21 +04:00
|
|
|
/* XXX should we check IRQs as well? */
|
|
|
|
|
1998-07-30 18:11:42 +04:00
|
|
|
return (1);
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Attach hardware to driver, attach hardware driver to audio
|
1998-07-31 19:17:17 +04:00
|
|
|
* pseudo-device driver.
|
1998-06-30 00:56:21 +04:00
|
|
|
*/
|
|
|
|
void
|
1998-07-30 18:11:42 +04:00
|
|
|
essattach(sc)
|
|
|
|
struct ess_softc *sc;
|
1998-06-30 00:56:21 +04:00
|
|
|
{
|
1998-08-23 02:55:09 +04:00
|
|
|
struct audio_attach_args arg;
|
1998-06-30 00:56:21 +04:00
|
|
|
struct audio_params pparams, rparams;
|
|
|
|
int i;
|
|
|
|
u_int v;
|
|
|
|
|
1998-07-30 18:11:42 +04:00
|
|
|
if (ess_setup_sc(sc, 0)) {
|
1998-06-30 00:56:21 +04:00
|
|
|
printf("%s: setup failed\n", sc->sc_dev.dv_xname);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
1998-07-30 18:11:42 +04:00
|
|
|
sc->sc_out.ih = isa_intr_establish(sc->sc_ic, sc->sc_out.irq,
|
|
|
|
sc->sc_out.ist, IPL_AUDIO,
|
1998-06-30 00:56:21 +04:00
|
|
|
ess_intr_output, sc);
|
1998-07-30 18:11:42 +04:00
|
|
|
sc->sc_in.ih = isa_intr_establish(sc->sc_ic, sc->sc_in.irq,
|
|
|
|
sc->sc_in.ist, IPL_AUDIO,
|
1998-06-30 00:56:21 +04:00
|
|
|
ess_intr_input, sc);
|
|
|
|
|
|
|
|
/* Create our DMA maps. */
|
|
|
|
if (isa_dmamap_create(sc->sc_ic, sc->sc_in.drq,
|
|
|
|
MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
|
|
|
|
printf("%s: can't create map for drq %d\n",
|
|
|
|
sc->sc_dev.dv_xname, sc->sc_in.drq);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (isa_dmamap_create(sc->sc_ic, sc->sc_out.drq,
|
|
|
|
MAX_ISADMA, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
|
|
|
|
printf("%s: can't create map for drq %d\n",
|
|
|
|
sc->sc_dev.dv_xname, sc->sc_out.drq);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
printf(" ESS Technology ES%s [version 0x%04x]\n",
|
|
|
|
essmodel[sc->sc_model], sc->sc_version);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set record and play parameters to default values defined in
|
|
|
|
* generic audio driver.
|
|
|
|
*/
|
|
|
|
pparams = audio_default;
|
|
|
|
rparams = audio_default;
|
|
|
|
ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams);
|
|
|
|
|
|
|
|
/* Do a hardware reset on the mixer. */
|
|
|
|
ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set volume of Audio 1 to zero and disable Audio 1 DAC input
|
|
|
|
* to playback mixer, since playback is always through Audio 2.
|
|
|
|
*/
|
|
|
|
ess_write_mix_reg(sc, 0x14, 0);
|
|
|
|
ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set hardware record source to use output of the record
|
|
|
|
* mixer. We do the selection of record source in software by
|
|
|
|
* setting the gain of the unused sources to zero. (See
|
|
|
|
* ess_set_in_ports.)
|
|
|
|
*/
|
|
|
|
ess_set_mreg_bits(sc, 0x1c, 0x07);
|
|
|
|
ess_clear_mreg_bits(sc, 0x7a, 0x10);
|
|
|
|
ess_set_mreg_bits(sc, 0x7a, 0x08);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set gain on each mixer device to a sensible value.
|
|
|
|
* Devices not normally used are turned off, and other devices
|
1998-08-26 16:10:22 +04:00
|
|
|
* are set to 50% volume.
|
1998-06-30 00:56:21 +04:00
|
|
|
*/
|
|
|
|
for (i = 0; i < ESS_NDEVS; i++) {
|
|
|
|
switch(i) {
|
|
|
|
case ESS_MIC_PLAY_VOL:
|
|
|
|
case ESS_LINE_PLAY_VOL:
|
|
|
|
case ESS_CD_PLAY_VOL:
|
|
|
|
case ESS_AUXB_PLAY_VOL:
|
|
|
|
case ESS_DAC_REC_VOL:
|
|
|
|
case ESS_LINE_REC_VOL:
|
|
|
|
case ESS_SYNTH_REC_VOL:
|
|
|
|
case ESS_CD_REC_VOL:
|
|
|
|
case ESS_AUXB_REC_VOL:
|
|
|
|
v = 0;
|
|
|
|
break;
|
|
|
|
default:
|
1998-08-26 16:10:22 +04:00
|
|
|
v = ESS_4BIT_GAIN(AUDIO_MAX_GAIN / 2);
|
1998-06-30 00:56:21 +04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v;
|
|
|
|
ess_set_gain(sc, i, 1);
|
|
|
|
}
|
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
ess_setup(sc);
|
1998-07-30 18:11:42 +04:00
|
|
|
|
1998-06-30 00:56:21 +04:00
|
|
|
/* Disable the speaker until the device is opened. */
|
|
|
|
ess_speaker_off(sc);
|
|
|
|
sc->spkr_state = SPKR_OFF;
|
|
|
|
|
|
|
|
sprintf(ess_device.name, "ES%s", essmodel[sc->sc_model]);
|
|
|
|
sprintf(ess_device.version, "0x%04x", sc->sc_version);
|
|
|
|
|
1998-08-18 01:16:09 +04:00
|
|
|
audio_attach_mi(&ess_hw_if, sc, &sc->sc_dev);
|
1998-07-30 18:11:42 +04:00
|
|
|
|
1998-08-23 02:55:09 +04:00
|
|
|
arg.type = AUDIODEV_TYPE_OPL;
|
|
|
|
arg.hwif = 0;
|
|
|
|
arg.hdl = 0;
|
|
|
|
(void)config_found(&sc->sc_dev, &arg, audioprint);
|
|
|
|
|
1998-07-30 18:11:42 +04:00
|
|
|
#ifdef AUDIO_DEBUG
|
1998-08-26 17:08:44 +04:00
|
|
|
if (essdebug > 0)
|
|
|
|
ess_printsc(sc);
|
1998-07-30 18:11:42 +04:00
|
|
|
#endif
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Various routines to interface to higher level audio driver
|
|
|
|
*/
|
|
|
|
|
|
|
|
int
|
|
|
|
ess_open(addr, flags)
|
|
|
|
void *addr;
|
|
|
|
int flags;
|
|
|
|
{
|
|
|
|
struct ess_softc *sc = addr;
|
|
|
|
|
|
|
|
DPRINTF(("ess_open: sc=%p\n", sc));
|
|
|
|
|
|
|
|
if (sc->sc_open != 0 || ess_reset(sc) != 0)
|
|
|
|
return ENXIO;
|
|
|
|
|
1998-08-04 17:14:42 +04:00
|
|
|
ess_setup(sc); /* because we did a reset */
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
sc->sc_open = 1;
|
|
|
|
|
|
|
|
DPRINTF(("ess_open: opened\n"));
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
ess_close(addr)
|
|
|
|
void *addr;
|
|
|
|
{
|
|
|
|
struct ess_softc *sc = addr;
|
|
|
|
|
|
|
|
DPRINTF(("ess_close: sc=%p\n", sc));
|
|
|
|
|
|
|
|
sc->sc_open = 0;
|
|
|
|
ess_speaker_off(sc);
|
|
|
|
sc->spkr_state = SPKR_OFF;
|
|
|
|
ess_halt_output(sc);
|
|
|
|
ess_halt_input(sc);
|
1998-08-04 17:14:42 +04:00
|
|
|
sc->sc_in.intr = 0;
|
|
|
|
sc->sc_out.intr = 0;
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
DPRINTF(("ess_close: closed\n"));
|
|
|
|
}
|
|
|
|
|
1998-08-04 17:14:42 +04:00
|
|
|
/*
|
|
|
|
* Wait for FIFO to drain, and analog section to settle.
|
|
|
|
* XXX should check FIFO full bit.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
ess_drain(addr)
|
|
|
|
void *addr;
|
|
|
|
{
|
|
|
|
extern int hz; /* XXX */
|
|
|
|
|
1998-08-09 01:37:00 +04:00
|
|
|
tsleep(addr, PWAIT | PCATCH, "essdr", hz/20); /* XXX */
|
1998-08-04 17:14:42 +04:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
1998-08-26 16:10:22 +04:00
|
|
|
/* XXX should use reference count */
|
1998-07-31 19:17:17 +04:00
|
|
|
int
|
|
|
|
ess_speaker_ctl(addr, newstate)
|
|
|
|
void *addr;
|
|
|
|
int newstate;
|
|
|
|
{
|
|
|
|
struct ess_softc *sc = addr;
|
|
|
|
|
|
|
|
if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) {
|
|
|
|
ess_speaker_on(sc);
|
|
|
|
sc->spkr_state = SPKR_ON;
|
|
|
|
}
|
|
|
|
if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) {
|
|
|
|
ess_speaker_off(sc);
|
|
|
|
sc->spkr_state = SPKR_OFF;
|
|
|
|
}
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
1998-06-30 00:56:21 +04:00
|
|
|
int
|
|
|
|
ess_getdev(addr, retp)
|
|
|
|
void *addr;
|
|
|
|
struct audio_device *retp;
|
|
|
|
{
|
|
|
|
*retp = ess_device;
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ess_query_encoding(addr, fp)
|
|
|
|
void *addr;
|
|
|
|
struct audio_encoding *fp;
|
|
|
|
{
|
|
|
|
/*struct ess_softc *sc = addr;*/
|
|
|
|
|
|
|
|
switch (fp->index) {
|
|
|
|
case 0:
|
|
|
|
strcpy(fp->name, AudioEulinear);
|
|
|
|
fp->encoding = AUDIO_ENCODING_ULINEAR;
|
|
|
|
fp->precision = 8;
|
|
|
|
fp->flags = 0;
|
|
|
|
return (0);
|
|
|
|
case 1:
|
|
|
|
strcpy(fp->name, AudioEmulaw);
|
|
|
|
fp->encoding = AUDIO_ENCODING_ULAW;
|
|
|
|
fp->precision = 8;
|
|
|
|
fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
|
|
|
|
return (0);
|
|
|
|
case 2:
|
|
|
|
strcpy(fp->name, AudioEalaw);
|
1998-07-31 19:17:17 +04:00
|
|
|
fp->encoding = AUDIO_ENCODING_ALAW;
|
1998-06-30 00:56:21 +04:00
|
|
|
fp->precision = 8;
|
|
|
|
fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
|
|
|
|
return (0);
|
|
|
|
case 3:
|
1998-07-31 19:17:17 +04:00
|
|
|
strcpy(fp->name, AudioEslinear);
|
|
|
|
fp->encoding = AUDIO_ENCODING_SLINEAR;
|
1998-06-30 00:56:21 +04:00
|
|
|
fp->precision = 8;
|
|
|
|
fp->flags = 0;
|
|
|
|
return (0);
|
|
|
|
case 4:
|
|
|
|
strcpy(fp->name, AudioEslinear_le);
|
|
|
|
fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
|
|
|
|
fp->precision = 16;
|
|
|
|
fp->flags = 0;
|
|
|
|
return (0);
|
|
|
|
case 5:
|
|
|
|
strcpy(fp->name, AudioEulinear_le);
|
|
|
|
fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
|
|
|
|
fp->precision = 16;
|
|
|
|
fp->flags = 0;
|
|
|
|
return (0);
|
|
|
|
case 6:
|
|
|
|
strcpy(fp->name, AudioEslinear_be);
|
|
|
|
fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
|
|
|
|
fp->precision = 16;
|
|
|
|
fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
|
|
|
|
return (0);
|
|
|
|
case 7:
|
|
|
|
strcpy(fp->name, AudioEulinear_be);
|
|
|
|
fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
|
|
|
|
fp->precision = 16;
|
|
|
|
fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
|
|
|
|
return (0);
|
|
|
|
default:
|
|
|
|
return EINVAL;
|
|
|
|
}
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
1998-08-09 00:55:36 +04:00
|
|
|
ess_set_params(addr, setmode, usemode, play, rec)
|
1998-06-30 00:56:21 +04:00
|
|
|
void *addr;
|
1998-08-09 00:55:36 +04:00
|
|
|
int setmode, usemode;
|
|
|
|
struct audio_params *play, *rec;
|
1998-06-30 00:56:21 +04:00
|
|
|
{
|
|
|
|
struct ess_softc *sc = addr;
|
1998-08-09 00:55:36 +04:00
|
|
|
struct audio_params *p;
|
|
|
|
int mode;
|
1998-08-10 19:32:18 +04:00
|
|
|
int rate;
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
DPRINTF(("ess_set_params: set=%d use=%d\n", setmode, usemode));
|
|
|
|
|
1998-08-09 08:58:08 +04:00
|
|
|
/*
|
|
|
|
* The ES1887 manual (page 39, `Full-Duplex DMA Mode') claims that in
|
|
|
|
* full-duplex operation the sample rates must be the same for both
|
1998-08-09 08:59:55 +04:00
|
|
|
* channels. This appears to be false; the only bit in common is the
|
|
|
|
* clock source selection. However, we'll be conservative here.
|
|
|
|
* - mycroft
|
1998-08-09 08:58:08 +04:00
|
|
|
*/
|
1998-08-10 19:32:18 +04:00
|
|
|
if (play->sample_rate != rec->sample_rate &&
|
|
|
|
usemode == (AUMODE_PLAY | AUMODE_RECORD)) {
|
|
|
|
if (setmode == AUMODE_PLAY) {
|
1998-08-09 08:14:47 +04:00
|
|
|
rec->sample_rate = play->sample_rate;
|
|
|
|
setmode |= AUMODE_RECORD;
|
1998-08-10 19:32:18 +04:00
|
|
|
} else if (setmode == AUMODE_RECORD) {
|
1998-08-09 08:14:47 +04:00
|
|
|
play->sample_rate = rec->sample_rate;
|
|
|
|
setmode |= AUMODE_PLAY;
|
|
|
|
} else
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
|
1998-08-09 10:38:30 +04:00
|
|
|
for (mode = AUMODE_RECORD; mode != -1;
|
|
|
|
mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
|
1998-06-30 00:56:21 +04:00
|
|
|
if ((setmode & mode) == 0)
|
|
|
|
continue;
|
|
|
|
|
1998-08-09 00:55:36 +04:00
|
|
|
p = mode == AUMODE_PLAY ? play : rec;
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-08-09 10:38:30 +04:00
|
|
|
if (p->sample_rate < ESS_MINRATE ||
|
|
|
|
p->sample_rate > ESS_MAXRATE ||
|
|
|
|
(p->precision != 8 && p->precision != 16) ||
|
|
|
|
(p->channels != 1 && p->channels != 2))
|
|
|
|
return (EINVAL);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-08-09 10:38:30 +04:00
|
|
|
p->factor = 1;
|
|
|
|
p->sw_code = 0;
|
1998-06-30 00:56:21 +04:00
|
|
|
switch (p->encoding) {
|
|
|
|
case AUDIO_ENCODING_SLINEAR_BE:
|
|
|
|
case AUDIO_ENCODING_ULINEAR_BE:
|
|
|
|
if (p->precision == 16)
|
1998-08-09 10:38:30 +04:00
|
|
|
p->sw_code = swap_bytes;
|
|
|
|
break;
|
|
|
|
case AUDIO_ENCODING_SLINEAR_LE:
|
1998-06-30 00:56:21 +04:00
|
|
|
case AUDIO_ENCODING_ULINEAR_LE:
|
|
|
|
break;
|
|
|
|
case AUDIO_ENCODING_ULAW:
|
1998-08-09 10:38:30 +04:00
|
|
|
if (mode == AUMODE_PLAY) {
|
|
|
|
p->factor = 2;
|
|
|
|
p->sw_code = mulaw_to_ulinear16;
|
|
|
|
} else
|
|
|
|
p->sw_code = ulinear8_to_mulaw;
|
|
|
|
break;
|
1998-06-30 00:56:21 +04:00
|
|
|
case AUDIO_ENCODING_ALAW:
|
1998-08-09 10:38:30 +04:00
|
|
|
if (mode == AUMODE_PLAY) {
|
|
|
|
p->factor = 2;
|
|
|
|
p->sw_code = alaw_to_ulinear16;
|
|
|
|
} else
|
|
|
|
p->sw_code = ulinear8_to_alaw;
|
|
|
|
break;
|
1998-06-30 00:56:21 +04:00
|
|
|
default:
|
1998-08-09 10:38:30 +04:00
|
|
|
return (EINVAL);
|
|
|
|
}
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
|
|
|
|
1998-08-10 19:32:18 +04:00
|
|
|
if (usemode == AUMODE_RECORD)
|
|
|
|
rate = rec->sample_rate;
|
|
|
|
else
|
|
|
|
rate = play->sample_rate;
|
|
|
|
|
|
|
|
ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, ess_srtotc(rate));
|
|
|
|
ess_write_mix_reg(sc, ESS_MREG_FILTER_CLOCK, ess_srtofc(rate));
|
|
|
|
|
|
|
|
ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE, ess_srtotc(rate));
|
|
|
|
ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK, ess_srtofc(rate));
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
1998-08-10 19:32:18 +04:00
|
|
|
ess_trigger_output(addr, start, end, blksize, intr, arg, param)
|
1998-06-30 00:56:21 +04:00
|
|
|
void *addr;
|
1998-08-10 19:32:18 +04:00
|
|
|
void *start, *end;
|
|
|
|
int blksize;
|
|
|
|
void (*intr) __P((void *));
|
|
|
|
void *arg;
|
|
|
|
struct audio_params *param;
|
1998-06-30 00:56:21 +04:00
|
|
|
{
|
|
|
|
struct ess_softc *sc = addr;
|
|
|
|
|
1998-08-10 19:32:18 +04:00
|
|
|
DPRINTFN(1, ("ess_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
|
|
|
|
addr, start, end, blksize, intr, arg));
|
|
|
|
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
if (param->channels == 2 && (blksize & 1)) {
|
|
|
|
DPRINTF(("stereo playback odd bytes (%d)\n", blksize));
|
|
|
|
return EIO;
|
|
|
|
}
|
|
|
|
if (sc->sc_out.active)
|
|
|
|
panic("ess_trigger_output: already running");
|
|
|
|
#endif
|
1998-08-11 16:16:22 +04:00
|
|
|
sc->sc_out.active = 1;
|
1998-08-10 19:32:18 +04:00
|
|
|
|
|
|
|
sc->sc_out.intr = intr;
|
|
|
|
sc->sc_out.arg = arg;
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-08-10 19:32:18 +04:00
|
|
|
if (param->precision * param->factor == 16)
|
1998-08-09 10:38:30 +04:00
|
|
|
ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
|
|
|
|
ESS_AUDIO2_CTRL2_FIFO_SIZE);
|
|
|
|
else
|
1998-06-30 00:56:21 +04:00
|
|
|
ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
|
1998-08-09 10:38:30 +04:00
|
|
|
ESS_AUDIO2_CTRL2_FIFO_SIZE);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-08-10 19:32:18 +04:00
|
|
|
if (param->channels == 2)
|
1998-06-30 00:56:21 +04:00
|
|
|
ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
|
1998-08-09 10:38:30 +04:00
|
|
|
ESS_AUDIO2_CTRL2_CHANNELS);
|
|
|
|
else
|
1998-06-30 00:56:21 +04:00
|
|
|
ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
|
1998-08-09 10:38:30 +04:00
|
|
|
ESS_AUDIO2_CTRL2_CHANNELS);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-08-10 19:32:18 +04:00
|
|
|
if (param->encoding == AUDIO_ENCODING_SLINEAR_BE ||
|
|
|
|
param->encoding == AUDIO_ENCODING_SLINEAR_LE)
|
1998-06-30 00:56:21 +04:00
|
|
|
ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
|
1998-08-09 10:38:30 +04:00
|
|
|
ESS_AUDIO2_CTRL2_FIFO_SIGNED);
|
|
|
|
else
|
|
|
|
ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
|
|
|
|
ESS_AUDIO2_CTRL2_FIFO_SIGNED);
|
1998-08-04 17:14:42 +04:00
|
|
|
|
1998-08-10 19:32:18 +04:00
|
|
|
isa_dmastart(sc->sc_ic, sc->sc_out.drq, start, end - start, NULL,
|
|
|
|
DMAMODE_WRITE | DMAMODE_LOOP, BUS_DMA_NOWAIT);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-08-04 17:14:42 +04:00
|
|
|
if (IS16BITDRQ(sc->sc_out.drq))
|
1998-08-10 19:32:18 +04:00
|
|
|
blksize >>= 1; /* use word count for 16 bit DMA */
|
1998-08-04 17:14:42 +04:00
|
|
|
/* Program transfer count registers with 2's complement of count. */
|
1998-08-10 19:32:18 +04:00
|
|
|
blksize = -blksize;
|
|
|
|
ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, blksize);
|
|
|
|
ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, blksize >> 8);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-08-09 10:52:57 +04:00
|
|
|
if (IS16BITDRQ(sc->sc_out.drq))
|
|
|
|
ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
|
|
|
|
ESS_AUDIO2_CTRL1_XFER_SIZE);
|
|
|
|
else
|
|
|
|
ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
|
|
|
|
ESS_AUDIO2_CTRL1_XFER_SIZE);
|
|
|
|
|
|
|
|
/* Use 8 bytes per output DMA. */
|
|
|
|
ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
|
|
|
|
ESS_AUDIO2_CTRL1_DEMAND_8);
|
|
|
|
|
1998-08-04 17:14:42 +04:00
|
|
|
/* Start auto-init DMA */
|
1998-06-30 00:56:21 +04:00
|
|
|
ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
|
1998-08-04 17:14:42 +04:00
|
|
|
ESS_AUDIO2_CTRL1_DAC_ENABLE |
|
|
|
|
ESS_AUDIO2_CTRL1_FIFO_ENABLE |
|
|
|
|
ESS_AUDIO2_CTRL1_AUTO_INIT);
|
1998-08-09 06:05:52 +04:00
|
|
|
|
1998-06-30 00:56:21 +04:00
|
|
|
return (0);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
1998-08-09 06:05:52 +04:00
|
|
|
int
|
1998-08-10 19:32:18 +04:00
|
|
|
ess_trigger_input(addr, start, end, blksize, intr, arg, param)
|
1998-08-09 06:05:52 +04:00
|
|
|
void *addr;
|
1998-08-10 19:32:18 +04:00
|
|
|
void *start, *end;
|
|
|
|
int blksize;
|
|
|
|
void (*intr) __P((void *));
|
|
|
|
void *arg;
|
|
|
|
struct audio_params *param;
|
1998-08-09 06:05:52 +04:00
|
|
|
{
|
|
|
|
struct ess_softc *sc = addr;
|
|
|
|
|
1998-08-10 19:32:18 +04:00
|
|
|
DPRINTFN(1, ("ess_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
|
|
|
|
addr, start, end, blksize, intr, arg));
|
|
|
|
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
if (param->channels == 2 && (blksize & 1)) {
|
|
|
|
DPRINTF(("stereo record odd bytes (%d)\n", blksize));
|
|
|
|
return EIO;
|
|
|
|
}
|
|
|
|
if (sc->sc_in.active)
|
|
|
|
panic("ess_trigger_input: already running");
|
|
|
|
#endif
|
1998-08-11 16:16:22 +04:00
|
|
|
sc->sc_in.active = 1;
|
1998-08-09 10:38:30 +04:00
|
|
|
|
1998-08-10 19:32:18 +04:00
|
|
|
sc->sc_in.intr = intr;
|
|
|
|
sc->sc_in.arg = arg;
|
|
|
|
|
|
|
|
if (param->precision * param->factor == 16)
|
1998-08-09 10:38:30 +04:00
|
|
|
ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
|
|
|
|
ESS_AUDIO1_CTRL1_FIFO_SIZE);
|
|
|
|
else
|
|
|
|
ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
|
|
|
|
ESS_AUDIO1_CTRL1_FIFO_SIZE);
|
|
|
|
|
1998-08-10 19:32:18 +04:00
|
|
|
if (param->channels == 2) {
|
1998-08-09 10:38:30 +04:00
|
|
|
ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL,
|
|
|
|
(ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) |
|
|
|
|
ESS_AUDIO_CTRL_STEREO) &~ ESS_AUDIO_CTRL_MONO);
|
|
|
|
ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
|
|
|
|
ESS_AUDIO1_CTRL1_FIFO_STEREO);
|
|
|
|
} else {
|
|
|
|
ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL,
|
|
|
|
(ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) |
|
|
|
|
ESS_AUDIO_CTRL_MONO) &~ ESS_AUDIO_CTRL_STEREO);
|
|
|
|
ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
|
|
|
|
ESS_AUDIO1_CTRL1_FIFO_STEREO);
|
|
|
|
}
|
|
|
|
|
1998-08-10 19:32:18 +04:00
|
|
|
if (param->encoding == AUDIO_ENCODING_SLINEAR_BE ||
|
|
|
|
param->encoding == AUDIO_ENCODING_SLINEAR_LE)
|
1998-08-09 10:38:30 +04:00
|
|
|
ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
|
|
|
|
ESS_AUDIO1_CTRL1_FIFO_SIGNED);
|
|
|
|
else
|
|
|
|
ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
|
|
|
|
ESS_AUDIO1_CTRL1_FIFO_SIGNED);
|
|
|
|
|
|
|
|
/* REVISIT: Hack to enable Audio1 FIFO connection to CODEC. */
|
|
|
|
ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL1,
|
|
|
|
ESS_AUDIO1_CTRL1_FIFO_CONNECT);
|
|
|
|
|
1998-08-10 19:32:18 +04:00
|
|
|
isa_dmastart(sc->sc_ic, sc->sc_in.drq, start, end - start, NULL,
|
|
|
|
DMAMODE_READ | DMAMODE_LOOP, BUS_DMA_NOWAIT);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-08-09 10:38:30 +04:00
|
|
|
if (IS16BITDRQ(sc->sc_in.drq))
|
1998-08-10 19:32:18 +04:00
|
|
|
blksize >>= 1; /* use word count for 16 bit DMA */
|
1998-08-09 06:05:52 +04:00
|
|
|
/* Program transfer count registers with 2's complement of count. */
|
1998-08-10 19:32:18 +04:00
|
|
|
blksize = -blksize;
|
|
|
|
ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, blksize);
|
|
|
|
ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, blksize >> 8);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-08-09 10:52:57 +04:00
|
|
|
/* Use 4 bytes per input DMA. */
|
|
|
|
ess_set_xreg_bits(sc, ESS_XCMD_DEMAND_CTRL,
|
|
|
|
ESS_DEMAND_CTRL_DEMAND_4);
|
|
|
|
|
1998-08-09 06:05:52 +04:00
|
|
|
/* Start auto-init DMA */
|
1998-06-30 00:56:21 +04:00
|
|
|
ess_set_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
|
1998-08-09 06:05:52 +04:00
|
|
|
ESS_AUDIO1_CTRL2_DMA_READ |
|
|
|
|
ESS_AUDIO1_CTRL2_ADC_ENABLE |
|
|
|
|
ESS_AUDIO1_CTRL2_FIFO_ENABLE |
|
|
|
|
ESS_AUDIO1_CTRL2_AUTO_INIT);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ess_halt_output(addr)
|
|
|
|
void *addr;
|
|
|
|
{
|
|
|
|
struct ess_softc *sc = addr;
|
|
|
|
|
|
|
|
DPRINTF(("ess_halt_output: sc=%p\n", sc));
|
|
|
|
|
1998-08-04 17:14:42 +04:00
|
|
|
ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
|
1998-08-09 10:52:57 +04:00
|
|
|
ESS_AUDIO2_CTRL1_FIFO_ENABLE);
|
|
|
|
|
1998-06-30 00:56:21 +04:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ess_halt_input(addr)
|
|
|
|
void *addr;
|
|
|
|
{
|
|
|
|
struct ess_softc *sc = addr;
|
|
|
|
|
|
|
|
DPRINTF(("ess_halt_input: sc=%p\n", sc));
|
|
|
|
|
|
|
|
ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
|
1998-08-09 10:52:57 +04:00
|
|
|
ESS_AUDIO1_CTRL2_FIFO_ENABLE);
|
|
|
|
|
1998-06-30 00:56:21 +04:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ess_intr_output(arg)
|
|
|
|
void *arg;
|
|
|
|
{
|
|
|
|
struct ess_softc *sc = arg;
|
|
|
|
|
1998-07-30 18:11:42 +04:00
|
|
|
DPRINTFN(1,("ess_intr_output: intr=%p\n", sc->sc_out.intr));
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
/* clear interrupt on Audio channel 2 */
|
|
|
|
ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
|
|
|
|
ESS_AUDIO2_CTRL2_IRQ_LATCH);
|
1998-08-09 06:05:52 +04:00
|
|
|
|
1998-06-30 00:56:21 +04:00
|
|
|
sc->sc_out.nintr++;
|
|
|
|
|
1998-08-04 17:14:42 +04:00
|
|
|
if (sc->sc_out.intr != 0)
|
1998-06-30 00:56:21 +04:00
|
|
|
(*sc->sc_out.intr)(sc->sc_out.arg);
|
1998-08-04 17:14:42 +04:00
|
|
|
else
|
1998-07-31 19:17:17 +04:00
|
|
|
return (0);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
return (1);
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ess_intr_input(arg)
|
|
|
|
void *arg;
|
|
|
|
{
|
|
|
|
struct ess_softc *sc = arg;
|
|
|
|
u_char x;
|
|
|
|
|
1998-07-30 18:11:42 +04:00
|
|
|
DPRINTFN(1,("ess_intr_input: intr=%p\n", sc->sc_in.intr));
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
/* clear interrupt on Audio channel 1*/
|
1998-07-30 18:11:42 +04:00
|
|
|
x = EREAD1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
sc->sc_in.nintr++;
|
|
|
|
|
1998-08-09 06:05:52 +04:00
|
|
|
if (sc->sc_in.intr != 0)
|
1998-06-30 00:56:21 +04:00
|
|
|
(*sc->sc_in.intr)(sc->sc_in.arg);
|
1998-08-09 06:05:52 +04:00
|
|
|
else
|
1998-07-31 19:17:17 +04:00
|
|
|
return (0);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ess_round_blocksize(addr, blk)
|
|
|
|
void *addr;
|
|
|
|
int blk;
|
|
|
|
{
|
1998-07-31 19:17:17 +04:00
|
|
|
return (blk & -8); /* round for max DMA size */
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ess_set_port(addr, cp)
|
|
|
|
void *addr;
|
|
|
|
mixer_ctrl_t *cp;
|
|
|
|
{
|
|
|
|
struct ess_softc *sc = addr;
|
|
|
|
int lgain, rgain;
|
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
DPRINTFN(5,("ess_set_port: port=%d num_channels=%d\n",
|
|
|
|
cp->dev, cp->un.value.num_channels));
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
switch (cp->dev) {
|
|
|
|
/*
|
|
|
|
* The following mixer ports are all stereo. If we get a
|
|
|
|
* single-channel gain value passed in, then we duplicate it
|
|
|
|
* to both left and right channels.
|
|
|
|
*/
|
|
|
|
case ESS_MASTER_VOL:
|
|
|
|
case ESS_DAC_PLAY_VOL:
|
|
|
|
case ESS_MIC_PLAY_VOL:
|
|
|
|
case ESS_LINE_PLAY_VOL:
|
|
|
|
case ESS_SYNTH_PLAY_VOL:
|
|
|
|
case ESS_CD_PLAY_VOL:
|
|
|
|
case ESS_AUXB_PLAY_VOL:
|
|
|
|
case ESS_DAC_REC_VOL:
|
|
|
|
case ESS_MIC_REC_VOL:
|
|
|
|
case ESS_LINE_REC_VOL:
|
|
|
|
case ESS_SYNTH_REC_VOL:
|
|
|
|
case ESS_CD_REC_VOL:
|
|
|
|
case ESS_AUXB_REC_VOL:
|
|
|
|
case ESS_RECORD_VOL:
|
|
|
|
if (cp->type != AUDIO_MIXER_VALUE)
|
|
|
|
return EINVAL;
|
|
|
|
|
|
|
|
switch (cp->un.value.num_channels) {
|
|
|
|
case 1:
|
|
|
|
lgain = rgain = ESS_4BIT_GAIN(
|
|
|
|
cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
lgain = ESS_4BIT_GAIN(
|
|
|
|
cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]);
|
|
|
|
rgain = ESS_4BIT_GAIN(
|
|
|
|
cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
sc->gain[cp->dev][ESS_LEFT] = lgain;
|
|
|
|
sc->gain[cp->dev][ESS_RIGHT] = rgain;
|
|
|
|
|
|
|
|
ess_set_gain(sc, cp->dev, 1);
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The PC speaker port is mono. If we get a stereo gain value
|
|
|
|
* passed in, then we return EINVAL.
|
|
|
|
*/
|
|
|
|
case ESS_PCSPEAKER_VOL:
|
|
|
|
if (cp->un.value.num_channels != 1)
|
|
|
|
return EINVAL;
|
|
|
|
|
|
|
|
sc->gain[cp->dev][ESS_LEFT] = sc->gain[cp->dev][ESS_RIGHT] =
|
|
|
|
ESS_3BIT_GAIN(cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
|
|
|
|
ess_set_gain(sc, cp->dev, 1);
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
|
|
case ESS_MIC_PREAMP:
|
|
|
|
if (cp->type != AUDIO_MIXER_ENUM)
|
|
|
|
return EINVAL;
|
|
|
|
|
|
|
|
if (cp->un.ord)
|
|
|
|
/* Enable microphone preamp */
|
|
|
|
ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
|
|
|
|
ESS_PREAMP_CTRL_ENABLE);
|
|
|
|
else
|
|
|
|
/* Disable microphone preamp */
|
|
|
|
ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
|
|
|
|
ESS_PREAMP_CTRL_ENABLE);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case ESS_RECORD_SOURCE:
|
|
|
|
if (cp->type == AUDIO_MIXER_SET)
|
|
|
|
return ess_set_in_ports(sc, cp->un.mask);
|
|
|
|
else
|
|
|
|
return EINVAL;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case ESS_RECORD_MONITOR:
|
|
|
|
if (cp->type != AUDIO_MIXER_ENUM)
|
|
|
|
return EINVAL;
|
|
|
|
|
|
|
|
if (cp->un.ord)
|
|
|
|
/* Enable monitor */
|
|
|
|
ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
|
|
|
|
ESS_AUDIO_CTRL_MONITOR);
|
|
|
|
else
|
|
|
|
/* Disable monitor */
|
|
|
|
ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
|
|
|
|
ESS_AUDIO_CTRL_MONITOR);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ess_get_port(addr, cp)
|
|
|
|
void *addr;
|
|
|
|
mixer_ctrl_t *cp;
|
|
|
|
{
|
|
|
|
struct ess_softc *sc = addr;
|
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
DPRINTFN(5,("ess_get_port: port=%d\n", cp->dev));
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
switch (cp->dev) {
|
|
|
|
case ESS_DAC_PLAY_VOL:
|
|
|
|
case ESS_MIC_PLAY_VOL:
|
|
|
|
case ESS_LINE_PLAY_VOL:
|
|
|
|
case ESS_SYNTH_PLAY_VOL:
|
|
|
|
case ESS_CD_PLAY_VOL:
|
|
|
|
case ESS_AUXB_PLAY_VOL:
|
|
|
|
case ESS_MASTER_VOL:
|
|
|
|
case ESS_PCSPEAKER_VOL:
|
|
|
|
case ESS_DAC_REC_VOL:
|
|
|
|
case ESS_MIC_REC_VOL:
|
|
|
|
case ESS_LINE_REC_VOL:
|
|
|
|
case ESS_SYNTH_REC_VOL:
|
|
|
|
case ESS_CD_REC_VOL:
|
|
|
|
case ESS_AUXB_REC_VOL:
|
|
|
|
case ESS_RECORD_VOL:
|
|
|
|
if (cp->dev == ESS_PCSPEAKER_VOL &&
|
|
|
|
cp->un.value.num_channels != 1)
|
|
|
|
return EINVAL;
|
|
|
|
|
|
|
|
switch (cp->un.value.num_channels) {
|
|
|
|
case 1:
|
|
|
|
cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
|
|
|
|
sc->gain[cp->dev][ESS_LEFT];
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
|
|
|
|
sc->gain[cp->dev][ESS_LEFT];
|
|
|
|
cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
|
|
|
|
sc->gain[cp->dev][ESS_RIGHT];
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return EINVAL;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case ESS_MIC_PREAMP:
|
|
|
|
cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) &
|
|
|
|
ESS_PREAMP_CTRL_ENABLE) ? 1 : 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case ESS_RECORD_SOURCE:
|
|
|
|
cp->un.mask = sc->in_mask;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case ESS_RECORD_MONITOR:
|
|
|
|
cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) &
|
|
|
|
ESS_AUDIO_CTRL_MONITOR) ? 1 : 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ess_query_devinfo(addr, dip)
|
|
|
|
void *addr;
|
|
|
|
mixer_devinfo_t *dip;
|
|
|
|
{
|
1998-07-31 02:17:34 +04:00
|
|
|
#ifdef AUDIO_DEBUG
|
1998-06-30 00:56:21 +04:00
|
|
|
struct ess_softc *sc = addr;
|
1998-07-31 02:17:34 +04:00
|
|
|
#endif
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
DPRINTFN(5,("ess_query_devinfo: model=%d index=%d\n",
|
|
|
|
sc->sc_model, dip->index));
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* REVISIT: There are some slight differences between the
|
|
|
|
* mixers on the different ESS chips, which can
|
|
|
|
* be sorted out using the chip model rather than a
|
|
|
|
* separate mixer model.
|
|
|
|
* This is currently coded assuming an ES1887; we
|
|
|
|
* need to work out which bits are not applicable to
|
|
|
|
* the other models (1888 and 888).
|
|
|
|
*/
|
|
|
|
switch (dip->index) {
|
|
|
|
case ESS_DAC_PLAY_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_INPUT_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioNdac);
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_MIC_PLAY_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_INPUT_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
1998-08-12 23:13:14 +04:00
|
|
|
dip->next = ESS_MIC_PREAMP;
|
1998-06-30 00:56:21 +04:00
|
|
|
strcpy(dip->label.name, AudioNmicrophone);
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_LINE_PLAY_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_INPUT_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioNline);
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_SYNTH_PLAY_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_INPUT_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioNfmsynth);
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_CD_PLAY_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_INPUT_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioNcd);
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_AUXB_PLAY_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_INPUT_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, "auxb");
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_INPUT_CLASS:
|
|
|
|
dip->type = AUDIO_MIXER_CLASS;
|
|
|
|
dip->mixer_class = ESS_INPUT_CLASS;
|
|
|
|
dip->next = dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioCinputs);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
|
|
|
|
case ESS_MASTER_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_OUTPUT_CLASS;
|
|
|
|
dip->prev = dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioNmaster);
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_PCSPEAKER_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_OUTPUT_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, "pc_speaker");
|
|
|
|
dip->un.v.num_channels = 1;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_OUTPUT_CLASS:
|
|
|
|
dip->type = AUDIO_MIXER_CLASS;
|
|
|
|
dip->mixer_class = ESS_OUTPUT_CLASS;
|
|
|
|
dip->next = dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioCoutputs);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
|
|
|
|
case ESS_DAC_REC_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_RECORD_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioNdac);
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_MIC_REC_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_RECORD_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
1998-08-12 23:13:14 +04:00
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
1998-06-30 00:56:21 +04:00
|
|
|
strcpy(dip->label.name, AudioNmicrophone);
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_LINE_REC_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_RECORD_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioNline);
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_SYNTH_REC_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_RECORD_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioNfmsynth);
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_CD_REC_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_RECORD_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioNcd);
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_AUXB_REC_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_RECORD_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, "auxb");
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_MIC_PREAMP:
|
|
|
|
dip->type = AUDIO_MIXER_ENUM;
|
1998-08-12 23:13:14 +04:00
|
|
|
dip->mixer_class = ESS_INPUT_CLASS;
|
|
|
|
dip->prev = ESS_MIC_PLAY_VOL;
|
1998-06-30 00:56:21 +04:00
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
1998-08-12 07:18:34 +04:00
|
|
|
strcpy(dip->label.name, AudioNpreamp);
|
1998-06-30 00:56:21 +04:00
|
|
|
dip->un.e.num_mem = 2;
|
|
|
|
strcpy(dip->un.e.member[0].label.name, AudioNoff);
|
|
|
|
dip->un.e.member[0].ord = 0;
|
|
|
|
strcpy(dip->un.e.member[1].label.name, AudioNon);
|
|
|
|
dip->un.e.member[1].ord = 1;
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_RECORD_VOL:
|
|
|
|
dip->type = AUDIO_MIXER_VALUE;
|
|
|
|
dip->mixer_class = ESS_RECORD_CLASS;
|
|
|
|
dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioNrecord);
|
|
|
|
dip->un.v.num_channels = 2;
|
|
|
|
strcpy(dip->un.v.units.name, AudioNvolume);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_RECORD_SOURCE:
|
|
|
|
dip->mixer_class = ESS_RECORD_CLASS;
|
|
|
|
dip->prev = dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioNsource);
|
|
|
|
dip->type = AUDIO_MIXER_SET;
|
|
|
|
dip->un.s.num_mem = 6;
|
|
|
|
strcpy(dip->un.s.member[0].label.name, AudioNdac);
|
|
|
|
dip->un.s.member[0].mask = 1 << ESS_DAC_REC_VOL;
|
|
|
|
strcpy(dip->un.s.member[1].label.name, AudioNmicrophone);
|
|
|
|
dip->un.s.member[1].mask = 1 << ESS_MIC_REC_VOL;
|
|
|
|
strcpy(dip->un.s.member[2].label.name, AudioNline);
|
|
|
|
dip->un.s.member[2].mask = 1 << ESS_LINE_REC_VOL;
|
|
|
|
strcpy(dip->un.s.member[3].label.name, AudioNfmsynth);
|
|
|
|
dip->un.s.member[3].mask = 1 << ESS_SYNTH_REC_VOL;
|
|
|
|
strcpy(dip->un.s.member[4].label.name, AudioNcd);
|
|
|
|
dip->un.s.member[4].mask = 1 << ESS_CD_REC_VOL;
|
|
|
|
strcpy(dip->un.s.member[5].label.name, "auxb");
|
|
|
|
dip->un.s.member[5].mask = 1 << ESS_AUXB_REC_VOL;
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_RECORD_CLASS:
|
|
|
|
dip->type = AUDIO_MIXER_CLASS;
|
|
|
|
dip->mixer_class = ESS_RECORD_CLASS;
|
|
|
|
dip->next = dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioCrecord);
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
|
|
|
|
case ESS_RECORD_MONITOR:
|
|
|
|
dip->mixer_class = ESS_MONITOR_CLASS;
|
|
|
|
dip->prev = dip->next = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioNmonitor);
|
|
|
|
dip->type = AUDIO_MIXER_ENUM;
|
|
|
|
dip->un.e.num_mem = 2;
|
|
|
|
strcpy(dip->un.e.member[0].label.name, AudioNoff);
|
|
|
|
dip->un.e.member[0].ord = 0;
|
|
|
|
strcpy(dip->un.e.member[1].label.name, AudioNon);
|
|
|
|
dip->un.e.member[1].ord = 1;
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
case ESS_MONITOR_CLASS:
|
|
|
|
dip->type = AUDIO_MIXER_CLASS;
|
|
|
|
dip->mixer_class = ESS_MONITOR_CLASS;
|
|
|
|
dip->next = dip->prev = AUDIO_MIXER_LAST;
|
|
|
|
strcpy(dip->label.name, AudioCmonitor);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
return (ENXIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
void *
|
|
|
|
ess_malloc(addr, size, pool, flags)
|
|
|
|
void *addr;
|
|
|
|
unsigned long size;
|
|
|
|
int pool;
|
|
|
|
int flags;
|
|
|
|
{
|
|
|
|
struct ess_softc *sc = addr;
|
|
|
|
|
|
|
|
return isa_malloc(sc->sc_ic, 4, size, pool, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
ess_free(addr, ptr, pool)
|
|
|
|
void *addr;
|
|
|
|
void *ptr;
|
|
|
|
int pool;
|
|
|
|
{
|
|
|
|
isa_free(ptr, pool);
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned long
|
|
|
|
ess_round(addr, size)
|
|
|
|
void *addr;
|
|
|
|
unsigned long size;
|
|
|
|
{
|
|
|
|
if (size > MAX_ISADMA)
|
|
|
|
size = MAX_ISADMA;
|
|
|
|
return size;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ess_mappage(addr, mem, off, prot)
|
|
|
|
void *addr;
|
|
|
|
void *mem;
|
|
|
|
int off;
|
|
|
|
int prot;
|
|
|
|
{
|
|
|
|
return (isa_mappage(mem, off, prot));
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ess_get_props(addr)
|
|
|
|
void *addr;
|
|
|
|
{
|
1998-07-31 19:17:17 +04:00
|
|
|
struct ess_softc *sc = addr;
|
1998-08-09 08:40:55 +04:00
|
|
|
|
|
|
|
return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT |
|
1998-07-31 19:17:17 +04:00
|
|
|
(sc->sc_in.drq != sc->sc_out.drq ? AUDIO_PROP_FULLDUPLEX : 0));
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* ============================================
|
|
|
|
* Generic functions for ess, not used by audio h/w i/f
|
|
|
|
* =============================================
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Reset the chip.
|
|
|
|
* Return non-zero if the chip isn't detected.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
ess_reset(sc)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
{
|
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
|
|
|
|
|
|
sc->sc_in.intr = 0;
|
|
|
|
if (sc->sc_in.active) {
|
|
|
|
isa_dmaabort(sc->sc_ic, sc->sc_in.drq);
|
|
|
|
sc->sc_in.active = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
sc->sc_out.intr = 0;
|
|
|
|
if (sc->sc_out.active) {
|
|
|
|
isa_dmaabort(sc->sc_ic, sc->sc_out.drq);
|
|
|
|
sc->sc_out.active = 0;
|
|
|
|
}
|
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
EWRITE1(iot, ioh, ESS_DSP_RESET, ESS_RESET_EXT);
|
1998-06-30 00:56:21 +04:00
|
|
|
delay(10000);
|
1998-07-30 18:11:42 +04:00
|
|
|
EWRITE1(iot, ioh, ESS_DSP_RESET, 0);
|
1998-06-30 00:56:21 +04:00
|
|
|
if (ess_rdsp(sc) != ESS_MAGIC)
|
1998-07-31 19:17:17 +04:00
|
|
|
return (1);
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
/* Enable access to the ESS extension commands. */
|
1998-06-30 00:56:21 +04:00
|
|
|
ess_wdsp(sc, ESS_ACMD_ENABLE_EXT);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
ess_set_gain(sc, port, on)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
int port;
|
|
|
|
int on;
|
|
|
|
{
|
|
|
|
int gain, left, right;
|
|
|
|
int mix;
|
|
|
|
int src;
|
|
|
|
int stereo;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Most gain controls are found in the mixer registers and
|
|
|
|
* are stereo. Any that are not, must set mix and stereo as
|
|
|
|
* required.
|
|
|
|
*/
|
|
|
|
mix = 1;
|
|
|
|
stereo = 1;
|
|
|
|
|
|
|
|
switch (port) {
|
|
|
|
case ESS_MASTER_VOL:
|
|
|
|
src = 0x32;
|
|
|
|
break;
|
|
|
|
case ESS_DAC_PLAY_VOL:
|
|
|
|
src = 0x7C;
|
|
|
|
break;
|
|
|
|
case ESS_MIC_PLAY_VOL:
|
|
|
|
src = 0x1A;
|
|
|
|
break;
|
|
|
|
case ESS_LINE_PLAY_VOL:
|
|
|
|
src = 0x3E;
|
|
|
|
break;
|
|
|
|
case ESS_SYNTH_PLAY_VOL:
|
|
|
|
src = 0x36;
|
|
|
|
break;
|
|
|
|
case ESS_CD_PLAY_VOL:
|
|
|
|
src = 0x38;
|
|
|
|
break;
|
|
|
|
case ESS_AUXB_PLAY_VOL:
|
|
|
|
src = 0x3A;
|
|
|
|
break;
|
|
|
|
case ESS_PCSPEAKER_VOL:
|
|
|
|
src = 0x3C;
|
|
|
|
stereo = 0;
|
|
|
|
break;
|
|
|
|
case ESS_DAC_REC_VOL:
|
|
|
|
src = 0x69;
|
|
|
|
break;
|
|
|
|
case ESS_MIC_REC_VOL:
|
|
|
|
src = 0x68;
|
|
|
|
break;
|
|
|
|
case ESS_LINE_REC_VOL:
|
|
|
|
src = 0x6E;
|
|
|
|
break;
|
|
|
|
case ESS_SYNTH_REC_VOL:
|
|
|
|
src = 0x6B;
|
|
|
|
break;
|
|
|
|
case ESS_CD_REC_VOL:
|
|
|
|
src = 0x6A;
|
|
|
|
break;
|
|
|
|
case ESS_AUXB_REC_VOL:
|
|
|
|
src = 0x6C;
|
|
|
|
break;
|
|
|
|
case ESS_RECORD_VOL:
|
|
|
|
src = 0xB4;
|
|
|
|
mix = 0;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (on) {
|
|
|
|
left = sc->gain[port][ESS_LEFT];
|
|
|
|
right = sc->gain[port][ESS_RIGHT];
|
|
|
|
} else {
|
|
|
|
left = right = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (stereo)
|
|
|
|
gain = ESS_STEREO_GAIN(left, right);
|
|
|
|
else
|
|
|
|
gain = ESS_MONO_GAIN(left);
|
|
|
|
|
|
|
|
if (mix)
|
|
|
|
ess_write_mix_reg(sc, src, gain);
|
|
|
|
else
|
|
|
|
ess_write_x_reg(sc, src, gain);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ess_set_in_ports(sc, mask)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
int mask;
|
|
|
|
{
|
|
|
|
mixer_devinfo_t di;
|
|
|
|
int i;
|
|
|
|
int port;
|
|
|
|
int tmp;
|
|
|
|
|
|
|
|
DPRINTF(("ess_set_in_ports: mask=0x%x\n", mask));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Get the device info for the record source control,
|
|
|
|
* including the list of available sources.
|
|
|
|
*/
|
|
|
|
di.index = ESS_RECORD_SOURCE;
|
|
|
|
if (ess_query_devinfo(sc, &di))
|
|
|
|
return EINVAL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set or disable the record volume control for each of the
|
|
|
|
* possible sources.
|
|
|
|
*/
|
|
|
|
for (i = 0; i < di.un.s.num_mem; i++)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Calculate the source port number from its mask.
|
|
|
|
*/
|
|
|
|
tmp = di.un.s.member[i].mask >> 1;
|
|
|
|
for (port = 0; tmp; port++) {
|
|
|
|
tmp >>= 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set the source gain:
|
|
|
|
* to the current value if source is enabled
|
|
|
|
* to zero if source is disabled
|
|
|
|
*/
|
|
|
|
ess_set_gain(sc, port, mask & di.un.s.member[i].mask);
|
|
|
|
}
|
|
|
|
|
|
|
|
sc->in_mask = mask;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We have to fake a single port since the upper layer expects
|
|
|
|
* one only. We choose the lowest numbered port that is enabled.
|
|
|
|
*/
|
|
|
|
for(i = 0; i < ESS_NPORT; i++) {
|
|
|
|
if (mask & (1 << i)) {
|
|
|
|
sc->in_port = i;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
ess_speaker_on(sc)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
{
|
|
|
|
/* Disable mute on left- and right-master volume. */
|
|
|
|
ess_clear_mreg_bits(sc, 0x60, 0x40);
|
|
|
|
ess_clear_mreg_bits(sc, 0x62, 0x40);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
ess_speaker_off(sc)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
{
|
|
|
|
/* Enable mute on left- and right-master volume. */
|
|
|
|
ess_set_mreg_bits(sc, 0x60, 0x40);
|
|
|
|
ess_set_mreg_bits(sc, 0x62, 0x40);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Calculate the time constant for the requested sampling rate.
|
|
|
|
*/
|
|
|
|
u_int
|
|
|
|
ess_srtotc(rate)
|
|
|
|
u_int rate;
|
|
|
|
{
|
|
|
|
u_int tc;
|
|
|
|
|
|
|
|
/* The following formulae are from the ESS data sheet. */
|
1998-08-09 07:48:42 +04:00
|
|
|
if (rate <= 22050)
|
1998-06-30 00:56:21 +04:00
|
|
|
tc = 128 - 397700L / rate;
|
|
|
|
else
|
|
|
|
tc = 256 - 795500L / rate;
|
|
|
|
|
|
|
|
return (tc);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Calculate the filter constant for the reuqested sampling rate.
|
|
|
|
*/
|
|
|
|
u_int
|
|
|
|
ess_srtofc(rate)
|
|
|
|
u_int rate;
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* The following formula is derived from the information in
|
|
|
|
* the ES1887 data sheet, based on a roll-off frequency of
|
|
|
|
* 87%.
|
|
|
|
*/
|
|
|
|
return (256 - 200279L / rate);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Return the status of the DSP.
|
|
|
|
*/
|
|
|
|
u_char
|
|
|
|
ess_get_dsp_status(sc)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
{
|
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
|
|
|
1998-07-30 18:11:42 +04:00
|
|
|
return (EREAD1(iot, ioh, ESS_DSP_RW_STATUS));
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Return the read status of the DSP: 1 -> DSP ready for reading
|
|
|
|
* 0 -> DSP not ready for reading
|
|
|
|
*/
|
|
|
|
u_char
|
|
|
|
ess_dsp_read_ready(sc)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
{
|
|
|
|
return (((ess_get_dsp_status(sc) & ESS_DSP_READ_MASK) ==
|
|
|
|
ESS_DSP_READ_READY) ? 1 : 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Return the write status of the DSP: 1 -> DSP ready for writing
|
|
|
|
* 0 -> DSP not ready for writing
|
|
|
|
*/
|
|
|
|
u_char
|
|
|
|
ess_dsp_write_ready(sc)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
{
|
|
|
|
return (((ess_get_dsp_status(sc) & ESS_DSP_WRITE_MASK) ==
|
|
|
|
ESS_DSP_WRITE_READY) ? 1 : 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Read a byte from the DSP.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
ess_rdsp(sc)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
{
|
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = ESS_READ_TIMEOUT; i > 0; --i) {
|
|
|
|
if (ess_dsp_read_ready(sc)) {
|
1998-07-30 18:11:42 +04:00
|
|
|
i = EREAD1(iot, ioh, ESS_DSP_READ);
|
|
|
|
DPRINTFN(8,("ess_rdsp() = 0x%02x\n", i));
|
1998-06-30 00:56:21 +04:00
|
|
|
return i;
|
|
|
|
} else
|
|
|
|
delay(10);
|
|
|
|
}
|
|
|
|
|
|
|
|
DPRINTF(("ess_rdsp: timed out\n"));
|
|
|
|
return (-1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write a byte to the DSP.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
ess_wdsp(sc, v)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
u_char v;
|
|
|
|
{
|
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
|
|
int i;
|
1998-07-30 18:11:42 +04:00
|
|
|
|
|
|
|
DPRINTFN(8,("ess_wdsp(0x%02x)\n", v));
|
|
|
|
|
1998-06-30 00:56:21 +04:00
|
|
|
for (i = ESS_WRITE_TIMEOUT; i > 0; --i) {
|
|
|
|
if (ess_dsp_write_ready(sc)) {
|
1998-07-30 18:11:42 +04:00
|
|
|
EWRITE1(iot, ioh, ESS_DSP_WRITE, v);
|
1998-06-30 00:56:21 +04:00
|
|
|
return (0);
|
|
|
|
} else
|
|
|
|
delay(10);
|
|
|
|
}
|
|
|
|
|
|
|
|
DPRINTF(("ess_wdsp(0x%02x): timed out\n", v));
|
|
|
|
return (-1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write a value to one of the ESS extended registers.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
ess_write_x_reg(sc, reg, val)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
u_char reg;
|
|
|
|
u_char val;
|
|
|
|
{
|
|
|
|
int error;
|
|
|
|
|
1998-07-30 18:11:42 +04:00
|
|
|
DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
|
1998-06-30 00:56:21 +04:00
|
|
|
if ((error = ess_wdsp(sc, reg)) == 0)
|
|
|
|
error = ess_wdsp(sc, val);
|
|
|
|
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Read the value of one of the ESS extended registers.
|
|
|
|
*/
|
|
|
|
u_char
|
|
|
|
ess_read_x_reg(sc, reg)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
u_char reg;
|
|
|
|
{
|
|
|
|
int error;
|
1998-07-30 18:11:42 +04:00
|
|
|
int val;
|
1998-06-30 00:56:21 +04:00
|
|
|
|
|
|
|
if ((error = ess_wdsp(sc, 0xC0)) == 0)
|
|
|
|
error = ess_wdsp(sc, reg);
|
|
|
|
if (error)
|
|
|
|
DPRINTF(("Error reading extended register 0x%02x\n", reg));
|
|
|
|
/* REVISIT: what if an error is returned above? */
|
1998-07-30 18:11:42 +04:00
|
|
|
val = ess_rdsp(sc);
|
|
|
|
DPRINTFN(2,("ess_write_x_reg: %02x=%02x\n", reg, val));
|
|
|
|
return val;
|
1998-06-30 00:56:21 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
ess_clear_xreg_bits(sc, reg, mask)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
u_char reg;
|
|
|
|
u_char mask;
|
|
|
|
{
|
|
|
|
if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1)
|
|
|
|
DPRINTF(("Error clearing bits in extended register 0x%02x\n",
|
|
|
|
reg));
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
ess_set_xreg_bits(sc, reg, mask)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
u_char reg;
|
|
|
|
u_char mask;
|
|
|
|
{
|
|
|
|
if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1)
|
|
|
|
DPRINTF(("Error setting bits in extended register 0x%02x\n",
|
|
|
|
reg));
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write a value to one of the ESS mixer registers.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
ess_write_mix_reg(sc, reg, val)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
u_char reg;
|
|
|
|
u_char val;
|
|
|
|
{
|
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
|
|
int s;
|
|
|
|
|
1998-07-30 18:11:42 +04:00
|
|
|
DPRINTFN(2,("ess_write_mix_reg: %x=%x\n", reg, val));
|
1998-06-30 00:56:21 +04:00
|
|
|
|
1998-07-31 19:17:17 +04:00
|
|
|
s = splaudio();
|
1998-07-30 18:11:42 +04:00
|
|
|
EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
|
|
|
|
EWRITE1(iot, ioh, ESS_MIX_REG_DATA, val);
|
1998-06-30 00:56:21 +04:00
|
|
|
splx(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Read the value of one of the ESS mixer registers.
|
|
|
|
*/
|
|
|
|
u_char
|
|
|
|
ess_read_mix_reg(sc, reg)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
u_char reg;
|
|
|
|
{
|
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
|
|
|
int s;
|
|
|
|
u_char val;
|
|
|
|
|
|
|
|
s = splaudio();
|
1998-07-30 18:11:42 +04:00
|
|
|
EWRITE1(iot, ioh, ESS_MIX_REG_SELECT, reg);
|
|
|
|
val = EREAD1(iot, ioh, ESS_MIX_REG_DATA);
|
1998-06-30 00:56:21 +04:00
|
|
|
splx(s);
|
1998-07-31 19:17:17 +04:00
|
|
|
|
1998-07-30 18:11:42 +04:00
|
|
|
DPRINTFN(2,("ess_read_mix_reg: %x=%x\n", reg, val));
|
1998-06-30 00:56:21 +04:00
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
ess_clear_mreg_bits(sc, reg, mask)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
u_char reg;
|
|
|
|
u_char mask;
|
|
|
|
{
|
|
|
|
ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
ess_set_mreg_bits(sc, reg, mask)
|
|
|
|
struct ess_softc *sc;
|
|
|
|
u_char reg;
|
|
|
|
u_char mask;
|
|
|
|
{
|
|
|
|
ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask);
|
|
|
|
}
|