1999-10-30 20:07:58 +04:00
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/* $NetBSD: if_fxp_pci.c,v 1.2 1999/10/30 16:07:59 sommerfeld Exp $ */
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1999-06-20 20:35:40 +04:00
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/*-
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* Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* PCI bus front-end for the Intel i82557 fast Ethernet controller
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* driver. Works with Intel Etherexpress Pro 10+, 100B, 100+ cards.
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*/
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#include "opt_inet.h"
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#include "opt_ns.h"
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#include "bpfilter.h"
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#include "rnd.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/ioctl.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#if NRND > 0
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#include <sys/rnd.h>
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#endif
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_ether.h>
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#if NBPFILTER > 0
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#include <net/bpf.h>
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#endif
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_inarp.h>
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#endif
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#ifdef NS
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#include <netns/ns.h>
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#include <netns/ns_if.h>
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#endif
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/mii/miivar.h>
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#include <dev/ic/i82557reg.h>
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#include <dev/ic/i82557var.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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int fxp_pci_match __P((struct device *, struct cfdata *, void *));
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void fxp_pci_attach __P((struct device *, struct device *, void *));
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struct cfattach fxp_pci_ca = {
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sizeof(struct fxp_softc), fxp_pci_match, fxp_pci_attach
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};
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int
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fxp_pci_match(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL)
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return (0);
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_INTEL_82557:
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return (1);
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}
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return (0);
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}
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void
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fxp_pci_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct fxp_softc *sc = (struct fxp_softc *)self;
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struct pci_attach_args *pa = aux;
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pci_chipset_tag_t pc = pa->pa_pc;
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pci_intr_handle_t ih;
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const char *intrstr = NULL;
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bus_space_tag_t iot, memt;
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bus_space_handle_t ioh, memh;
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int ioh_valid, memh_valid;
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bus_addr_t addr;
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bus_size_t size;
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int flags;
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1999-10-30 20:07:58 +04:00
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sc->sc_enabled = 1;
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sc->sc_enable = NULL;
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sc->sc_disable = NULL;
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1999-06-20 20:35:40 +04:00
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/*
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* Map control/status registers.
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*/
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ioh_valid = (pci_mapreg_map(pa, FXP_PCI_IOBA,
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PCI_MAPREG_TYPE_IO, 0,
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&iot, &ioh, NULL, NULL) == 0);
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/*
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* Version 2.1 of the PCI spec, page 196, "Address Maps":
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*
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* Prefetchable
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*
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* Set to one if there are no side effects on reads, the
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* device returns all bytes regardless of the byte enables,
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* and host bridges can merge processor writes into this
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* range without causing errors. Bit must be set to zero
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* otherwise.
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*
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* The 82557 incorrectly sets the "prefetchable" bit, resulting
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* in errors on systems which will do merged reads and writes.
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* These errors manifest themselves as all-bits-set when reading
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* from the EEPROM or other < 4 byte registers.
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*
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* We must work around this problem by always forcing the mapping
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* for memory space to be uncacheable. On systems which cannot
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* create an uncacheable mapping (because the firmware mapped it
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* into only cacheable/prefetchable space due to the "prefetchable"
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* bit), we can fall back onto i/o mapped access.
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*/
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memh_valid = 0;
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memt = pa->pa_memt;
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if (((pa->pa_flags & PCI_FLAGS_MEM_ENABLED) != 0) &&
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pci_mapreg_info(pa->pa_pc, pa->pa_tag, FXP_PCI_MMBA,
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PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT,
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&addr, &size, &flags) == 0) {
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flags &= ~BUS_SPACE_MAP_CACHEABLE;
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if (bus_space_map(memt, addr, size, flags, &memh) == 0)
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memh_valid = 1;
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}
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if (memh_valid) {
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sc->sc_st = memt;
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sc->sc_sh = memh;
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} else if (ioh_valid) {
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sc->sc_st = iot;
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sc->sc_sh = ioh;
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} else {
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printf(": unable to map device registers\n");
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return;
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}
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sc->sc_dmat = pa->pa_dmat;
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/*
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* XXX Perhaps report '557, '558, '559 based on revision?
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*/
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printf(": Intel i82557 Ethernet, rev %d\n",
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PCI_REVISION(pa->pa_class));
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/* Make sure bus-mastering is enabled. */
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pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
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pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
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PCI_COMMAND_MASTER_ENABLE);
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/*
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* Map and establish our interrupt.
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*/
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if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
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pa->pa_intrline, &ih)) {
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printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
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return;
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}
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intrstr = pci_intr_string(pc, ih);
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sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc);
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if (sc->sc_ih == NULL) {
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printf("%s: couldn't establish interrupt",
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sc->sc_dev.dv_xname);
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if (intrstr != NULL)
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printf(" at %s", intrstr);
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printf("\n");
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return;
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}
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printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
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/* Finish off the attach. */
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fxp_attach(sc);
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}
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