2007-03-10 12:13:07 +03:00
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/* $NetBSD: brgphy.c,v 1.32 2007/03/10 09:13:07 msaitoh Exp $ */
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2001-06-01 20:49:59 +04:00
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/*-
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* Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1997 Manuel Bouyer. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Manuel Bouyer.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* driver for the Broadcom BCM5400 Gig-E PHY.
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*
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* Programming information for this PHY was gleaned from FreeBSD
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* (they were apparently able to get a datasheet from Broadcom).
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*/
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2001-11-13 10:38:28 +03:00
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#include <sys/cdefs.h>
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2007-03-10 12:13:07 +03:00
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__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.32 2007/03/10 09:13:07 msaitoh Exp $");
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2001-11-13 10:38:28 +03:00
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2001-06-01 20:49:59 +04:00
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/socket.h>
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#include <sys/errno.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mii/miidevs.h>
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#include <dev/mii/brgphyreg.h>
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2004-08-23 10:16:06 +04:00
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static int brgphymatch(struct device *, struct cfdata *, void *);
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static void brgphyattach(struct device *, struct device *, void *);
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2001-06-01 20:49:59 +04:00
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2002-10-01 01:57:46 +04:00
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CFATTACH_DECL(brgphy, sizeof(struct mii_softc),
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2002-10-02 20:33:28 +04:00
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brgphymatch, brgphyattach, mii_phy_detach, mii_phy_activate);
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2001-06-01 20:49:59 +04:00
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2004-08-23 10:16:06 +04:00
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static int brgphy_service(struct mii_softc *, struct mii_data *, int);
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static void brgphy_status(struct mii_softc *);
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2007-03-10 12:13:07 +03:00
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static int brgphy_mii_phy_auto(struct mii_softc *);
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static void brgphy_loop(struct mii_softc *);
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2001-06-01 20:49:59 +04:00
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2004-08-23 10:16:06 +04:00
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static void brgphy_5401_reset(struct mii_softc *);
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static void brgphy_5411_reset(struct mii_softc *);
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static void brgphy_5703_reset(struct mii_softc *);
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static void brgphy_5704_reset(struct mii_softc *);
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static void brgphy_5705_reset(struct mii_softc *);
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2004-10-28 11:26:17 +04:00
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static void brgphy_5750_reset(struct mii_softc *);
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2002-07-13 05:23:27 +04:00
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2004-08-23 10:16:06 +04:00
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static const struct mii_phy_funcs brgphy_funcs = {
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2001-06-01 20:49:59 +04:00
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brgphy_service, brgphy_status, mii_phy_reset,
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};
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2004-08-23 10:16:06 +04:00
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static const struct mii_phy_funcs brgphy_5401_funcs = {
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2002-07-13 05:23:27 +04:00
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brgphy_service, brgphy_status, brgphy_5401_reset,
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};
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2004-08-23 10:16:06 +04:00
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static const struct mii_phy_funcs brgphy_5411_funcs = {
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2002-07-13 05:23:27 +04:00
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brgphy_service, brgphy_status, brgphy_5411_reset,
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};
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2004-08-23 10:16:06 +04:00
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static const struct mii_phy_funcs brgphy_5703_funcs = {
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2003-01-16 21:43:40 +03:00
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brgphy_service, brgphy_status, brgphy_5703_reset,
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};
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2004-08-23 10:16:06 +04:00
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static const struct mii_phy_funcs brgphy_5704_funcs = {
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2003-01-16 21:43:40 +03:00
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brgphy_service, brgphy_status, brgphy_5704_reset,
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};
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2004-08-23 10:16:06 +04:00
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static const struct mii_phy_funcs brgphy_5705_funcs = {
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2003-07-17 15:44:26 +04:00
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brgphy_service, brgphy_status, brgphy_5705_reset,
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};
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2004-10-28 11:26:17 +04:00
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const struct mii_phy_funcs brgphy_5750_funcs = {
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brgphy_service, brgphy_status, brgphy_5750_reset,
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};
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2003-01-16 21:43:40 +03:00
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2004-08-23 10:16:06 +04:00
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static const struct mii_phydesc brgphys[] = {
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2001-06-01 20:49:59 +04:00
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{ MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5400,
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MII_STR_BROADCOM_BCM5400 },
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2001-06-03 01:39:38 +04:00
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2001-06-01 20:49:59 +04:00
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{ MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5401,
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MII_STR_BROADCOM_BCM5401 },
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2001-06-03 01:39:38 +04:00
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2001-06-01 20:49:59 +04:00
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{ MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5411,
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MII_STR_BROADCOM_BCM5411 },
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2002-07-12 08:00:10 +04:00
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{ MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5421,
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MII_STR_BROADCOM_BCM5421 },
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2002-06-22 18:38:34 +04:00
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{ MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5701,
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MII_STR_BROADCOM_BCM5701 },
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2002-12-27 06:15:52 +03:00
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{ MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5703,
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MII_STR_BROADCOM_BCM5703 },
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2003-01-16 21:43:40 +03:00
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{ MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5704,
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MII_STR_BROADCOM_BCM5704 },
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2005-12-10 06:03:34 +03:00
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{ MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5705,
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MII_STR_BROADCOM_BCM5705 },
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2005-12-08 06:16:43 +03:00
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{ MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5714,
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MII_STR_BROADCOM_BCM5714 },
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2003-07-17 15:44:26 +04:00
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2004-10-28 11:26:17 +04:00
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{ MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5750,
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MII_STR_BROADCOM_BCM5750 },
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2006-11-26 19:31:48 +03:00
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{ MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5752,
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MII_STR_BROADCOM_BCM5752 },
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2006-04-27 20:43:14 +04:00
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{ MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5780,
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MII_STR_BROADCOM_BCM5780 },
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2001-06-01 20:49:59 +04:00
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{ 0, 0,
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NULL },
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};
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2002-07-13 05:23:27 +04:00
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static void bcm5401_load_dspcode(struct mii_softc *);
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static void bcm5411_load_dspcode(struct mii_softc *);
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2003-01-16 21:43:40 +03:00
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static void bcm5703_load_dspcode(struct mii_softc *);
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static void bcm5704_load_dspcode(struct mii_softc *);
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2004-10-28 11:26:17 +04:00
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static void bcm5750_load_dspcode(struct mii_softc *);
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2002-07-13 05:23:27 +04:00
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2004-08-23 10:16:06 +04:00
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static int
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2006-11-16 04:32:37 +03:00
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brgphymatch(struct device *parent, struct cfdata *match,
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2006-10-12 05:30:41 +04:00
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void *aux)
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2001-06-01 20:49:59 +04:00
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{
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struct mii_attach_args *ma = aux;
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2001-06-03 01:39:38 +04:00
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if (mii_phy_match(ma, brgphys) != NULL)
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2001-06-01 20:49:59 +04:00
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return (10);
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return (0);
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}
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2004-08-23 10:16:06 +04:00
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static void
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2006-11-16 04:32:37 +03:00
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brgphyattach(struct device *parent, struct device *self, void *aux)
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2001-06-01 20:49:59 +04:00
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{
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2006-03-29 10:51:47 +04:00
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struct mii_softc *sc = device_private(self);
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2001-06-01 20:49:59 +04:00
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struct mii_attach_args *ma = aux;
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struct mii_data *mii = ma->mii_data;
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2001-06-03 01:39:38 +04:00
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const struct mii_phydesc *mpd;
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2001-06-01 20:49:59 +04:00
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2001-06-03 01:39:38 +04:00
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mpd = mii_phy_match(ma, brgphys);
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2003-04-29 05:49:33 +04:00
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aprint_naive(": Media interface\n");
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aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
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2001-06-01 20:49:59 +04:00
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sc->mii_inst = mii->mii_instance;
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sc->mii_phy = ma->mii_phyno;
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2007-03-10 12:13:07 +03:00
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sc->mii_mpd_model = MII_MODEL(ma->mii_id2);
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2001-06-01 20:49:59 +04:00
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sc->mii_pdata = mii;
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2002-03-25 23:51:24 +03:00
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sc->mii_flags = ma->mii_flags;
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2006-11-17 00:24:06 +03:00
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sc->mii_anegticks = MII_ANEGTICKS;
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2001-06-01 20:49:59 +04:00
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2002-07-13 05:23:27 +04:00
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switch (MII_MODEL(ma->mii_id2)) {
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case MII_MODEL_BROADCOM_BCM5400:
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sc->mii_funcs = &brgphy_5401_funcs;
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2003-04-29 05:49:33 +04:00
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aprint_normal("%s: using BCM5401 DSP patch\n",
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sc->mii_dev.dv_xname);
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2002-07-13 05:23:27 +04:00
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break;
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case MII_MODEL_BROADCOM_BCM5401:
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if (MII_REV(ma->mii_id2) == 1 || MII_REV(ma->mii_id2) == 3) {
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sc->mii_funcs = &brgphy_5401_funcs;
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2003-04-29 05:49:33 +04:00
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aprint_normal("%s: using BCM5401 DSP patch\n",
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2002-07-13 05:23:27 +04:00
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sc->mii_dev.dv_xname);
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} else
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sc->mii_funcs = &brgphy_funcs;
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break;
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case MII_MODEL_BROADCOM_BCM5411:
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sc->mii_funcs = &brgphy_5411_funcs;
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2003-04-29 05:49:33 +04:00
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aprint_normal("%s: using BCM5411 DSP patch\n",
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sc->mii_dev.dv_xname);
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2002-07-13 05:23:27 +04:00
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break;
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2003-01-16 21:43:40 +03:00
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#ifdef notyet /* unverified, untested */
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case MII_MODEL_BROADCOM_BCM5703:
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sc->mii_funcs = &brgphy_5703_funcs;
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2003-04-29 05:49:33 +04:00
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aprint_normal("%s: using BCM5703 DSP patch\n",
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sc->mii_dev.dv_xname);
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2003-01-16 21:43:40 +03:00
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break;
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#endif
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case MII_MODEL_BROADCOM_BCM5704:
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sc->mii_funcs = &brgphy_5704_funcs;
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2003-04-29 05:49:33 +04:00
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aprint_normal("%s: using BCM5704 DSP patch\n",
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sc->mii_dev.dv_xname);
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2003-01-16 21:43:40 +03:00
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break;
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2003-07-17 15:44:26 +04:00
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case MII_MODEL_BROADCOM_BCM5705:
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sc->mii_funcs = &brgphy_5705_funcs;
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break;
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2005-12-08 06:16:43 +03:00
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case MII_MODEL_BROADCOM_BCM5714:
|
2006-04-27 20:43:14 +04:00
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case MII_MODEL_BROADCOM_BCM5780:
|
2004-10-28 11:26:17 +04:00
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case MII_MODEL_BROADCOM_BCM5750:
|
2006-11-26 19:31:48 +03:00
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case MII_MODEL_BROADCOM_BCM5752:
|
2004-10-28 11:26:17 +04:00
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|
sc->mii_funcs = &brgphy_5750_funcs;
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break;
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|
2002-07-13 05:23:27 +04:00
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|
default:
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|
sc->mii_funcs = &brgphy_funcs;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2001-06-01 20:49:59 +04:00
|
|
|
PHY_RESET(sc);
|
|
|
|
|
|
|
|
sc->mii_capabilities =
|
|
|
|
PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
|
|
|
|
if (sc->mii_capabilities & BMSR_EXTSTAT)
|
|
|
|
sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
|
|
|
|
|
2003-04-29 05:49:33 +04:00
|
|
|
aprint_normal("%s: ", sc->mii_dev.dv_xname);
|
2001-06-01 20:49:59 +04:00
|
|
|
if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 &&
|
|
|
|
(sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0)
|
2003-04-29 05:49:33 +04:00
|
|
|
aprint_error("no media present");
|
2001-06-01 20:49:59 +04:00
|
|
|
else
|
|
|
|
mii_phy_add_media(sc);
|
2003-04-29 05:49:33 +04:00
|
|
|
aprint_normal("\n");
|
2001-06-01 20:49:59 +04:00
|
|
|
}
|
|
|
|
|
2004-08-23 10:16:06 +04:00
|
|
|
static int
|
2001-08-25 22:04:01 +04:00
|
|
|
brgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
|
2001-06-01 20:49:59 +04:00
|
|
|
{
|
|
|
|
struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
|
2007-03-10 12:13:07 +03:00
|
|
|
int reg, speed, gig;
|
2001-06-01 20:49:59 +04:00
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case MII_POLLSTAT:
|
|
|
|
/*
|
|
|
|
* If we're not polling our PHY instance, just return.
|
|
|
|
*/
|
|
|
|
if (IFM_INST(ife->ifm_media) != sc->mii_inst)
|
|
|
|
return (0);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MII_MEDIACHG:
|
|
|
|
/*
|
|
|
|
* If the media indicates a different PHY instance,
|
|
|
|
* isolate ourselves.
|
|
|
|
*/
|
|
|
|
if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
|
|
|
|
reg = PHY_READ(sc, MII_BMCR);
|
|
|
|
PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If the interface is not up, don't do anything.
|
|
|
|
*/
|
|
|
|
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
|
|
|
|
break;
|
|
|
|
|
2007-03-10 12:13:07 +03:00
|
|
|
PHY_RESET(sc); /* XXX hardware bug work-around */
|
|
|
|
|
|
|
|
switch (IFM_SUBTYPE(ife->ifm_media)) {
|
|
|
|
case IFM_AUTO:
|
|
|
|
(void) brgphy_mii_phy_auto(sc);
|
|
|
|
break;
|
|
|
|
case IFM_1000_T:
|
|
|
|
speed = BMCR_S1000;
|
|
|
|
goto setit;
|
|
|
|
case IFM_100_TX:
|
|
|
|
speed = BMCR_S100;
|
|
|
|
goto setit;
|
|
|
|
case IFM_10_T:
|
|
|
|
speed = BMCR_S10;
|
|
|
|
setit:
|
|
|
|
brgphy_loop(sc);
|
|
|
|
if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
|
|
|
|
speed |= BMCR_FDX;
|
|
|
|
gig = GTCR_ADV_1000TFDX;
|
|
|
|
} else {
|
|
|
|
gig = GTCR_ADV_1000THDX;
|
|
|
|
}
|
|
|
|
|
|
|
|
PHY_WRITE(sc, MII_100T2CR, 0);
|
|
|
|
PHY_WRITE(sc, MII_BMCR, speed);
|
|
|
|
PHY_WRITE(sc, MII_ANAR, ANAR_CSMA);
|
|
|
|
|
|
|
|
if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
|
|
|
|
break;
|
|
|
|
|
|
|
|
PHY_WRITE(sc, MII_100T2CR, gig);
|
|
|
|
PHY_WRITE(sc, MII_BMCR,
|
|
|
|
speed|BMCR_AUTOEN|BMCR_STARTNEG);
|
|
|
|
|
|
|
|
if (sc->mii_mpd_model != MII_MODEL_BROADCOM_BCM5701)
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (mii->mii_media.ifm_media & IFM_ETH_MASTER)
|
|
|
|
gig |= GTCR_MAN_MS | GTCR_ADV_MS;
|
|
|
|
PHY_WRITE(sc, MII_100T2CR, gig);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
2001-06-01 20:49:59 +04:00
|
|
|
break;
|
|
|
|
|
|
|
|
case MII_TICK:
|
|
|
|
/*
|
|
|
|
* If we're not currently selected, just return.
|
|
|
|
*/
|
|
|
|
if (IFM_INST(ife->ifm_media) != sc->mii_inst)
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
if (mii_phy_tick(sc) == EJUSTRETURN)
|
|
|
|
return (0);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MII_DOWN:
|
|
|
|
mii_phy_down(sc);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Update the media status. */
|
|
|
|
mii_phy_status(sc);
|
|
|
|
|
2002-07-13 05:23:27 +04:00
|
|
|
/*
|
2007-03-10 12:13:07 +03:00
|
|
|
* Callback if something changed. Note that we need to poke the DSP on
|
|
|
|
* the Broadcom PHYs if the media changes.
|
2002-07-13 05:23:27 +04:00
|
|
|
*/
|
2005-02-27 03:26:58 +03:00
|
|
|
if (sc->mii_media_active != mii->mii_media_active ||
|
2002-07-13 05:23:27 +04:00
|
|
|
sc->mii_media_status != mii->mii_media_status ||
|
|
|
|
cmd == MII_MEDIACHG) {
|
|
|
|
mii_phy_update(sc, cmd);
|
|
|
|
if (sc->mii_funcs == &brgphy_5401_funcs)
|
|
|
|
bcm5401_load_dspcode(sc);
|
|
|
|
else if (sc->mii_funcs == &brgphy_5411_funcs)
|
|
|
|
bcm5411_load_dspcode(sc);
|
|
|
|
}
|
2001-06-01 20:49:59 +04:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2004-08-23 10:16:06 +04:00
|
|
|
static void
|
2001-08-25 22:04:01 +04:00
|
|
|
brgphy_status(struct mii_softc *sc)
|
2001-06-01 20:49:59 +04:00
|
|
|
{
|
|
|
|
struct mii_data *mii = sc->mii_pdata;
|
|
|
|
struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
|
|
|
|
int bmcr, auxsts, gtsr;
|
|
|
|
|
|
|
|
mii->mii_media_status = IFM_AVALID;
|
|
|
|
mii->mii_media_active = IFM_ETHER;
|
|
|
|
|
|
|
|
auxsts = PHY_READ(sc, BRGPHY_MII_AUXSTS);
|
|
|
|
|
|
|
|
if (auxsts & BRGPHY_AUXSTS_LINK)
|
|
|
|
mii->mii_media_status |= IFM_ACTIVE;
|
|
|
|
|
|
|
|
bmcr = PHY_READ(sc, MII_BMCR);
|
|
|
|
if (bmcr & BMCR_ISO) {
|
|
|
|
mii->mii_media_active |= IFM_NONE;
|
|
|
|
mii->mii_media_status = 0;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (bmcr & BMCR_LOOP)
|
|
|
|
mii->mii_media_active |= IFM_LOOP;
|
|
|
|
|
|
|
|
if (bmcr & BMCR_AUTOEN) {
|
|
|
|
/*
|
|
|
|
* The media status bits are only valid of autonegotiation
|
|
|
|
* has completed (or it's disabled).
|
|
|
|
*/
|
|
|
|
if ((auxsts & BRGPHY_AUXSTS_ACOMP) == 0) {
|
|
|
|
/* Erg, still trying, I guess... */
|
|
|
|
mii->mii_media_active |= IFM_NONE;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (auxsts & BRGPHY_AUXSTS_AN_RES) {
|
|
|
|
case BRGPHY_RES_1000FD:
|
2001-06-30 21:53:58 +04:00
|
|
|
mii->mii_media_active |= IFM_1000_T|IFM_FDX;
|
2001-06-01 20:49:59 +04:00
|
|
|
gtsr = PHY_READ(sc, MII_100T2SR);
|
|
|
|
if (gtsr & GTSR_MS_RES)
|
|
|
|
mii->mii_media_active |= IFM_ETH_MASTER;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BRGPHY_RES_1000HD:
|
2001-06-30 21:53:58 +04:00
|
|
|
mii->mii_media_active |= IFM_1000_T;
|
2001-06-01 20:49:59 +04:00
|
|
|
gtsr = PHY_READ(sc, MII_100T2SR);
|
|
|
|
if (gtsr & GTSR_MS_RES)
|
|
|
|
mii->mii_media_active |= IFM_ETH_MASTER;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BRGPHY_RES_100FD:
|
|
|
|
mii->mii_media_active |= IFM_100_TX|IFM_FDX;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BRGPHY_RES_100T4:
|
|
|
|
mii->mii_media_active |= IFM_100_T4;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BRGPHY_RES_100HD:
|
|
|
|
mii->mii_media_active |= IFM_100_TX;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BRGPHY_RES_10FD:
|
|
|
|
mii->mii_media_active |= IFM_10_T|IFM_FDX;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BRGPHY_RES_10HD:
|
|
|
|
mii->mii_media_active |= IFM_10_T;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
mii->mii_media_active |= IFM_NONE;
|
|
|
|
mii->mii_media_status = 0;
|
|
|
|
}
|
2004-04-10 22:47:56 +04:00
|
|
|
if (mii->mii_media_active & IFM_FDX)
|
2004-04-11 19:40:56 +04:00
|
|
|
mii->mii_media_active |= mii_phy_flowstatus(sc);
|
2001-06-01 20:49:59 +04:00
|
|
|
} else
|
|
|
|
mii->mii_media_active = ife->ifm_media;
|
|
|
|
}
|
2002-07-13 05:23:27 +04:00
|
|
|
|
2007-03-10 12:13:07 +03:00
|
|
|
int
|
|
|
|
brgphy_mii_phy_auto(struct mii_softc *sc)
|
|
|
|
{
|
|
|
|
int anar, ktcr = 0;
|
|
|
|
|
|
|
|
brgphy_loop(sc);
|
|
|
|
PHY_RESET(sc);
|
|
|
|
ktcr = GTCR_ADV_1000TFDX|GTCR_ADV_1000THDX;
|
|
|
|
if (sc->mii_mpd_model == MII_MODEL_BROADCOM_BCM5701)
|
|
|
|
ktcr |= GTCR_MAN_MS|GTCR_ADV_MS;
|
|
|
|
PHY_WRITE(sc, MII_100T2CR, ktcr);
|
|
|
|
ktcr = PHY_READ(sc, MII_100T2CR);
|
|
|
|
DELAY(1000);
|
|
|
|
anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
|
|
|
|
if (sc->mii_flags & MIIF_DOPAUSE)
|
|
|
|
anar |= ANAR_FC| ANAR_X_PAUSE_ASYM;
|
|
|
|
|
|
|
|
PHY_WRITE(sc, MII_ANAR, anar);
|
|
|
|
DELAY(1000);
|
|
|
|
PHY_WRITE(sc, MII_BMCR,
|
|
|
|
BMCR_AUTOEN | BMCR_STARTNEG);
|
|
|
|
PHY_WRITE(sc, BRGPHY_MII_IMR, 0xFF00);
|
|
|
|
|
|
|
|
return (EJUSTRETURN);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
brgphy_loop(struct mii_softc *sc)
|
|
|
|
{
|
|
|
|
u_int32_t bmsr;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
PHY_WRITE(sc, MII_BMCR, BMCR_LOOP);
|
|
|
|
for (i = 0; i < 15000; i++) {
|
|
|
|
bmsr = PHY_READ(sc, MII_BMSR);
|
|
|
|
if (!(bmsr & BMSR_LINK))
|
|
|
|
break;
|
|
|
|
DELAY(10);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2004-08-23 10:16:06 +04:00
|
|
|
static void
|
2002-07-13 05:23:27 +04:00
|
|
|
brgphy_5401_reset(struct mii_softc *sc)
|
|
|
|
{
|
|
|
|
|
|
|
|
mii_phy_reset(sc);
|
|
|
|
bcm5401_load_dspcode(sc);
|
|
|
|
}
|
|
|
|
|
2004-08-23 10:16:06 +04:00
|
|
|
static void
|
2002-07-13 05:23:27 +04:00
|
|
|
brgphy_5411_reset(struct mii_softc *sc)
|
|
|
|
{
|
|
|
|
|
|
|
|
mii_phy_reset(sc);
|
|
|
|
bcm5411_load_dspcode(sc);
|
|
|
|
}
|
|
|
|
|
2003-01-16 21:43:40 +03:00
|
|
|
|
2004-08-23 10:16:06 +04:00
|
|
|
static void
|
2003-01-16 21:43:40 +03:00
|
|
|
brgphy_5703_reset(struct mii_softc *sc)
|
|
|
|
{
|
|
|
|
|
|
|
|
mii_phy_reset(sc);
|
|
|
|
bcm5703_load_dspcode(sc);
|
|
|
|
}
|
|
|
|
|
2004-08-23 10:16:06 +04:00
|
|
|
static void
|
2003-01-16 21:43:40 +03:00
|
|
|
brgphy_5704_reset(struct mii_softc *sc)
|
|
|
|
{
|
|
|
|
|
|
|
|
mii_phy_reset(sc);
|
|
|
|
bcm5704_load_dspcode(sc);
|
|
|
|
}
|
|
|
|
|
2003-07-17 15:44:26 +04:00
|
|
|
/*
|
|
|
|
* Hardware bug workaround. Do nothing since after
|
|
|
|
* reset the 5705 PHY would get stuck in 10/100 MII mode.
|
|
|
|
*/
|
|
|
|
|
2004-08-23 10:16:06 +04:00
|
|
|
static void
|
2006-11-16 04:32:37 +03:00
|
|
|
brgphy_5705_reset(struct mii_softc *sc)
|
2003-07-17 15:44:26 +04:00
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2004-10-28 11:26:17 +04:00
|
|
|
static void
|
|
|
|
brgphy_5750_reset(struct mii_softc *sc)
|
|
|
|
{
|
|
|
|
mii_phy_reset(sc);
|
|
|
|
bcm5750_load_dspcode(sc);
|
|
|
|
}
|
|
|
|
|
2003-01-16 23:02:05 +03:00
|
|
|
/* Turn off tap power management on 5401. */
|
2002-07-13 05:23:27 +04:00
|
|
|
static void
|
|
|
|
bcm5401_load_dspcode(struct mii_softc *sc)
|
|
|
|
{
|
|
|
|
static const struct {
|
|
|
|
int reg;
|
|
|
|
uint16_t val;
|
|
|
|
} dspcode[] = {
|
2003-01-16 23:02:05 +03:00
|
|
|
{ BRGPHY_MII_AUXCTL, 0x0c20 },
|
2002-07-13 05:23:27 +04:00
|
|
|
{ BRGPHY_MII_DSP_ADDR_REG, 0x0012 },
|
|
|
|
{ BRGPHY_MII_DSP_RW_PORT, 0x1804 },
|
|
|
|
{ BRGPHY_MII_DSP_ADDR_REG, 0x0013 },
|
|
|
|
{ BRGPHY_MII_DSP_RW_PORT, 0x1204 },
|
|
|
|
{ BRGPHY_MII_DSP_ADDR_REG, 0x8006 },
|
|
|
|
{ BRGPHY_MII_DSP_RW_PORT, 0x0132 },
|
|
|
|
{ BRGPHY_MII_DSP_ADDR_REG, 0x8006 },
|
|
|
|
{ BRGPHY_MII_DSP_RW_PORT, 0x0232 },
|
|
|
|
{ BRGPHY_MII_DSP_ADDR_REG, 0x201f },
|
|
|
|
{ BRGPHY_MII_DSP_RW_PORT, 0x0a20 },
|
|
|
|
{ 0, 0 },
|
|
|
|
};
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; dspcode[i].reg != 0; i++)
|
|
|
|
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
|
2003-01-16 23:02:05 +03:00
|
|
|
delay(40);
|
2002-07-13 05:23:27 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
bcm5411_load_dspcode(struct mii_softc *sc)
|
|
|
|
{
|
|
|
|
static const struct {
|
|
|
|
int reg;
|
|
|
|
uint16_t val;
|
|
|
|
} dspcode[] = {
|
|
|
|
{ 0x1c, 0x8c23 },
|
|
|
|
{ 0x1c, 0x8ca3 },
|
|
|
|
{ 0x1c, 0x8c23 },
|
|
|
|
{ 0, 0 },
|
|
|
|
};
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; dspcode[i].reg != 0; i++)
|
|
|
|
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
|
|
|
|
}
|
2003-01-16 21:43:40 +03:00
|
|
|
|
|
|
|
static void
|
|
|
|
bcm5703_load_dspcode(struct mii_softc *sc)
|
|
|
|
{
|
|
|
|
static const struct {
|
|
|
|
int reg;
|
|
|
|
uint16_t val;
|
|
|
|
} dspcode[] = {
|
|
|
|
{ BRGPHY_MII_AUXCTL, 0x0c00 },
|
|
|
|
{ BRGPHY_MII_DSP_ADDR_REG, 0x201f },
|
|
|
|
{ BRGPHY_MII_DSP_RW_PORT, 0x2aaa },
|
|
|
|
{ 0, 0 },
|
|
|
|
};
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; dspcode[i].reg != 0; i++)
|
|
|
|
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
bcm5704_load_dspcode(struct mii_softc *sc)
|
|
|
|
{
|
|
|
|
static const struct {
|
|
|
|
int reg;
|
|
|
|
uint16_t val;
|
|
|
|
} dspcode[] = {
|
|
|
|
{ 0x1c, 0x8d68 },
|
|
|
|
{ 0x1c, 0x8d68 },
|
|
|
|
{ 0, 0 },
|
|
|
|
};
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; dspcode[i].reg != 0; i++)
|
|
|
|
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
|
|
|
|
}
|
2004-10-28 11:26:17 +04:00
|
|
|
|
|
|
|
static void
|
|
|
|
bcm5750_load_dspcode(struct mii_softc *sc)
|
|
|
|
{
|
|
|
|
static const struct {
|
|
|
|
int reg;
|
|
|
|
uint16_t val;
|
|
|
|
} dspcode[] = {
|
|
|
|
{ BRGPHY_MII_AUXCTL, 0x0c00 },
|
|
|
|
{ BRGPHY_MII_DSP_ADDR_REG, 0x000a },
|
|
|
|
{ BRGPHY_MII_DSP_RW_PORT, 0x310b },
|
|
|
|
{ BRGPHY_MII_DSP_ADDR_REG, 0x201f },
|
|
|
|
{ BRGPHY_MII_DSP_RW_PORT, 0x9506 },
|
|
|
|
{ BRGPHY_MII_DSP_ADDR_REG, 0x401f },
|
|
|
|
{ BRGPHY_MII_DSP_RW_PORT, 0x14e2 },
|
|
|
|
{ BRGPHY_MII_AUXCTL, 0x0400 },
|
|
|
|
{ 0, 0 },
|
|
|
|
};
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; dspcode[i].reg != 0; i++)
|
|
|
|
PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
|
|
|
|
}
|