1997-03-13 00:09:43 +03:00
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/* $NetBSD: pci_kn8ae.c,v 1.2 1997/03/12 21:10:19 cgd Exp $ */
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1997-03-12 22:19:54 +03:00
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/*
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1997-03-13 00:09:43 +03:00
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* Copyright (c) 1997 by Matthew Jacob
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1997-03-12 22:19:54 +03:00
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* NASA AMES Research Center.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <sys/syslog.h>
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#include <vm/vm.h>
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#include <machine/autoconf.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <alpha/pci/dwlpxreg.h>
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#include <alpha/pci/dwlpxvar.h>
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#include <alpha/pci/pci_kn8ae.h>
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#ifndef EVCNT_COUNTERS
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#include <machine/intrcnt.h>
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#endif
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int dec_kn8ae_intr_map __P((void *, pcitag_t, int, int,
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pci_intr_handle_t *));
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const char *dec_kn8ae_intr_string __P((void *, pci_intr_handle_t));
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void *dec_kn8ae_intr_establish __P((void *, pci_intr_handle_t,
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int, int (*func)(void *), void *));
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void dec_kn8ae_intr_disestablish __P((void *, void *));
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#define NIONODE 5
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#define NHOSE 4
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struct vectab {
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int (*func) __P((void *));
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void *arg;
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} vectab[NIONODE][NHOSE][DWLPX_MAXDEV];
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static u_int32_t imaskcache[NIONODE][NHOSE][NHPC];
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#ifdef EVCNT_COUNTERS
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struct evcnt kn8ae_intr_evcnt;
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#endif
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int kn8ae_spurious __P((void *));
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void kn8ae_iointr __P((void *framep, unsigned long vec));
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void kn8ae_enadis_intr __P((pci_intr_handle_t, int));
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void kn8ae_enable_intr __P((pci_intr_handle_t irq));
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void kn8ae_disable_intr __P((pci_intr_handle_t irq));
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void
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pci_kn8ae_pickintr(ccp, first)
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struct dwlpx_config *ccp;
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int first;
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{
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int io, hose, dev;
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pci_chipset_tag_t pc = &ccp->cc_pc;
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pc->pc_intr_v = ccp;
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pc->pc_intr_map = dec_kn8ae_intr_map;
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pc->pc_intr_string = dec_kn8ae_intr_string;
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pc->pc_intr_establish = dec_kn8ae_intr_establish;
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pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish;
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if (!first) {
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return;
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}
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for (io = 0; io < NIONODE; io++) {
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for (hose = 0; hose < NHOSE; hose++) {
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for (dev = 0; dev < DWLPX_MAXDEV; dev++) {
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vectab[io][hose][dev].func = kn8ae_spurious;
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vectab[io][hose][dev].arg = (void *)
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(u_int64_t) DWLPX_MVEC(io, hose, dev);
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}
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}
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}
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for (io = 0; io < NIONODE; io++) {
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for (hose = 0; hose < NHOSE; hose++) {
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for (dev = 0; dev < NHPC; dev++) {
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imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT;
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}
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}
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}
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set_iointr(kn8ae_iointr);
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}
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int
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dec_kn8ae_intr_map(ccv, bustag, buspin, line, ihp)
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void *ccv;
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pcitag_t bustag;
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int buspin, line;
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pci_intr_handle_t *ihp;
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{
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int device, ionode, hose;
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struct dwlpx_config *ccp = ccv;
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pci_chipset_tag_t pc = &ccp->cc_pc;
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if (buspin == 0) {
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/* No IRQ used. */
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return 1;
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}
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if (buspin > 4) {
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printf("pci_map_int: bad interrupt pin %d\n", buspin);
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return 1;
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}
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pci_decompose_tag(pc, bustag, NULL, &device, NULL);
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ionode = ccp->cc_sc->dwlpx_node - 4;
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hose = ccp->cc_sc->dwlpx_hosenum;
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/*
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* handle layout:
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* bits 0..15 DWLPX_MVEC(ionode, hose, device)
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* bits 16-24 buspin (1..N)
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* bits 24-31 IPL
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*/
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*ihp = DWLPX_MVEC(ionode, hose, device) | (buspin << 16) | (14 << 24);
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return (0);
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}
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const char *
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dec_kn8ae_intr_string(ccv, ih)
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void *ccv;
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pci_intr_handle_t ih;
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{
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static char irqstr[64];
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sprintf(irqstr, "kn8ae irq %d vector 0x%x PCI Interrupt Pin %c",
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(ih >> 24), ih & 0xffff, (((ih >> 16) & 0x7) - 1) + 'A');
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return (irqstr);
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}
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void *
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dec_kn8ae_intr_establish(ccv, ih, level, func, arg)
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void *ccv;
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pci_intr_handle_t ih;
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int level;
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int (*func) __P((void *));
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void *arg;
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{
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struct dwlpx_config *ccp = ccv;
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void *cookie = NULL;
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int ionode, hose, device, s;
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struct vectab *vp;
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ionode = ccp->cc_sc->dwlpx_node - 4;
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hose = ccp->cc_sc->dwlpx_hosenum;
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device = DWLPX_MVEC_PCISLOT(ih);
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if (ionode < 0 || ionode >= NIONODE) {
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panic("dec_kn8ae_intr_establish: bad ionode %d\n", ionode);
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}
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if (hose < 0 || hose >= NHOSE) {
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panic("dec_kn8ae_intr_establish: bad hose %d\n", hose);
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}
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if (device < 0 || device >= DWLPX_MAXDEV) {
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panic("dec_kn8ae_intr_establish: bad device %d\n", device);
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}
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vp = &vectab[ionode][hose][device];
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if (vp->func != kn8ae_spurious) {
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printf("dec_kn8ae_intr_establish: vector 0x%x already used\n",
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ih & 0xffff);
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return (cookie);
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}
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s = splhigh();
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vp->func = func;
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vp->arg = arg;
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(void) splx(s);
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kn8ae_enable_intr(ih);
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cookie = (void *) (u_int64_t) DWLPX_MVEC(ionode, hose, device);
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return (cookie);
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}
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void
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dec_kn8ae_intr_disestablish(ccv, cookie)
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void *ccv, *cookie;
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{
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int ionode, hose, device, s;
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struct vectab *vp;
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ionode = DWLPX_MVEC_IONODE(cookie);
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hose = DWLPX_MVEC_HOSE(cookie);
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device = DWLPX_MVEC_PCISLOT(cookie);
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if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE ||
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device < 0 || device >= DWLPX_MAXDEV) {
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return;
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}
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vp = &vectab[ionode][hose][device];
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s = splhigh();
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vp->func = kn8ae_spurious;
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vp->arg = cookie;
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(void) splx(s);
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}
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void
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kn8ae_iointr(framep, vec)
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void *framep;
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unsigned long vec;
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{
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struct vectab *vp;
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int ionode, hose, device;
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if ((vec & DWLPX_VEC_MARK) == 0) {
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panic("kn8ae_iointr: vec 0x%x\n", vec);
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}
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#ifdef EVCNT_COUNTERS
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kn8ae_intr_evcnt.ev_count++;
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#else
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; /* XXX */
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#endif
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ionode = DWLPX_MVEC_IONODE(vec);
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hose = DWLPX_MVEC_HOSE(vec);
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device = DWLPX_MVEC_PCISLOT(vec);
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if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE ||
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device < 0 || device >= DWLPX_MAXDEV) {
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panic("kn8ae_iointr: malformed vector 0x%x\n", vec);
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}
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vp = &vectab[ionode][hose][device];
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if ((*vp->func)(vp->arg) == 0) {
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printf("kn8ae_iointr: TLSB Node %d Hose %d Slot %d - "
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" unclaimed interrupt\n", ionode + 4, hose, device);
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}
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}
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int
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kn8ae_spurious(arg)
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void *arg;
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{
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int ionode, hose, device;
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ionode = DWLPX_MVEC_IONODE(arg);
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hose = DWLPX_MVEC_HOSE(arg);
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device = DWLPX_MVEC_PCISLOT(arg);
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printf("Spurious Interrupt from TLSB Node %d Hose %d Slot %d\n",
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ionode + 4, hose, device);
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return (-1);
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}
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void
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kn8ae_enadis_intr(irq, onoff)
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pci_intr_handle_t irq;
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int onoff;
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{
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unsigned long paddr;
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u_int32_t val;
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int ionode, hose, device, hpc, busp, s;
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ionode = DWLPX_MVEC_IONODE(irq);
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hose = DWLPX_MVEC_HOSE(irq);
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device = DWLPX_MVEC_PCISLOT(irq);
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busp = 1 << (((irq >> 16) & 0xff) - 1);
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paddr = (1LL << 39);
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paddr |= (unsigned long) ionode << 36;
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paddr |= (unsigned long) hose << 34;
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if (device < 4) {
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hpc = 0;
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} else if (device < 8) {
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hpc = 1;
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device -= 4;
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} else {
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hpc = 2;
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device -= 8;
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}
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busp <<= (device << 2);
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val = imaskcache[ionode][hose][hpc];
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if (onoff)
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val |= busp;
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else
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val &= ~busp;
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imaskcache[ionode][hose][hpc] = val;
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#if 0
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printf("kn8ae_%s_intr: irq %lx imsk 0x%x hpc %d TLSB node %d hose %d\n",
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onoff? "enable" : "disable", irq, val, hpc, ionode + 4, hose);
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#endif
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s = splhigh();
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REGVAL(PCIA_IMASK(hpc) + paddr) = val;
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alpha_mb();
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(void) splx(s);
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}
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void
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kn8ae_enable_intr(irq)
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pci_intr_handle_t irq;
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{
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kn8ae_enadis_intr(irq, 1);
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}
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void
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kn8ae_disable_intr(irq)
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pci_intr_handle_t irq;
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{
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kn8ae_enadis_intr(irq, 0);
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}
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