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AlphaServer 8200 & 8400 support, including CPU specific details, TurboLaser 

system bus support, and KFTxx support.  From Matthew Jacob, NASA Ames
Research Center.
This commit is contained in:
cgd 1997-03-12 19:19:54 +00:00
parent 773a52a313
commit ffba332bb5
18 changed files with 2746 additions and 0 deletions
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228
sys/arch/alpha/alpha/dec_kn8ae.c Normal file
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/* $NetBSD: dec_kn8ae.c,v 1.1 1997/03/12 19:19:54 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/termios.h>
#include <dev/cons.h>
#include <machine/rpb.h>
#include <machine/autoconf.h>
#include <machine/cpuconf.h>
#include <dev/isa/isavar.h>
#include <dev/isa/comreg.h>
#include <dev/isa/comvar.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <alpha/pci/ciareg.h>
#include <alpha/pci/ciavar.h>
#include <scsi/scsi_all.h>
#include <scsi/scsiconf.h>
cpu_decl(dec_kn8ae);
const char *
dec_kn8ae_model_name()
{
static const char *srv = "AlphaServer 8400";
if ((hwrpb->rpb_variation & SV_ST_MASK) != 0) {
static char s[80];
sprintf(s, "%s, System Variation %lx\n", srv,
hwrpb->rpb_variation & SV_ST_MASK);
return ((const char *)s);
} else {
return (srv);
}
}
void
dec_kn8ae_cons_init()
{
struct ctb *ctb;
ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
/*
* The AXP 8X00 seems to encode the
* type of console in the ctb_type field,
* not the ctb_term_type field.
*/
if (ctb->ctb_type != 2) {
panic("consinit: unsupported console type %d\n",
ctb->ctb_term_type);
/* NOTREACHED */
} else {
/*
* XXX: We don't know what kind of Console this is
* XXX: yet, so we won't change anything and let
* XXX: the prom cnputc routine remap the prom in
* XXX: as needed.
*/
}
}
const char *
dec_kn8ae_iobus_name()
{
return ("tlsb");
}
/* #define BDEBUG 1 */
void
dec_kn8ae_device_register(dev, aux)
struct device *dev;
void *aux;
{
static int found, initted, scsiboot, netboot;
static struct device *pcidev, *scsidev;
struct bootdev_data *b = bootdev_data;
struct device *parent = dev->dv_parent;
struct cfdata *cf = dev->dv_cfdata;
struct cfdriver *cd = cf->cf_driver;
if (found)
return;
if (!initted) {
scsiboot = (strcmp(b->protocol, "scsi") == 0);
netboot = (strcmp(b->protocol, "bootp") == 0);
netboot = (strcmp(b->protocol, "mop") == 0);
#if BDEBUG
printf("proto:%s bus:%d slot:%d chan:%d", b->protocol,
b->bus, b->slot, b->channel);
if (b->remote_address)
printf(" remote_addr:%s", b->remote_address);
printf(" un:%d bdt:%d", b->unit, b->boot_dev_type);
if (b->ctrl_dev_type)
printf(" cdt:%s\n", b->ctrl_dev_type);
else
printf("\n");
printf("scsiboot = %d, netboot = %d\n", scsiboot, netboot);
#endif
initted = 1;
}
if (pcidev == NULL) {
if (strcmp(cd->cd_name, "pci"))
return;
else {
struct pcibus_attach_args *pba = aux;
if (b->bus != pba->pba_bus)
return;
pcidev = dev;
#if BDEBUG
printf("\npcidev = %s\n", pcidev->dv_xname);
#endif
return;
}
}
if (scsiboot && (scsidev == NULL)) {
if (parent != pcidev)
return;
else {
struct pci_attach_args *pa = aux;
if (b->slot != pa->pa_device)
return;
/* XXX function? */
scsidev = dev;
#if BDEBUG
printf("\nscsidev = %s\n", scsidev->dv_xname);
#endif
return;
}
}
if (scsiboot &&
(!strcmp(cd->cd_name, "sd") ||
!strcmp(cd->cd_name, "st") ||
!strcmp(cd->cd_name, "cd"))) {
struct scsibus_attach_args *sa = aux;
if (parent->dv_parent != scsidev)
return;
if (b->unit / 100 != sa->sa_sc_link->target)
return;
/* XXX LUN! */
/*
* the value in boot_dev_type is some wierd number
* XXX: Only support SD booting for now.
*/
if (strcmp(cd->cd_name, "sd") &&
strcmp(cd->cd_name, "cd") &&
strcmp(cd->cd_name, "st"))
return;
/* we've found it! */
booted_device = dev;
#if BDEBUG
printf("\nbooted_device = %s\n", booted_device->dv_xname);
#endif
found = 1;
}
if (netboot) {
if (parent != pcidev)
return;
else {
struct pci_attach_args *pa = aux;
if (b->slot != pa->pa_device)
return;
/* XXX function? */
booted_device = dev;
#if BDEBUG
printf("\nbooted_device = %s\n", booted_device->dv_xname);
#endif
found = 1;
return;
}
}
}

238
sys/arch/alpha/pci/dwlpx.c Normal file
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/* $NetBSD: dwlpx.c,v 1.1 1997/03/12 19:19:56 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/device.h>
#include <vm/vm.h>
#include <machine/autoconf.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <alpha/tlsb/tlsbreg.h>
#include <alpha/tlsb/kftxxvar.h>
#include <alpha/tlsb/kftxxreg.h>
#include <alpha/pci/dwlpxreg.h>
#include <alpha/pci/dwlpxvar.h>
#include <alpha/pci/pci_kn8ae.h>
#include <alpha/include/pmap.old.h>
#define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
static int dwlpxmatch __P((struct device *, struct cfdata *, void *));
static void dwlpxattach __P((struct device *, struct device *, void *));
struct cfattach dwlpx_ca = {
sizeof(struct dwlpx_softc), dwlpxmatch, dwlpxattach
};
struct cfdriver dwlpx_cd = {
NULL, "dwlpx", DV_DULL,
};
static int dwlpxprint __P((void *, const char *));
static int
dwlpxprint(aux, pnp)
void *aux;
const char *pnp;
{
register struct pcibus_attach_args *pba = aux;
/* only PCIs can attach to DWLPX's; easy. */
if (pnp)
printf("%s at %s", pba->pba_busname, pnp);
printf(" bus %d", pba->pba_bus);
return (UNCONF);
}
static int
dwlpxmatch(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct kft_dev_attach_args *ka = aux;
if (strcmp(ka->ka_name, dwlpx_cd.cd_name) != 0)
return (0);
return (1);
}
static void
dwlpxattach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
static int once = 0;
struct dwlpx_softc *sc = (struct dwlpx_softc *)self;
struct kft_dev_attach_args *ka = aux;
struct pcibus_attach_args pba;
sc->dwlpx_node = ka->ka_node;
sc->dwlpx_dtype = ka->ka_dtype;
sc->dwlpx_hosenum = ka->ka_hosenum;
/*
* On reads, you get a fault if you read a nonexisted HPC.
* The internal KFTIA hose (hose 0) has only 2 HPCs.
*/
sc->dwlpx_nhpc = NHPC;
if (sc->dwlpx_hosenum == 0) {
if (TLDEV_DTYPE(sc->dwlpx_dtype) == TLDEV_DTYPE_KFTIA) {
sc->dwlpx_nhpc = NHPC - 1;
}
}
dwlpx_init(sc);
printf(", hose %d\n", sc->dwlpx_hosenum);
if (once == 0) {
/*
* Set up interrupts
*/
pci_kn8ae_pickintr(&sc->dwlpx_cc, 1);
#ifdef EVCNT_COUNTERS
evcnt_attach(self, "intr", kn8ae_intr_evcnt);
#endif
once++;
} else {
pci_kn8ae_pickintr(&sc->dwlpx_cc, 0);
}
/*
* Attach PCI bus
*/
pba.pba_busname = "pci";
pba.pba_iot = sc->dwlpx_cc.cc_iot;
pba.pba_memt = sc->dwlpx_cc.cc_memt;
pba.pba_pc = &sc->dwlpx_cc.cc_pc;
pba.pba_bus = 0;
config_found(self, &pba, dwlpxprint);
}
void
dwlpx_init(sc)
struct dwlpx_softc *sc;
{
int i;
struct dwlpx_config *ccp = &sc->dwlpx_cc;
if (ccp->cc_initted == 0) {
ccp->cc_iot = dwlpx_bus_io_init(ccp);
ccp->cc_memt = dwlpx_bus_mem_init(ccp);
}
dwlpx_pci_init(&ccp->cc_pc, ccp);
ccp->cc_sc = sc;
/*
* Establish a precalculated base for convenience's sake.
*/
ccp->cc_sysbase =
(((unsigned long)(sc->dwlpx_node - 4)) << 36) |
(((unsigned long) sc->dwlpx_hosenum) << 34) |
(1LL << 39);
/*
* Set up DMA windows for this DWLPX.
*
* Basically, we set up for a 1GB direct mapped window,
* starting from PCI address 0x40000000. And that's it.
*
* Do this even for all HPCs- even for the nonexistent
* one on hose zero of a KFTIA.
*/
for (i = 0; i < NHPC; i++) {
REGVAL(PCIA_WMASK_A(i) + ccp->cc_sysbase) = 0;
REGVAL(PCIA_TBASE_A(i) + ccp->cc_sysbase) = 0;
REGVAL(PCIA_WBASE_A(i) + ccp->cc_sysbase) = 0;
REGVAL(PCIA_WMASK_B(i) + ccp->cc_sysbase) = 0x3fff0000;
REGVAL(PCIA_TBASE_B(i) + ccp->cc_sysbase) = 0;
REGVAL(PCIA_WBASE_B(i) + ccp->cc_sysbase) = 0x40000002;
REGVAL(PCIA_WMASK_C(i) + ccp->cc_sysbase) = 0;
REGVAL(PCIA_TBASE_C(i) + ccp->cc_sysbase) = 0;
REGVAL(PCIA_WBASE_C(i) + ccp->cc_sysbase) = 0;
}
/* XXX XXX BEGIN XXX XXX */
{ /* XXX */
extern vm_offset_t alpha_XXX_dmamap_or; /* XXX */
alpha_XXX_dmamap_or = 0x40000000; /* XXX */
} /* XXX */
/* XXX XXX END XXX XXX */
/*
* Set up interrupt stuff for this DWLPX.
*
* Note that all PCI interrupt pins are disabled at this time.
*
* Do this even for all HPCs- even for the nonexistent
* one on hose zero of a KFTIA.
*/
for (i = 0; i < NHPC; i++) {
REGVAL(PCIA_IMASK(i) + ccp->cc_sysbase) = DWLPX_IMASK_DFLT;
REGVAL(PCIA_ERRVEC(i) + ccp->cc_sysbase) =
DWLPX_ERRVEC((sc->dwlpx_node - 4), sc->dwlpx_hosenum);
}
for (i = 0; i < DWLPX_MAXDEV; i++) {
u_int16_t vec;
int ss, hpc;
vec = DWLPX_MVEC((sc->dwlpx_node - 4), sc->dwlpx_hosenum, i);
ss = i;
if (i < 4) {
hpc = 0;
} else if (i < 8) {
ss -= 4;
hpc = 1;
} else {
ss -= 8;
hpc = 2;
}
REGVAL(PCIA_DEVVEC(hpc, ss, 1) + ccp->cc_sysbase) = vec;
REGVAL(PCIA_DEVVEC(hpc, ss, 2) + ccp->cc_sysbase) = vec;
REGVAL(PCIA_DEVVEC(hpc, ss, 3) + ccp->cc_sysbase) = vec;
REGVAL(PCIA_DEVVEC(hpc, ss, 4) + ccp->cc_sysbase) = vec;
}
/*
* Establish HAE values, as well as make sure of sanity elsewhere.
*/
for (i = 0; i < sc->dwlpx_nhpc; i++) {
u_int32_t ctl = REGVAL(PCIA_CTL(i) + ccp->cc_sysbase);
ctl &= 0x0fffffff;
ctl &= ~((0x1f << 14) | (0x1f << 9) | 0x3);
#if 0
ctl |= ((1 << 14) | (1 << 9));
#endif
REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) = ctl;
}
ccp->cc_initted = 1;
}

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sys/arch/alpha/pci/dwlpx_bus_io.c Normal file
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/* $NetBSD: dwlpx_bus_io.c,v 1.1 1997/03/12 19:19:58 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/syslog.h>
#include <sys/device.h>
#include <vm/vm.h>
#include <machine/bus.h>
#include <alpha/pci/dwlpxreg.h>
#include <alpha/pci/dwlpxvar.h>
#define CHIP dwlpx
#define CHIP_EX_MALLOC_SAFE(v) (1)
#define CHIP_IO_EXTENT(v) (((struct dwlpx_config *)(v))->cc_io_ex)
#define CHIP_IO_EX_STORE(v) (((struct dwlpx_config *)(v))->cc_io_exstorage)
#define CHIP_IO_EX_STORE_SIZE(v) \
(sizeof (((struct dwlpx_config *)(v))->cc_io_exstorage))
/* IO Region 1 */
#define CHIP_IO_W1_BUS_START(v) 0x00000000UL
#define CHIP_IO_W1_BUS_END(v) 0x00ffffffUL
#define CHIP_IO_W1_SYS_START(v) \
(((struct dwlpx_config *)(v))->cc_sysbase | DWLPX_PCI_IOSPACE)
#define CHIP_IO_W1_SYS_END(v) \
(CHIP_IO_W1_SYS_START(v) + ((CHIP_IO_W1_BUS_END(v) + 1) << 5) - 1)
/* IO Region 2 */
#define CHIP_IO_W2_BUS_START(v) \
(((0x0 << 27) & 0xf8000000) + 0x01000000UL)
#define CHIP_IO_W2_BUS_END(v) \
(CHIP_IO_W2_BUS_START(v) + 0x07ffffffUL)
#define CHIP_IO_W2_SYS_START(v) \
(((struct dwlpx_config *)(v))->cc_sysbase + DWLPX_PCI_IOSPACE + \
(0x01000000UL << 5))
#define CHIP_IO_W2_SYS_END(v) \
(((struct dwlpx_config *)(v))->cc_sysbase + DWLPX_PCI_IOSPACE + \
(0x08000000UL << 5) - 1)
#include "pcs_bus_io_common.c"

88
sys/arch/alpha/pci/dwlpx_bus_mem.c Normal file
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/* $NetBSD: dwlpx_bus_mem.c,v 1.1 1997/03/12 19:20:00 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/syslog.h>
#include <sys/device.h>
#include <vm/vm.h>
#include <machine/bus.h>
#include <alpha/pci/dwlpxreg.h>
#include <alpha/pci/dwlpxvar.h>
#define CHIP dwlpx
#define CHIP_EX_MALLOC_SAFE(v) (1)
#define CHIP_D_MEM_EXTENT(v) (((struct dwlpx_config *)(v))->cc_d_mem_ex)
#define CHIP_D_MEM_EX_STORE(v) \
(((struct dwlpx_config *)(v))->cc_dmem_exstorage)
#define CHIP_D_MEM_EX_STORE_SIZE(v) \
(sizeof (((struct dwlpx_config *)(v))->cc_dmem_exstorage))
#define CHIP_S_MEM_EXTENT(v) (((struct dwlpx_config *)(v))->cc_s_mem_ex)
#define CHIP_S_MEM_EX_STORE(v) \
(((struct dwlpx_config *)(v))->cc_smem_exstorage)
#define CHIP_S_MEM_EX_STORE_SIZE(v) \
(sizeof (((struct dwlpx_config *)(v))->cc_smem_exstorage))
/* Dense region 1 */
#define CHIP_D_MEM_W1_BUS_START(v) 0x00000000UL
#define CHIP_D_MEM_W1_BUS_END(v) 0xffffffffUL
#define CHIP_D_MEM_W1_SYS_START(v) \
(((struct dwlpx_config *)(v))->cc_sysbase | DWLPX_PCI_DENSE)
#define CHIP_D_MEM_W1_SYS_END(v) \
(CHIP_D_MEM_W1_SYS_START(v) + 0xffffffffUL)
/* Sparse region 1 */
#define CHIP_S_MEM_W1_BUS_START(v) 0x00000000UL
#define CHIP_S_MEM_W1_BUS_END(v) 0x00ffffffUL
#define CHIP_S_MEM_W1_SYS_START(v) \
(((struct dwlpx_config *)(v))->cc_sysbase | DWLPX_PCI_SPARSE)
#define CHIP_S_MEM_W1_SYS_END(v) \
(CHIP_S_MEM_W1_SYS_START(v) + ((CHIP_S_MEM_W1_BUS_END(v) + 1) << 5) - 1)
/* Sparse region 2 */
#define CHIP_S_MEM_W2_BUS_START(v) \
(((0x0 << 27) & 0xf8000000) + 0x01000000UL)
#define CHIP_S_MEM_W2_BUS_END(v) \
(CHIP_S_MEM_W2_BUS_START(v) + 0x07ffffffUL)
#define CHIP_S_MEM_W2_SYS_START(v) \
((((struct dwlpx_config *)(v))->cc_sysbase|DWLPX_PCI_SPARSE) + \
(0x01000000UL<<5))
#define CHIP_S_MEM_W2_SYS_END(v) \
((((struct dwlpx_config *)(v))->cc_sysbase|DWLPX_PCI_SPARSE) + \
(0x08000000UL<<5) - 1)
#include "pcs_bus_mem_common.c"

260
sys/arch/alpha/pci/dwlpx_pci.c Normal file
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/* $NetBSD: dwlpx_pci.c,v 1.1 1997/03/12 19:20:02 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/device.h>
#include <vm/vm.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <alpha/tlsb/tlsbreg.h>
#include <alpha/pci/dwlpxreg.h>
#include <alpha/pci/dwlpxvar.h>
/* #define DO_SECONDARIES 1 */
#define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
void dwlpx_attach_hook __P((struct device *, struct device *,
struct pcibus_attach_args *));
int dwlpx_bus_maxdevs __P((void *, int));
pcitag_t dwlpx_make_tag __P((void *, int, int, int));
void dwlpx_decompose_tag __P((void *, pcitag_t, int *, int *,
int *));
pcireg_t dwlpx_conf_read __P((void *, pcitag_t, int));
void dwlpx_conf_write __P((void *, pcitag_t, int, pcireg_t));
void
dwlpx_pci_init(pc, v)
pci_chipset_tag_t pc;
void *v;
{
pc->pc_conf_v = v;
pc->pc_attach_hook = dwlpx_attach_hook;
pc->pc_bus_maxdevs = dwlpx_bus_maxdevs;
pc->pc_make_tag = dwlpx_make_tag;
pc->pc_decompose_tag = dwlpx_decompose_tag;
pc->pc_conf_read = dwlpx_conf_read;
pc->pc_conf_write = dwlpx_conf_write;
}
void
dwlpx_attach_hook(parent, self, pba)
struct device *parent, *self;
struct pcibus_attach_args *pba;
{
#if 0
struct dwlpx_config *ccp = pba->pba_pc->pc_conf_v;
printf("dwlpx_attach_hook for %s\n", ccp->cc_sc->dwlpx_dev.dv_xname);
#endif
}
int
dwlpx_bus_maxdevs(cpv, busno)
void *cpv;
int busno;
{
return DWLPX_MAXDEV;
}
pcitag_t
dwlpx_make_tag(cpv, b, d, f)
void *cpv;
int b, d, f;
{
pcitag_t tag;
int hpcdev, pci_idsel;
pci_idsel = (1 << ((d & 0x3) + 2));
hpcdev = d >> 2;
tag = (b << 24) | (hpcdev << 22) | (pci_idsel << 16) | (f << 13);
return (tag);
}
void
dwlpx_decompose_tag(cpv, tag, bp, dp, fp)
void *cpv;
pcitag_t tag;
int *bp, *dp, *fp;
{
if (bp != NULL)
*bp = (tag >> 24) & 0xff;
if (dp != NULL) {
int j, i = (tag >> 18) & 0xf;
j = -1;
while (i != 0) {
j++;
i >>= 1;
}
j += (((tag >> 22) & 3) << 2);
*dp = j;
}
if (fp != NULL)
*fp = (tag >> 13) & 0x7;
}
pcireg_t
dwlpx_conf_read(cpv, tag, offset)
void *cpv;
pcitag_t tag;
int offset;
{
struct dwlpx_config *ccp = cpv;
struct dwlpx_softc *sc;
pcireg_t *dp, data = (pcireg_t) -1;
unsigned long paddr;
int secondary, i, s = 0;
u_int32_t rvp;
if (ccp == NULL) {
panic("NULL ccp in dwlpx_conf_read\n");
}
sc = ccp->cc_sc;
secondary = tag >> 24;
if (secondary) {
#ifdef DO_SECONDARIES
tag &= 0x1fffff;
tag |= (secondary << 21);
printf("read secondary %d reg %x (tag %x)",
secondary, offset, tag);
#if 0
#endif
alpha_pal_draina();
s = splhigh();
/*
* Set up HPCs for type 1 cycles.
*/
for (i = 0; i < sc->dwlpx_nhpc; i++) {
rvp = REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) | 1;
alpha_mb();
REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) = rvp;
alpha_mb();
}
#else
return (data);
#endif
}
paddr = (unsigned long) tag;
paddr |= DWLPX_PCI_CONF;
paddr |= ((unsigned long) ((offset >> 2) << 7));
paddr |= (((unsigned long) sc->dwlpx_hosenum) << 34);
paddr |= (((u_long) sc->dwlpx_node - 4) << 36);
paddr |= (1LL << 39);
dp = (pcireg_t *)KV(paddr);
if (badaddr(dp, sizeof (*dp)) == 0) {
data = *dp;
}
if (secondary) {
alpha_pal_draina();
for (i = 0; i < sc->dwlpx_nhpc; i++) {
rvp = REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) & ~1;
alpha_mb();
REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) = rvp;
alpha_mb();
}
(void) splx(s);
#ifdef DO_SECONDARIES
printf("=%x\n", data);
#if 0
#endif
#endif
}
return (data);
}
void
dwlpx_conf_write(cpv, tag, offset, data)
void *cpv;
pcitag_t tag;
int offset;
pcireg_t data;
{
struct dwlpx_config *ccp = cpv;
struct dwlpx_softc *sc;
pcireg_t *dp;
unsigned long paddr;
int secondary, i, s = 0;
u_int32_t rvp;
if (ccp == NULL) {
panic("NULL ccp in dwlpx_conf_write\n");
}
sc = ccp->cc_sc;
secondary = tag >> 24;
if (secondary) {
tag &= 0x1fffff;
tag |= (secondary << 21);
printf("write secondary %d reg %x (tag %x) with %x\n",
secondary, offset, tag, data);
#if 0
#endif
alpha_pal_draina();
s = splhigh();
/*
* Set up HPCs for type 1 cycles.
*/
for (i = 0; i < sc->dwlpx_nhpc; i++) {
rvp = REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) | 1;
alpha_mb();
REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) = rvp;
alpha_mb();
}
}
paddr = (unsigned long) tag;
paddr |= DWLPX_PCI_CONF;
paddr |= ((unsigned long) ((offset >> 2) << 7));
paddr |= (((unsigned long) sc->dwlpx_hosenum) << 34);
paddr |= (((u_long) sc->dwlpx_node - 4) << 36);
paddr |= (1LL << 39);
dp = (pcireg_t *)KV(paddr);
*dp = data;
alpha_mb();
if (secondary) {
alpha_pal_draina();
for (i = 0; i < sc->dwlpx_nhpc; i++) {
rvp = REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) & ~1;
alpha_mb();
REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) = rvp;
alpha_mb();
}
(void) splx(s);
}
}

134
sys/arch/alpha/pci/dwlpxreg.h Normal file
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/* $NetBSD: dwlpxreg.h,v 1.1 1997/03/12 19:20:03 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Taken from combinations of:
*
* ``DWLPA and DWLPB PCI Adapter Technical Manual,
* Order Number: EK-DWLPX-TM.A01''
*
* and
*
* ``AlphaServer 8200/8400 System Technical Manual,
* Order Number EK-T8030-TM. A01''
*/
#define REGVAL(r) (*(int32_t *)ALPHA_PHYS_TO_K0SEG(r))
/*
* There are (potentially) 4 I/O hoses, and there are three
* (physical) PCI busses per DWLPX.
*
* A CPU to PCI Address Mapping looks (roughly) like this:
*
* 39 38........36 35.34 33.....32 31....................5 4.........3 2...0
* --------------------------------------------------------------------------
* |1| I/O NodeID |Hose#|PCI Space|Byte Aligned I/O <26:0>|Byte Length|0 0 0|
* --------------------------------------------------------------------------
*
* I/O Node is the TLSB Node ID minus 4. Don't ask.
*/
#define NHPC 3
/*
* Address Space Cookies
*
* (lacking I/O Node ID and Hose Numbers)
*/
#define DWLPX_PCI_DENSE 0x000000000LL
#define DWLPX_PCI_SPARSE 0x100000000LL
#define DWLPX_PCI_IOSPACE 0x200000000LL
#define DWLPX_PCI_CONF 0x300000000LL
/*
* PCIA Interface Adapter Register Addresses (Offsets from Node Address)
*
*
* Addresses are for Hose #0, PCI bus #0. Macros below will offset
* per bus. I/O Hose and TLSB Node I/D offsets must be added separately.
*/
#define _PCIA_CTL 0x380000000LL /* PCI 0 Bus Control */
#define _PCIA_MRETRY 0x380000080LL /* PCI 0 Master Retry Limit */
#define _PCIA_GPR 0x380000100LL /* PCI 0 General Purpose */
#define _PCIA_ERR 0x380000180LL /* PCI 0 Error Summary */
#define _PCIA_FADR 0x380000200LL /* PCI 0 Failing Address */
#define _PCIA_IMASK 0x380000280LL /* PCI 0 Interrupt Mask */
#define _PCIA_DIAG 0x380000300LL /* PCI 0 Diagnostic */
#define _PCIA_IPEND 0x380000380LL /* PCI 0 Interrupt Pending */
#define _PCIA_IPROG 0x380000400LL /* PCI 0 Interrupt in Progress */
#define _PCIA_WMASK_A 0x380000480LL /* PCI 0 Window Mask A */
#define _PCIA_WBASE_A 0x380000500LL /* PCI 0 Window Base A */
#define _PCIA_TBASE_A 0x380000580LL /* PCI 0 Window Translated Base A */
#define _PCIA_WMASK_B 0x380000600LL /* PCI 0 Window Mask B */
#define _PCIA_WBASE_B 0x380000680LL /* PCI 0 Window Base B */
#define _PCIA_TBASE_B 0x380000700LL /* PCI 0 Window Translated Base B */
#define _PCIA_WMASK_C 0x380000780LL /* PCI 0 Window Mask C */
#define _PCIA_WBASE_C 0x380000800LL /* PCI 0 Window Base C */
#define _PCIA_TBASE_C 0x380000880LL /* PCI 0 Window Translated Base C */
#define _PCIA_ERRVEC 0x380000900LL /* PCI 0 Error Interrupt Vector */
#define _PCIA_DEVVEC 0x380001000LL /* PCI 0 Device Interrupt Vector */
#define PCIA_CTL(hpc) (_PCIA_CTL + (0x200000 * (hpc)))
#define PCIA_MRETRY(hpc) (_PCIA_MRETRY + (0x200000 * (hpc)))
#define PCIA_GPR(hpc) (_PCIA_GPR + (0x200000 * (hpc)))
#define PCIA_ERR(hpc) (_PCIA_ERR + (0x200000 * (hpc)))
#define PCIA_FADR(hpc) (_PCIA_FADR + (0x200000 * (hpc)))
#define PCIA_IMASK(hpc) (_PCIA_IMASK + (0x200000 * (hpc)))
#define PCIA_DIAG(hpc) (_PCIA_DIAG + (0x200000 * (hpc)))
#define PCIA_IPEND(hpc) (_PCIA_IPEND + (0x200000 * (hpc)))
#define PCIA_IPROG(hpc) (_PCIA_IPROG + (0x200000 * (hpc)))
#define PCIA_WMASK_A(hpc) (_PCIA_WMASK_A + (0x200000 * (hpc)))
#define PCIA_WBASE_A(hpc) (_PCIA_WBASE_A + (0x200000 * (hpc)))
#define PCIA_TBASE_A(hpc) (_PCIA_TBASE_A + (0x200000 * (hpc)))
#define PCIA_WMASK_B(hpc) (_PCIA_WMASK_B + (0x200000 * (hpc)))
#define PCIA_WBASE_B(hpc) (_PCIA_WBASE_B + (0x200000 * (hpc)))
#define PCIA_TBASE_B(hpc) (_PCIA_TBASE_B + (0x200000 * (hpc)))
#define PCIA_WMASK_C(hpc) (_PCIA_WMASK_C + (0x200000 * (hpc)))
#define PCIA_WBASE_C(hpc) (_PCIA_WBASE_C + (0x200000 * (hpc)))
#define PCIA_TBASE_C(hpc) (_PCIA_TBASE_C + (0x200000 * (hpc)))
#define PCIA_ERRVEC(hpc) (_PCIA_ERRVEC + (0x200000 * (hpc)))
#define PCIA_DEVVEC(hpc, subslot, ipin) \
(_PCIA_DEVVEC + (0x200000 * (hpc)) + ((subslot) * 0x200) + ((ipin-1) * 0x80))
#define PCIA_SCYCLE 0x380002000LL /* PCI Special Cycle */
#define PCIA_IACK 0x380002080LL /* PCI Interrupt Acknowledge */
#define PCIA_PRESENT 0x380800000LL /* PCI Slot Present */
#define PCIA_TBIT 0x380A00000LL /* PCI TBIT */
#define PCIA_MCTL 0x380C00000LL /* PCI Module Control */
#define PCIA_IBR 0x380E00000LL /* PCI Information Base Repair */

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sys/arch/alpha/pci/dwlpxvar.h Normal file
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/* $NetBSD: dwlpxvar.h,v 1.1 1997/03/12 19:20:05 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <dev/pci/pcivar.h>
#include <sys/extent.h>
#define _FSTORE (EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long))
/*
* DWLPX configuration.
*/
struct dwlpx_config {
int cc_initted;
bus_space_tag_t cc_iot;
bus_space_tag_t cc_memt;
struct extent * cc_io_ex;
struct extent * cc_d_mem_ex;
struct extent * cc_s_mem_ex;
struct alpha_pci_chipset cc_pc;
struct dwlpx_softc * cc_sc; /* back pointer */
long cc_io_exstorage[_FSTORE];
long cc_dmem_exstorage[_FSTORE];
long cc_smem_exstorage[_FSTORE];
unsigned long cc_sysbase; /* shorthand */
};
struct dwlpx_softc {
struct device dwlpx_dev;
struct dwlpx_config dwlpx_cc; /* config info */
int dwlpx_node; /* TurboLaser Node */
u_int16_t dwlpx_dtype; /* Node Type */
u_int8_t dwlpx_hosenum; /* Hose Number */
u_int8_t dwlpx_nhpc; /* # of hpcs */
};
void dwlpx_init __P((struct dwlpx_softc *));
void dwlpx_pci_init __P((pci_chipset_tag_t, void *));
bus_space_tag_t dwlpx_bus_io_init __P((void *));
bus_space_tag_t dwlpx_bus_mem_init __P((void *));
#define DWLPX_MAXPCI 1
/*
* Each DWLPX supports up to 15 devices, 12 of which are PCI slots.
*
* Since the STD I/O modules in slots 12-14 are really a PCI-EISA
* bridge, we'll punt on those for the moment.
*/
#define DWLPX_MAXDEV 12
/*
* Interrupt Cookie for DWLPX vectors.
*
* Bits 0..3 PCI Slot (0..11)
* Bits 4..7 I/O Hose (0..3)
* Bits 8..11 I/O Node (0..4)
* Bit 15 Constant 1
*/
#define DWLPX_VEC_MARK (1<<15)
#define DWLPX_MVEC(ionode, hose, pcislot) \
(DWLPX_VEC_MARK | (ionode << 8) | (hose << 4) | (pcislot))
#define DWLPX_MVEC_IONODE(cookie) \
((((u_int64_t)(cookie)) >> 8) & 0xf)
#define DWLPX_MVEC_HOSE(cookie) \
((((u_int64_t)(cookie)) >> 4) & 0xf)
#define DWLPX_MVEC_PCISLOT(cookie) \
(((u_int64_t)(cookie)) & 0xf)
/*
* DWLPX Error Interrupt
*/
#define DWLPX_VEC_EMARK (1<<14)
#define DWLPX_ERRVEC(ionode, hose) \
(DWLPX_VEC_EMARK | (ionode << 8) | (hose << 4))
/*
* Default values to put into DWLPX IMASK register(s)
*/
#define DWLPX_IMASK_DFLT \
(1 << 24) | /* IPL 17 for error interrupts */ \
(1 << 17) | /* IPL 14 for device interrupts */ \
(1 << 16) /* Enable Error Interrupts */

326
sys/arch/alpha/pci/pci_kn8ae.c Normal file
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/* $NetBSD: pci_kn8ae.c,v 1.1 1997/03/12 19:20:06 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/types.h>
#include <sys/param.h>
#include <sys/time.h>
#include <sys/systm.h>
#include <sys/errno.h>
#include <sys/malloc.h>
#include <sys/device.h>
#include <sys/syslog.h>
#include <vm/vm.h>
#include <machine/autoconf.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <alpha/pci/dwlpxreg.h>
#include <alpha/pci/dwlpxvar.h>
#include <alpha/pci/pci_kn8ae.h>
#ifndef EVCNT_COUNTERS
#include <machine/intrcnt.h>
#endif
int dec_kn8ae_intr_map __P((void *, pcitag_t, int, int,
pci_intr_handle_t *));
const char *dec_kn8ae_intr_string __P((void *, pci_intr_handle_t));
void *dec_kn8ae_intr_establish __P((void *, pci_intr_handle_t,
int, int (*func)(void *), void *));
void dec_kn8ae_intr_disestablish __P((void *, void *));
#define NIONODE 5
#define NHOSE 4
struct vectab {
int (*func) __P((void *));
void *arg;
} vectab[NIONODE][NHOSE][DWLPX_MAXDEV];
static u_int32_t imaskcache[NIONODE][NHOSE][NHPC];
#ifdef EVCNT_COUNTERS
struct evcnt kn8ae_intr_evcnt;
#endif
int kn8ae_spurious __P((void *));
void kn8ae_iointr __P((void *framep, unsigned long vec));
void kn8ae_enadis_intr __P((pci_intr_handle_t, int));
void kn8ae_enable_intr __P((pci_intr_handle_t irq));
void kn8ae_disable_intr __P((pci_intr_handle_t irq));
void
pci_kn8ae_pickintr(ccp, first)
struct dwlpx_config *ccp;
int first;
{
int io, hose, dev;
pci_chipset_tag_t pc = &ccp->cc_pc;
pc->pc_intr_v = ccp;
pc->pc_intr_map = dec_kn8ae_intr_map;
pc->pc_intr_string = dec_kn8ae_intr_string;
pc->pc_intr_establish = dec_kn8ae_intr_establish;
pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish;
if (!first) {
return;
}
for (io = 0; io < NIONODE; io++) {
for (hose = 0; hose < NHOSE; hose++) {
for (dev = 0; dev < DWLPX_MAXDEV; dev++) {
vectab[io][hose][dev].func = kn8ae_spurious;
vectab[io][hose][dev].arg = (void *)
(u_int64_t) DWLPX_MVEC(io, hose, dev);
}
}
}
for (io = 0; io < NIONODE; io++) {
for (hose = 0; hose < NHOSE; hose++) {
for (dev = 0; dev < NHPC; dev++) {
imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT;
}
}
}
set_iointr(kn8ae_iointr);
}
int
dec_kn8ae_intr_map(ccv, bustag, buspin, line, ihp)
void *ccv;
pcitag_t bustag;
int buspin, line;
pci_intr_handle_t *ihp;
{
int device, ionode, hose;
struct dwlpx_config *ccp = ccv;
pci_chipset_tag_t pc = &ccp->cc_pc;
if (buspin == 0) {
/* No IRQ used. */
return 1;
}
if (buspin > 4) {
printf("pci_map_int: bad interrupt pin %d\n", buspin);
return 1;
}
pci_decompose_tag(pc, bustag, NULL, &device, NULL);
ionode = ccp->cc_sc->dwlpx_node - 4;
hose = ccp->cc_sc->dwlpx_hosenum;
/*
* handle layout:
* bits 0..15 DWLPX_MVEC(ionode, hose, device)
* bits 16-24 buspin (1..N)
* bits 24-31 IPL
*/
*ihp = DWLPX_MVEC(ionode, hose, device) | (buspin << 16) | (14 << 24);
return (0);
}
const char *
dec_kn8ae_intr_string(ccv, ih)
void *ccv;
pci_intr_handle_t ih;
{
static char irqstr[64];
sprintf(irqstr, "kn8ae irq %d vector 0x%x PCI Interrupt Pin %c",
(ih >> 24), ih & 0xffff, (((ih >> 16) & 0x7) - 1) + 'A');
return (irqstr);
}
void *
dec_kn8ae_intr_establish(ccv, ih, level, func, arg)
void *ccv;
pci_intr_handle_t ih;
int level;
int (*func) __P((void *));
void *arg;
{
struct dwlpx_config *ccp = ccv;
void *cookie = NULL;
int ionode, hose, device, s;
struct vectab *vp;
ionode = ccp->cc_sc->dwlpx_node - 4;
hose = ccp->cc_sc->dwlpx_hosenum;
device = DWLPX_MVEC_PCISLOT(ih);
if (ionode < 0 || ionode >= NIONODE) {
panic("dec_kn8ae_intr_establish: bad ionode %d\n", ionode);
}
if (hose < 0 || hose >= NHOSE) {
panic("dec_kn8ae_intr_establish: bad hose %d\n", hose);
}
if (device < 0 || device >= DWLPX_MAXDEV) {
panic("dec_kn8ae_intr_establish: bad device %d\n", device);
}
vp = &vectab[ionode][hose][device];
if (vp->func != kn8ae_spurious) {
printf("dec_kn8ae_intr_establish: vector 0x%x already used\n",
ih & 0xffff);
return (cookie);
}
s = splhigh();
vp->func = func;
vp->arg = arg;
(void) splx(s);
kn8ae_enable_intr(ih);
cookie = (void *) (u_int64_t) DWLPX_MVEC(ionode, hose, device);
return (cookie);
}
void
dec_kn8ae_intr_disestablish(ccv, cookie)
void *ccv, *cookie;
{
int ionode, hose, device, s;
struct vectab *vp;
ionode = DWLPX_MVEC_IONODE(cookie);
hose = DWLPX_MVEC_HOSE(cookie);
device = DWLPX_MVEC_PCISLOT(cookie);
if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE ||
device < 0 || device >= DWLPX_MAXDEV) {
return;
}
vp = &vectab[ionode][hose][device];
s = splhigh();
vp->func = kn8ae_spurious;
vp->arg = cookie;
(void) splx(s);
}
void
kn8ae_iointr(framep, vec)
void *framep;
unsigned long vec;
{
struct vectab *vp;
int ionode, hose, device;
if ((vec & DWLPX_VEC_MARK) == 0) {
panic("kn8ae_iointr: vec 0x%x\n", vec);
}
#ifdef EVCNT_COUNTERS
kn8ae_intr_evcnt.ev_count++;
#else
; /* XXX */
#endif
ionode = DWLPX_MVEC_IONODE(vec);
hose = DWLPX_MVEC_HOSE(vec);
device = DWLPX_MVEC_PCISLOT(vec);
if (ionode < 0 || ionode >= NIONODE || hose < 0 || hose >= NHOSE ||
device < 0 || device >= DWLPX_MAXDEV) {
panic("kn8ae_iointr: malformed vector 0x%x\n", vec);
}
vp = &vectab[ionode][hose][device];
if ((*vp->func)(vp->arg) == 0) {
printf("kn8ae_iointr: TLSB Node %d Hose %d Slot %d - "
" unclaimed interrupt\n", ionode + 4, hose, device);
}
}
int
kn8ae_spurious(arg)
void *arg;
{
int ionode, hose, device;
ionode = DWLPX_MVEC_IONODE(arg);
hose = DWLPX_MVEC_HOSE(arg);
device = DWLPX_MVEC_PCISLOT(arg);
printf("Spurious Interrupt from TLSB Node %d Hose %d Slot %d\n",
ionode + 4, hose, device);
return (-1);
}
void
kn8ae_enadis_intr(irq, onoff)
pci_intr_handle_t irq;
int onoff;
{
unsigned long paddr;
u_int32_t val;
int ionode, hose, device, hpc, busp, s;
ionode = DWLPX_MVEC_IONODE(irq);
hose = DWLPX_MVEC_HOSE(irq);
device = DWLPX_MVEC_PCISLOT(irq);
busp = 1 << (((irq >> 16) & 0xff) - 1);
paddr = (1LL << 39);
paddr |= (unsigned long) ionode << 36;
paddr |= (unsigned long) hose << 34;
if (device < 4) {
hpc = 0;
} else if (device < 8) {
hpc = 1;
device -= 4;
} else {
hpc = 2;
device -= 8;
}
busp <<= (device << 2);
val = imaskcache[ionode][hose][hpc];
if (onoff)
val |= busp;
else
val &= ~busp;
imaskcache[ionode][hose][hpc] = val;
#if 0
printf("kn8ae_%s_intr: irq %lx imsk 0x%x hpc %d TLSB node %d hose %d\n",
onoff? "enable" : "disable", irq, val, hpc, ionode + 4, hose);
#endif
s = splhigh();
REGVAL(PCIA_IMASK(hpc) + paddr) = val;
alpha_mb();
(void) splx(s);
}
void
kn8ae_enable_intr(irq)
pci_intr_handle_t irq;
{
kn8ae_enadis_intr(irq, 1);
}
void
kn8ae_disable_intr(irq)
pci_intr_handle_t irq;
{
kn8ae_enadis_intr(irq, 0);
}

38
sys/arch/alpha/pci/pci_kn8ae.h Normal file
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/* $NetBSD: pci_kn8ae.h,v 1.1 1997/03/12 19:20:07 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
void pci_kn8ae_pickintr __P((struct dwlpx_config *, int));
#ifdef EVCNT_COUNTERS
extern struct evcnt kn8ae_intr_evcnt;
#endif

127
sys/arch/alpha/tlsb/gbus.c Normal file
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/* $NetBSD: gbus.c,v 1.1 1997/03/12 19:20:09 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Autoconfiguration and support routines for the Gbus: the internal
* bus on AlphaServer CPU modules.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/autoconf.h>
#include <machine/rpb.h>
#include <machine/pte.h>
#include <alpha/tlsb/tlsbreg.h>
#include <alpha/tlsb/tlsbvar.h>
extern int cputype;
#define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
struct gbus_softc {
struct device sc_dev;
int sc_tlsbnode; /* node on the TurboLaser */
};
static int gbusmatch __P((struct device *, struct cfdata *, void *));
static void gbusattach __P((struct device *, struct device *, void *));
struct cfattach gbus_ca = {
sizeof(struct gbus_softc), gbusmatch, gbusattach
};
struct cfdriver gbus_cd = {
NULL, "gbus", DV_DULL,
};
static int gbusprint __P((void *, const char *));
void gbus_intr_establish __P((struct confargs *, int (*)(void *), void *));
void gbus_intr_disestablish __P((struct confargs *));
caddr_t gbus_cvtaddr __P((struct confargs *));
int gbus_matchname __P((struct confargs *, char *));
static int
gbusprint(aux, cp)
void *aux;
const char *cp;
{
return (QUIET);
}
static int
gbusmatch(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct tlsb_dev_attach_args *ta = aux;
extern struct cfdriver tlsb_cd;
/*
* Make sure we're looking for a Gbus.
* Right now, only Gbus could be a
* child of a TLSB CPU Node.
*/
if (TLDEV_ISCPU(ta->ta_dtype) &&
parent->dv_cfdata->cf_driver == &tlsb_cd)
return (1);
return (0);
}
static void
gbusattach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
struct confargs nca;
struct gbus_softc *sc = (struct gbus_softc *)self;
struct tlsb_dev_attach_args *ta = aux;
printf("\n");
sc->sc_dev = *self;
sc->sc_tlsbnode = ta->ta_node;
/* Attach the clock. */
nca.ca_name = "mcclock";
nca.ca_slot = -1;
nca.ca_offset = 0x20000000;
nca.ca_bus = NULL;
if (!config_found(self, &nca, gbusprint))
printf("no clock on %s\n", self->dv_xname);
}

145
sys/arch/alpha/tlsb/kftxx.c Normal file
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/* $NetBSD: kftxx.c,v 1.1 1997/03/12 19:20:10 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
/*
* KFTIA and KFTHA Bus Adapter Node for I/O hoses
* found on AlphaServer 8200 and 8400 systems.
*
* i.e., handler for all TLSB I/O nodes.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <machine/autoconf.h>
#include <machine/rpb.h>
#include <machine/pte.h>
#include <alpha/tlsb/tlsbreg.h>
#include <alpha/tlsb/tlsbvar.h>
#include <alpha/tlsb/kftxxreg.h>
#include <alpha/tlsb/kftxxvar.h>
#include <alpha/pci/dwlpxvar.h>
struct kft_softc {
struct device sc_dev;
int sc_node; /* TLSB node */
u_int16_t sc_dtype; /* device type */
};
#define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
static int kftmatch __P((struct device *, struct cfdata *, void *));
static void kftattach __P((struct device *, struct device *, void *));
struct cfattach kft_ca = {
sizeof(struct kft_softc), kftmatch, kftattach
};
struct cfdriver kft_cd = {
NULL, "kft", DV_DULL,
};
static int kftprint __P((void *, const char *));
void kft_intr_establish __P((struct confargs *, int (*)(void *), void *));
void kft_intr_disestablish __P((struct confargs *));
caddr_t kft_cvtaddr __P((struct confargs *));
int kft_matchname __P((struct confargs *, char *));
static int
kftprint(aux, pnp)
void *aux;
const char *pnp;
{
register struct kft_dev_attach_args *ka = aux;
if (pnp)
printf("%s at %s", ka->ka_name, pnp);
return (UNCONF);
}
static int
kftmatch(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct tlsb_dev_attach_args *ta = aux;
if (TLDEV_ISIOPORT(ta->ta_dtype))
return (1);
return (0);
}
static void
kftattach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
struct tlsb_dev_attach_args *ta = aux;
struct kft_softc *sc = (struct kft_softc *)self;
struct kft_dev_attach_args ka;
int hoseno;
sc->sc_dev = *self;;
sc->sc_node = ta->ta_node;
sc->sc_dtype = ta->ta_dtype;
printf("\n");
for (hoseno = 0; hoseno < MAXHOSE; hoseno++) {
u_int32_t value =
TLSB_GET_NODEREG(sc->sc_node, KFT_IDPNSEX(hoseno));
if (value & 0x0E000000) {
printf("%s: Hose %d IDPNSE has %x\n", self->dv_xname,
hoseno, value);
continue;
}
if ((value & 0x1) != 0x0) {
printf("%s: Hose %d has a Bad Cable (0x%x)\n",
self->dv_xname, hoseno, value);
continue;
}
if ((value & 0x6) != 0x6) {
if (value)
printf("%s: Hose %d is missing PWROK (0x%x)\n",
self->dv_xname, hoseno, value);
continue;
}
ka.ka_name = "dwlpx";
ka.ka_node = sc->sc_node;
ka.ka_dtype = sc->sc_dtype;
ka.ka_hosenum = hoseno;
config_found(self, &ka, kftprint);
}
}

75
sys/arch/alpha/tlsb/kftxxreg.h Normal file
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/* $NetBSD: kftxxreg.h,v 1.1 1997/03/12 19:20:11 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Registers and values specific to KFTIA or KFTHA nodes.
*/
/*
* Taken from combinations of:
*
* ``DWLPA and DWLPB PCI Adapter Technical Manual,
* Order Number: EK-DWLPX-TM.A01''
*
* and
*
* ``AlphaServer 8200/8400 System Technical Manual,
* Order Number EK-T8030-TM. A01''
*/
#define REGVAL(r) (*(int32_t *)ALPHA_PHYS_TO_K0SEG(r))
/*
* There are (potentially) 4 I/O hoses per I/O node.
*
* A CPU to Hose Address Mapping looks (roughly) like this:
*
* 39 38........36 35.34 33.................0
* -------------------------------------------
* |1|TLSB NodeID |Hose#|Hose Module Specific|
* -------------------------------------------
*
*/
#define HOSE_SIZE 0x400000000L
#define MAXHOSE 4
/*
* Hose Specific I/O registers (offsets from base of I/O Board)
*/
#define KFT_IDPNSEX(hose) ((hose)? (0x2040 + (0x100 * (hose))) : 0x2A40)
#define KFT_ICCNSE 0x2040
#define KFT_ICCWTR 0x2100
#define KFT_IDPMSR 0x2B80

46
sys/arch/alpha/tlsb/kftxxvar.h Normal file
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/* $NetBSD: kftxxvar.h,v 1.1 1997/03/12 19:20:12 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Attach arguments for children of a KFTIA or KFTHA node.
*/
/*
* The structure used to attach devices to the TurboLaser.
*/
struct kft_dev_attach_args {
char * ka_name; /* name */
int ka_node; /* node number */
u_int16_t ka_dtype; /* device type */
u_int16_t ka_hosenum; /* hose number */
};

118
sys/arch/alpha/tlsb/mcclock_tlsb.c Normal file
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/* $NetBSD: mcclock_tlsb.c,v 1.1 1997/03/12 19:20:14 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/kernel.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/bus.h>
#include <machine/autoconf.h>
#include <alpha/alpha/clockvar.h>
#include <alpha/alpha/mcclockvar.h>
#include <alpha/tlsb/tlsbreg.h>
#include <dev/ic/mc146818reg.h>
#define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
/*
* Registers are 64 bytes apart (and 1 byte wide)
*/
#define REGSHIFT 6
struct mcclock_tlsb_softc {
struct mcclock_softc sc_mcclock;
unsigned long regbase;
};
int mcclock_tlsb_match __P((struct device *, struct cfdata *, void *));
void mcclock_tlsb_attach __P((struct device *, struct device *, void *));
struct cfattach mcclock_tlsb_ca = {
sizeof (struct mcclock_tlsb_softc),
mcclock_tlsb_match,
mcclock_tlsb_attach,
};
static void mcclock_tlsb_write __P((struct mcclock_softc *, u_int, u_int));
static u_int mcclock_tlsb_read __P((struct mcclock_softc *, u_int));
const struct mcclock_busfns mcclock_tlsb_busfns = {
mcclock_tlsb_write, mcclock_tlsb_read,
};
extern struct cfdriver mcclock_cd;
int
mcclock_tlsb_match(parent, match, aux)
struct device *parent;
struct cfdata *match;
void *aux;
{
struct confargs *ca = aux;
if (strcmp(ca->ca_name, mcclock_cd.cd_name))
return (0);
return (1);
}
void
mcclock_tlsb_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct mcclock_tlsb_softc *sc = (struct mcclock_tlsb_softc *)self;
struct confargs *ca = aux;
sc->regbase = TLSB_GBUS_BASE + ca->ca_offset;
mcclock_attach(&sc->sc_mcclock, &mcclock_tlsb_busfns);
}
static void
mcclock_tlsb_write(mcsc, reg, val)
struct mcclock_softc *mcsc;
u_int reg, val;
{
struct mcclock_tlsb_softc *sc = (struct mcclock_tlsb_softc *)mcsc;
unsigned char *ptr = (unsigned char *)
KV(sc->regbase + (reg << REGSHIFT));
*ptr = val;
}
static u_int
mcclock_tlsb_read(mcsc, reg)
struct mcclock_softc *mcsc;
u_int reg;
{
struct mcclock_tlsb_softc *sc = (struct mcclock_tlsb_softc *)mcsc;
unsigned char *ptr = (unsigned char *)
KV(sc->regbase + (reg << REGSHIFT));
return *ptr;
}

263
sys/arch/alpha/tlsb/tlsb.c Normal file
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/* $NetBSD: tlsb.c,v 1.1 1997/03/12 19:20:15 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Based in part upon a prototype version by Jason Thorpe
* Copyright (c) 1996 by Jason Thorpe.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Autoconfiguration and support routines for the TurboLaser System Bus
* found on AlphaServer 8200 and 8400 systems.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <machine/autoconf.h>
#include <machine/rpb.h>
#include <machine/pte.h>
#include <alpha/tlsb/tlsbreg.h>
#include <alpha/tlsb/tlsbvar.h>
extern int cputype;
int cpu_node_id;
extern struct cfdriver cpu_cd;
#define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
static int tlsbmatch __P((struct device *, struct cfdata *, void *));
static void tlsbattach __P((struct device *, struct device *, void *));
struct cfattach tlsb_ca = {
sizeof (struct device), tlsbmatch, tlsbattach
};
struct cfdriver tlsb_cd = {
NULL, "tlsb", DV_DULL,
};
static int tlsbprint __P((void *, const char *));
static int tlsbsubmatch __P((struct device *, struct cfdata *, void *));
static char *tlsb_node_type_str __P((u_int32_t));
static int
tlsbprint(aux, cp)
void *aux;
const char *cp;
{
struct tlsb_dev_attach_args *tap = aux;
printf(" node %d: %s", tap->ta_node,
tlsb_node_type_str(tap->ta_dtype));
return (UNCONF);
}
static int
tlsbsubmatch(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct tlsb_dev_attach_args *tap = aux;
if (tap->ta_name != tlsb_cd.cd_name)
return (0);
if ((cf->cf_loc[0] != -1) && (cf->cf_loc[0] != tap->ta_node))
return (0);
return ((*cf->cf_attach->ca_match)(parent, cf, aux));
}
static int
tlsbmatch(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct confargs *ca = aux;
/* Make sure we're looking for a TurboLaser. */
if (strcmp(ca->ca_name, tlsb_cd.cd_name) != 0)
return (0);
/*
* Only one instance of TurboLaser allowed,
* and only available on 21000 processor type
* platforms.
*/
if ((cputype != ST_DEC_21000) || (cf->cf_unit != 0))
return (0);
return (1);
}
static void
tlsbattach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
struct tlsb_dev_attach_args ta;
u_int32_t tldev;
u_int8_t vid;
int node;
struct tlsb_cpu_busdep *tcpu;
struct cfdriver *cfd = &cpu_cd;
printf("\n");
/*
* Attempt to find all devices on the bus, including
* CPUs, memory modules, and I/O modules.
*/
/*
* Sigh. I would like to just start off nicely,
* but I need to treat I/O modules differently-
* The highest priority I/O node has to be in
* node #8, and I want to find it *first*, since
* it will have the primary disks (most likely)
* on it.
*/
for (node = 0; node <= TLSB_NODE_MAX; ++node) {
/*
* Check for invalid address. This may not really
* be necessary, but what the heck...
*/
if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t)))
continue;
tldev = TLSB_GET_NODEREG(node, TLDEV);
if (tldev == 0) {
/* Nothing at this node. */
continue;
}
if (TLDEV_ISIOPORT(tldev))
continue; /* not interested right now */
ta.ta_name = tlsb_cd.cd_name;
ta.ta_node = node;
ta.ta_dtype = TLDEV_DTYPE(tldev);
ta.ta_swrev = TLDEV_SWREV(tldev);
ta.ta_hwrev = TLDEV_HWREV(tldev);
/*
* Deal with hooking CPU instances to TurboLaser nodes.
*/
if (TLDEV_ISCPU(tldev)) {
printf("%s node %d: %s", self->dv_xname,
node, tlsb_node_type_str(tldev));
/*
* Hook in the first CPU unit.
*/
vid = (TLSB_GET_NODEREG(node, TLVID) &
TLVID_VIDA_MASK) >> TLVID_VIDA_SHIFT;
if ((tcpu = malloc(sizeof(struct tlsb_cpu_busdep),
M_DEVBUF, M_NOWAIT)) == NULL)
panic("\nno memory for cpu busdep info");
tcpu->tcpu_vid = vid;
tcpu->tcpu_node = node;
cpu_node_id = node;
printf(", VID %d -> %s", tcpu->tcpu_vid, cfd->cd_name);
/*
* Do 2nd CPU (if available) here.
*/
printf("\n");
TLSB_PUT_NODEREG(node, TLCPUMASK, (1<<vid));
/*
* XXX: Check to make sure that INTRMASK has ints
* XXX: enabled for this CPU.
*/
}
/*
* Attach any children nodes, including a CPU's GBus
*/
config_found_sm(self, &ta, tlsbprint, tlsbsubmatch);
}
/*
* *Now* search for I/O nodes (in descending order)
*/
while (--node > 0) {
if (badaddr(TLSB_NODE_REG_ADDR(node, TLDEV), sizeof(u_int32_t)))
continue;
tldev = TLSB_GET_NODEREG(node, TLDEV);
if (tldev == 0) {
continue;
}
if (TLDEV_ISIOPORT(tldev)) {
ta.ta_name = tlsb_cd.cd_name;
ta.ta_node = node;
ta.ta_dtype = TLDEV_DTYPE(tldev);
ta.ta_swrev = TLDEV_SWREV(tldev);
ta.ta_hwrev = TLDEV_HWREV(tldev);
config_found_sm(self, &ta, tlsbprint, tlsbsubmatch);
}
}
}
static char *
tlsb_node_type_str(dtype)
u_int32_t dtype;
{
static char tlsb_line[64];
switch (dtype & TLDEV_DTYPE_MASK) {
case TLDEV_DTYPE_KFTHA:
return ("KFTHA I/O interface");
case TLDEV_DTYPE_KFTIA:
return ("KFTIA I/O interface");
case TLDEV_DTYPE_MS7CC:
return ("MS7CC Memory Module");
case TLDEV_DTYPE_SCPU4:
return ("Single CPU, 4MB cache");
case TLDEV_DTYPE_SCPU16:
return ("Single CPU, 16MB cache");
case TLDEV_DTYPE_DCPU4:
return ("Dual CPU, 4MB cache");
case TLDEV_DTYPE_DCPU16:
return ("Dual CPU, 16MB cache");
default:
bzero(tlsb_line, sizeof(tlsb_line));
sprintf(tlsb_line, "unknown, dtype 0x%x", dtype);
return (tlsb_line);
}
/* NOTREACHED */
}

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/* $NetBSD: tlsbmem.c,v 1.1 1997/03/12 19:20:18 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Dummy Node for TLSB Memory Modules found on
* AlphaServer 8200 and 8400 systems.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <machine/autoconf.h>
#include <machine/rpb.h>
#include <machine/pte.h>
#include <alpha/tlsb/tlsbreg.h>
#include <alpha/tlsb/tlsbvar.h>
struct tlsbmem_softc {
struct device sc_dv;
int sc_node; /* TLSB node */
u_int16_t sc_dtype; /* device type */
};
static int tlsbmemmatch __P((struct device *, struct cfdata *, void *));
static void tlsbmemattach __P((struct device *, struct device *, void *));
struct cfattach tlsbmem_ca = {
sizeof (struct tlsbmem_softc), tlsbmemmatch, tlsbmemattach
};
struct cfdriver tlsbmem_cd = {
NULL, "tlsbmem", DV_DULL,
};
static int
tlsbmemmatch(parent, cf, aux)
struct device *parent;
struct cfdata *cf;
void *aux;
{
struct tlsb_dev_attach_args *ta = aux;
if (TLDEV_ISMEM(ta->ta_dtype))
return (1);
return (0);
}
static void
tlsbmemattach(parent, self, aux)
struct device *parent;
struct device *self;
void *aux;
{
struct tlsb_dev_attach_args *ta = aux;
struct tlsbmem_softc *sc = (struct tlsbmem_softc *)self;
sc->sc_node = ta->ta_node;
sc->sc_dtype = ta->ta_dtype;
printf("\n");
}

319
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/* $NetBSD: tlsbreg.h,v 1.1 1997/03/12 19:20:19 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Based in part upon a prototype version by Jason Thorpe
* Copyright (c) 1996 by Jason Thorpe.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Definitions for the TurboLaser System Bus found on
* AlphaServer 8200/8400 systems.
*/
/*
* There are 9 TurboLaser nodes, 0 though 8. Their uses are defined as
* follows:
*
* Node Module
* ---- ------
* 0 CPU, Memory
* 1 CPU, Memory
* 2 CPU, Memory
* 3 CPU, Memory
* 4 CPU, Memory, I/O
* 5 CPU, Memory, I/O
* 6 CPU, Memory, I/O
* 7 CPU, Memory, I/O
* 8 I/O
*
* A node occurs every 0x00400000 bytes.
*
* Note, the AlphaServer 8200 only has nodes 4 though 8.
*/
#define TLSB_NODE_BASE 0x000000ff88000000 /* Dense */
#define TLSB_NODE_SIZE 0x00400000
#define TLSB_NODE_MAX 8
/* Translate a node number to an address. */
#define TLSB_NODE_ADDR(_node) \
(long)(TLSB_NODE_BASE + ((_node) * TLSB_NODE_SIZE))
#define TLSB_NODE_REG_ADDR(_node, _reg) \
KV((long)TLSB_NODE_ADDR((_node)) + (_reg))
/* Access the specified register on the specified node. */
#define TLSB_GET_NODEREG(_node, _reg) \
*(volatile u_int32_t *)(TLSB_NODE_REG_ADDR((_node), (_reg)))
#define TLSB_PUT_NODEREG(_node, _reg, _val) \
*(volatile u_int32_t *)(TLSB_NODE_REG_ADDR((_node), (_reg))) = (_val)
/*
* Some registers are shared by all TurboLaser nodes, and appear in
* the TurboLaser Broadcast space.
*/
#define TLSB_BCAST_BASE 0x000000ff8e000000 /* Dense */
#define TLSB_BCAST_REG_ADDR(_reg) KV((long)(TLSB_BCASE_BASE + (_reg)))
/* Access the specified register in the broadcast space. */
#define TLSB_GET_BCASTREG(_reg) \
*(volatile u_int32_t *)(TLSB_BCAST_REG_ADDR + (_reg))
#define TLSB_PUT_BCASTREG(_reg, _val) \
*(volatile u_int32_t *)(TLSB_BCAST_REG_ADDR + (_reg)) = (_val)
/*
* Location of the Gbus, the per-CPU bus containing the clock and
* console hardware.
*/
#define TLSB_GBUS_BASE 0x000000ff90000000 /* Dense */
/*
* Note that not every module type supports each TurboLaser register.
* The following defines the keys used to denote module support for
* a given register:
*
* C Supported by CPU module
* M Supported by Memory module
* I Supported by I/O module
*/
/*
* Per-node TurboLaser System Bus registers, offsets from the
* base of the node.
*/
#define TLDEV 0x0000 /* CMI: Device Register */
#define TLBER 0x0040 /* CMI: Bus Error Register */
#define TLCNR 0x0080 /* CMI: Congfiguration Register */
#define TLVID 0x00c0 /* CM: Virtual ID Register */
#define TLMMR0 0x0200 /* CM: Memory Mapping Register 0 */
#define TLMMR1 0x0240 /* CM: Memory Mapping Register 1 */
#define TLMMR2 0x0280 /* CM: Memory Mapping Register 2 */
#define TLMMR3 0x02c0 /* CM: Memory Mapping Register 3 */
#define TLMMR4 0x0300 /* CM: Memory Mapping Register 4 */
#define TLMMR5 0x0340 /* CM: Memory Mapping Register 5 */
#define TLMMR6 0x0380 /* CM: Memory Mapping Register 6 */
#define TLMMR7 0x03c0 /* CM: Memory Mapping Register 7 */
#define TLFADR0 0x0600 /* MI: Failing Address Register 0 */
#define TLFADR1 0x0640 /* MI: Failing Address Register 1 */
#define TLESR0 0x0680 /* CMI: Error Syndrome Register 0 */
#define TLESR1 0x06c0 /* CMI: Error Syndrome Register 1 */
#define TLESR2 0x0700 /* CMI: Error Syndrome Register 2 */
#define TLESR3 0x0740 /* CMI: Error Syndrome Register 3 */
#define TLILID0 0x0a00 /* I: Int. Level 0 IDENT Register */
#define TLILID1 0x0a40 /* I: Int. Level 1 IDENT Register */
#define TLILID2 0x0a80 /* I: Int. Level 2 IDENT Register */
#define TLILID3 0x0ac0 /* I: Int. Level 3 IDENT Register */
#define TLCPUMASK 0x0b00 /* I: CPU Interrupt Mask Register */
#define TLMBPTR 0x0c00 /* I: Mailbox Pointer Register */
#define TLEPAERR 0x1500 /* C: ADG error register */
/*
* Registers shared between TurboLaser nodes, offsets from the
* TurboLaser Broadcast Base.
*/
#define TLPRIVATE 0x0000 /* CMI: private "global" space */
#define TLIPINTR 0x0040 /* C: Interprocessor Int. Register */
#define TLIOINTR4 0x0100 /* C: I/O Interrupt Register 4 */
#define TLIOINTR5 0x0140 /* C: I/O Interrupt Register 5 */
#define TLIOINTR6 0x0180 /* C: I/O Interrupt Register 6 */
#define TLIOINTR7 0x01c0 /* C: I/O Interrupt Register 7 */
#define TLIOINTR8 0x0200 /* C: I/O Interrupt Register 8 */
#define TLWSDQR4 0x0400 /* C: Win Spc Dcr Que Ctr Reg 4 */
#define TLWSDQR5 0x0440 /* C: Win Spc Dcr Que Ctr Reg 5 */
#define TLWSDQR6 0x0480 /* C: Win Spc Dcr Que Ctr Reg 6 */
#define TLWSDQR7 0x04c0 /* C: Win Spc Dcr Que Ctr Reg 7 */
#define TLWSDQR8 0x0500 /* C: Win Spc Dcr Que Ctr Reg 8 */
#define TLRMDQRX 0x0600 /* C: Mem Chan Dcr Que Ctr Reg X */
#define TLRMDQR8 0x0640 /* C: Mem Chan Dcr Que Ctr Reg 8 */
#define TLRDRD 0x0800 /* C: CSR Read Data Rtn Data Reg */
#define TLRDRE 0x0840 /* C: CSR Read Data Rtn Error Reg */
#define TLMCR 0x1880 /* M: Memory Control Register */
/*
* TLDEV - Device Register
*
* Access: R/W
*
* Notes:
* Register is loaded during initialization with information
* that identifies a node. A zero value indicates a non-initialized
* (slot empty) node.
*
* Bits 0-15 contain the hardware device type, bits 16-23
* the board's software revision, and bits 24-31 the board's
* hardware revision.
*
* The device type portion is laid out as follows:
*
* Bit 15: identifies a CPU
* Bit 14: identifies a memory board
* Bit 13: identifies an I/O board
* Bits 0-7: specify the ID of a node type
*/
#define TLDEV_DTYPE_MASK 0x0000ffff
#define TLDEV_DTYPE_KFTHA 0x2000 /* KFTHA board, I/O */
#define TLDEV_DTYPE_KFTIA 0x2020 /* KFTIA board, I/O */
#define TLDEV_DTYPE_MS7CC 0x5000 /* Memory board */
#define TLDEV_DTYPE_SCPU4 0x8011 /* 1 CPU, 4mb cache */
#define TLDEV_DTYPE_SCPU16 0x8012 /* 1 CPU, 16mb cache */
#define TLDEV_DTYPE_DCPU4 0x8014 /* 2 CPU, 4mb cache */
#define TLDEV_DTYPE_DCPU16 0x8015 /* 2 CPU, 16mb cache */
#define TLDEV_DTYPE(_val) ((_val) & TLDEV_DTYPE_MASK)
# define TLDEV_ISCPU(_val) (TLDEV_DTYPE(_val) & 0x8000)
# define TLDEV_ISMEM(_val) (TLDEV_DTYPE(_val) & 0x4000)
# define TLDEV_ISIOPORT(_val) (TLDEV_DTYPE(_val) & 0x2000)
#define TLDEV_SWREV(_val) (((_val) >> 16) & 0xff)
#define TLDEV_HWREV(_val) (((_val) >> 24) & 0xff)
/*
* TLBER - Bus Error Register
*
* Access: R/W
*
* Notes:
* This register contains information about TLSB errors detected by
* nodes on the TLSB. The register will become locked when:
*
* * Any error occurs and the "lock on first error"
* bit of the Configuration Register is set.
*
* * Any bit other than 20-23 (DS0-DS3) becomes set.
*
* and will remain locked until either:
*
* * All bits in the TLBER are cleared.
*
* * The "lock on first error" bit is cleared.
*
* TLBER locking is intended for diagnosic purposes only, and
* not for general use.
*/
#define TLBER_ATCE 0x00000001 /* Addr Transmit Ck Error */
#define TLBER_APE 0x00000002 /* Addr Parity Error */
#define TLBER_BAE 0x00000004 /* Bank Avail Violation Error */
#define TLBER_LKTO 0x00000008 /* Bank Lock Timeout */
#define TLBER_NAE 0x00000010 /* No Ack Error */
#define TLBER_RTCE 0x00000020 /* Read Transmit Ck Error */
#define TLBER_ACKTCE 0x00000040 /* Ack Transmit Ck Error */
#define TLBER_MMRE 0x00000080 /* Mem Mapping Register Error */
#define TLBER_FNAE 0x00000100 /* Fatal No Ack Error */
#define TLBER_REQDE 0x00000200 /* Request Deassertion Error */
#define TLBER_ATDE 0x00000400 /* Addredd Transmitter During Error */
#define TLBER_UDE 0x00010000 /* Uncorrectable Data Error */
#define TLBER_CWDE 0x00020000 /* Correctable Write Data Error */
#define TLBER_CRDE 0x00040000 /* Correctable Read Data Error */
#define TLBER_CRDE2 0x00080000 /* ...ditto... */
#define TLBER_DS0 0x00100000 /* Data Synd 0 */
#define TLBER_DS1 0x00200000 /* Data Synd 1 */
#define TLBER_DS2 0x00400000 /* Data Synd 2 */
#define TLBER_DS3 0x00800000 /* Data Synd 3 */
#define TLBER_DTDE 0x01000000 /* Data Transmitter During Error */
#define TLBER_FDTCE 0x02000000 /* Fatal Data Transmit Ck Error */
#define TLBER_UACKE 0x04000000 /* Unexpected Ack Error */
#define TLBER_ABTCE 0x08000000 /* Addr Bus Transmit Error */
#define TLBER_DCTCE 0x10000000 /* Data Control Transmit Ck Error */
#define TLBER_SEQE 0x20000000 /* Sequence Error */
#define TLBER_DSE 0x40000000 /* Data Status Error */
#define TLBER_DTO 0x80000000 /* Data Timeout Error */
/*
* TLCNR - Configuration Register
*
* Access: R/W
*/
#define TLCNR_CWDD 0x00000001 /* Corr Write Data Err INTR Dis */
#define TLCNR_CRDD 0x00000002 /* Corr Read Data Err INTR Dis */
#define TLCNR_LKTOD 0x00000004 /* Bank Lock Timeout Disable */
#define TLCNR_DTOD 0x00000008 /* Data Timeout Disable */
#define TLCNR_STF_A 0x00001000 /* Self-Test Fail A */
#define TLCNR_STF_B 0x00002000 /* Self-Test Fail B */
#define TLCNR_HALT_A 0x00100000 /* Halt A */
#define TLCNR_HALT_B 0x00200000 /* Halt B */
#define TLCNR_RSTSTAT 0x10000000 /* Reset Status */
#define TLCNR_NRST 0x40000000 /* Node Reset */
#define TLCNR_LOFE 0x80000000 /* Lock On First Error */
#define TLCNR_NODE_MASK 0x000000f0 /* Node ID mask */
#define TLCNR_NODE_SHIFT 4
#define TLCNR_VCNT_MASK 0x00000f00 /* VCNT mask */
#define TLCNR_VCNT_SHIFT 8
/*
* TLVID - Virtual ID Register
*
* Access: R/W
*
* Notes:
* Virtual units can be CPUs or Memory boards. The units are
* are addressed using virtual IDs. These virtual IDs are assigned
* by writing to the TLVID register. The upper 24 bits of this
* register are reserved and must be written as `0'.
*/
#define TLVID_VIDA_MASK 0x0000000f /* Virtual ID for unit 0 */
#define TLVID_VIDA_SHIFT 0
#define TLVID_VIDB_MASK 0x000000f0 /* Virtual ID for unit 1 */
#define TLVID_VIDB_SHIFT 4
/*
* TLMMRn - Memory Mapping Registers
*
* Access: W
*
* Notes:
* Contains mapping information for doing a bank-decode.
*/
#define TLMMR_INTMASK 0x00000003 /* Valid bits in Interleave */
#define TLMMR_ADRMASK 0x000000f0 /* Valid bits in Address */
#define TLMMR_SBANK 0x00000800 /* Single-bank indicator */
#define TLMMR_VALID 0x80000000 /* Indicated mapping is valid */
#define TLMMR_INTLV_MASK 0x00000700 /* Mask for interleave value */
#define TLMMR_INTLV_SHIFT 8
#define TLMMR_ADDRESS_MASK 0x03fff000 /* Mask for address value */
#define TLMMR_ADDRESS_SHIFT 12
/*
* TLFADRn - Failing Address Registers
*
* Access: R/W
*
* Notes:
* These registers contain status information for a failed address.
* Not all nodes preserve this information. The validation bits
* indicate the validity of a given field.
*/

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/* $NetBSD: tlsbvar.h,v 1.1 1997/03/12 19:20:21 cgd Exp $ */
/*
* Copyright (c) 1997
* Matthew Jacob
* NASA AMES Research Center.
* All rights reserved.
*
* Based in part upon a prototype version by Jason Thorpe
* Copyright (c) 1996 by Jason Thorpe.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice immediately at the beginning of the file, without modification,
* this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Definitions for the TurboLaser System Bus found on
* AlphaServer 8200/8400 systems.
*/
/*
* The structure used to attach devices to the TurboLaser.
*/
struct tlsb_dev_attach_args {
char * ta_name; /* so things aren't confused */
int ta_node; /* node number */
u_int16_t ta_dtype; /* device type */
u_int8_t ta_swrev; /* software revision */
u_int8_t ta_hwrev; /* hardware revision */
};
/*
* Bus-dependent structure for CPUs. This is dynamically allocated
* for each CPU on the TurboLaser, and glued into the cpu_softc
* as sc_busdep.
*/
struct tlsb_cpu_busdep {
u_int8_t tcpu_vid; /* virtual ID of CPU */
int tcpu_node; /* TurboLaser node */
};