2000-11-14 21:21:00 +03:00
|
|
|
/* $NetBSD: aha.c,v 1.29 2000/11/14 18:21:00 thorpej Exp $ */
|
1998-07-05 02:18:13 +04:00
|
|
|
|
|
|
|
#include "opt_ddb.h"
|
1996-03-25 01:20:41 +03:00
|
|
|
|
1996-06-18 16:55:00 +04:00
|
|
|
#undef AHADIAG
|
|
|
|
#ifdef DDB
|
|
|
|
#define integrate
|
|
|
|
#else
|
|
|
|
#define integrate static inline
|
|
|
|
#endif
|
1996-03-25 01:20:41 +03:00
|
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|
|
1997-06-07 03:30:02 +04:00
|
|
|
/*-
|
1998-02-04 08:12:46 +03:00
|
|
|
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
|
1997-06-07 03:30:02 +04:00
|
|
|
* All rights reserved.
|
|
|
|
*
|
|
|
|
* This code is derived from software contributed to The NetBSD Foundation
|
1998-08-17 04:26:32 +04:00
|
|
|
* by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
|
|
|
|
* Simulation Facility, NASA Ames Research Center.
|
1997-06-07 03:30:02 +04:00
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|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
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|
|
|
* are met:
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
|
|
* documentation and/or other materials provided with the distribution.
|
|
|
|
* 3. All advertising materials mentioning features or use of this software
|
|
|
|
* must display the following acknowledgement:
|
|
|
|
* This product includes software developed by the NetBSD
|
|
|
|
* Foundation, Inc. and its contributors.
|
|
|
|
* 4. Neither the name of The NetBSD Foundation nor the names of its
|
|
|
|
* contributors may be used to endorse or promote products derived
|
|
|
|
* from this software without specific prior written permission.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
|
|
|
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
|
|
|
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
|
|
|
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
|
|
|
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
|
|
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
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|
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
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|
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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|
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
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|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
|
|
* POSSIBILITY OF SUCH DAMAGE.
|
|
|
|
*/
|
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
/*
|
|
|
|
* Originally written by Julian Elischer (julian@tfs.com)
|
|
|
|
* for TRW Financial Systems for use under the MACH(2.5) operating system.
|
|
|
|
*
|
|
|
|
* TRW Financial Systems, in accordance with their agreement with Carnegie
|
|
|
|
* Mellon University, makes this software available to CMU to distribute
|
|
|
|
* or use in any manner that they see fit as long as this message is kept with
|
|
|
|
* the software. For this reason TFS also grants any other persons or
|
|
|
|
* organisations permission to use or modify this software.
|
|
|
|
*
|
|
|
|
* TFS supplies this software to be publicly redistributed
|
|
|
|
* on the understanding that TFS is not responsible for the correct
|
|
|
|
* functioning of this software in any circumstances.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <sys/types.h>
|
|
|
|
#include <sys/param.h>
|
|
|
|
#include <sys/systm.h>
|
2000-03-23 10:01:25 +03:00
|
|
|
#include <sys/callout.h>
|
1996-03-25 01:20:41 +03:00
|
|
|
#include <sys/kernel.h>
|
|
|
|
#include <sys/errno.h>
|
|
|
|
#include <sys/ioctl.h>
|
|
|
|
#include <sys/device.h>
|
|
|
|
#include <sys/malloc.h>
|
|
|
|
#include <sys/buf.h>
|
|
|
|
#include <sys/proc.h>
|
|
|
|
#include <sys/user.h>
|
|
|
|
|
2000-11-14 21:21:00 +03:00
|
|
|
#include <uvm/uvm_extern.h>
|
|
|
|
|
1996-09-07 16:12:18 +04:00
|
|
|
#include <machine/bus.h>
|
1996-05-13 03:51:23 +04:00
|
|
|
#include <machine/intr.h>
|
1996-03-25 01:20:41 +03:00
|
|
|
|
1997-08-27 15:22:52 +04:00
|
|
|
#include <dev/scsipi/scsi_all.h>
|
|
|
|
#include <dev/scsipi/scsipi_all.h>
|
|
|
|
#include <dev/scsipi/scsiconf.h>
|
1996-03-25 01:20:41 +03:00
|
|
|
|
1997-02-07 20:37:27 +03:00
|
|
|
#include <dev/ic/ahareg.h>
|
|
|
|
#include <dev/ic/ahavar.h>
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
#ifndef DDB
|
|
|
|
#define Debugger() panic("should call debugger here (aha1542.c)")
|
|
|
|
#endif /* ! DDB */
|
|
|
|
|
1997-06-07 03:30:02 +04:00
|
|
|
#define AHA_MAXXFER ((AHA_NSEG - 1) << PGSHIFT)
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
#ifdef AHADEBUG
|
|
|
|
int aha_debug = 1;
|
|
|
|
#endif /* AHADEBUG */
|
|
|
|
|
1996-10-22 02:34:38 +04:00
|
|
|
int aha_cmd __P((bus_space_tag_t, bus_space_handle_t, struct aha_softc *, int,
|
1996-09-07 16:12:18 +04:00
|
|
|
u_char *, int, u_char *));
|
1996-03-25 01:20:41 +03:00
|
|
|
integrate void aha_finish_ccbs __P((struct aha_softc *));
|
|
|
|
integrate void aha_reset_ccb __P((struct aha_softc *, struct aha_ccb *));
|
|
|
|
void aha_free_ccb __P((struct aha_softc *, struct aha_ccb *));
|
1997-10-29 02:31:30 +03:00
|
|
|
integrate int aha_init_ccb __P((struct aha_softc *, struct aha_ccb *));
|
1996-03-25 01:20:41 +03:00
|
|
|
struct aha_ccb *aha_get_ccb __P((struct aha_softc *, int));
|
|
|
|
struct aha_ccb *aha_ccb_phys_kv __P((struct aha_softc *, u_long));
|
|
|
|
void aha_queue_ccb __P((struct aha_softc *, struct aha_ccb *));
|
|
|
|
void aha_collect_mbo __P((struct aha_softc *));
|
|
|
|
void aha_start_ccbs __P((struct aha_softc *));
|
|
|
|
void aha_done __P((struct aha_softc *, struct aha_ccb *));
|
1998-02-09 13:53:07 +03:00
|
|
|
int aha_init __P((struct aha_softc *));
|
1996-03-25 01:20:41 +03:00
|
|
|
void aha_inquire_setup_information __P((struct aha_softc *));
|
|
|
|
void ahaminphys __P((struct buf *));
|
1997-08-27 15:22:52 +04:00
|
|
|
int aha_scsi_cmd __P((struct scsipi_xfer *));
|
|
|
|
int aha_poll __P((struct aha_softc *, struct scsipi_xfer *, int));
|
1996-03-25 01:20:41 +03:00
|
|
|
void aha_timeout __P((void *arg));
|
1998-02-09 13:53:07 +03:00
|
|
|
int aha_create_ccbs __P((struct aha_softc *, struct aha_ccb *, int));
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
/* the below structure is so we have a default dev struct for out link struct */
|
1997-08-27 15:22:52 +04:00
|
|
|
struct scsipi_device aha_dev = {
|
1996-03-25 01:20:41 +03:00
|
|
|
NULL, /* Use default error handler */
|
|
|
|
NULL, /* have a queue, served by this */
|
|
|
|
NULL, /* have no async handler */
|
|
|
|
NULL, /* Use default 'done' routine */
|
|
|
|
};
|
|
|
|
|
|
|
|
#define AHA_RESET_TIMEOUT 2000 /* time to wait for reset (mSec) */
|
|
|
|
#define AHA_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */
|
|
|
|
|
|
|
|
/*
|
1996-10-22 02:34:38 +04:00
|
|
|
* aha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf)
|
1996-03-25 01:20:41 +03:00
|
|
|
*
|
|
|
|
* Activate Adapter command
|
|
|
|
* icnt: number of args (outbound bytes including opcode)
|
|
|
|
* ibuf: argument buffer
|
|
|
|
* ocnt: number of expected returned bytes
|
|
|
|
* obuf: result buffer
|
|
|
|
* wait: number of seconds to wait for response
|
|
|
|
*
|
|
|
|
* Performs an adapter command through the ports. Not to be confused with a
|
|
|
|
* scsi command, which is read in via the dma; one of the adapter commands
|
|
|
|
* tells it to read in a scsi command.
|
|
|
|
*/
|
|
|
|
int
|
1996-10-22 02:34:38 +04:00
|
|
|
aha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf)
|
|
|
|
bus_space_tag_t iot;
|
|
|
|
bus_space_handle_t ioh;
|
1996-03-25 01:20:41 +03:00
|
|
|
struct aha_softc *sc;
|
|
|
|
int icnt, ocnt;
|
|
|
|
u_char *ibuf, *obuf;
|
|
|
|
{
|
|
|
|
const char *name;
|
2000-03-30 16:41:09 +04:00
|
|
|
int i;
|
1996-03-25 01:20:41 +03:00
|
|
|
int wait;
|
|
|
|
u_char sts;
|
|
|
|
u_char opcode = ibuf[0];
|
|
|
|
|
1996-04-25 22:54:45 +04:00
|
|
|
if (sc != NULL)
|
1996-03-25 01:20:41 +03:00
|
|
|
name = sc->sc_dev.dv_xname;
|
|
|
|
else
|
1996-04-25 22:54:45 +04:00
|
|
|
name = "(aha probe)";
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Calculate a reasonable timeout for the command.
|
|
|
|
*/
|
|
|
|
switch (opcode) {
|
|
|
|
case AHA_INQUIRE_DEVICES:
|
1996-09-07 16:12:18 +04:00
|
|
|
wait = 90 * 20000;
|
1996-03-25 01:20:41 +03:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
wait = 1 * 20000;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Wait for the adapter to go idle, unless it's one of
|
|
|
|
* the commands which don't need this
|
|
|
|
*/
|
1996-04-03 13:45:45 +04:00
|
|
|
if (opcode != AHA_MBO_INTR_EN) {
|
1996-03-25 01:20:41 +03:00
|
|
|
for (i = 20000; i; i--) { /* 1 sec? */
|
1996-10-22 02:34:38 +04:00
|
|
|
sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
|
1996-03-25 01:20:41 +03:00
|
|
|
if (sts & AHA_STAT_IDLE)
|
|
|
|
break;
|
|
|
|
delay(50);
|
|
|
|
}
|
|
|
|
if (!i) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: aha_cmd, host not idle(0x%x)\n",
|
1996-03-25 01:20:41 +03:00
|
|
|
name, sts);
|
1996-09-07 16:12:18 +04:00
|
|
|
return (1);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Now that it is idle, if we expect output, preflush the
|
|
|
|
* queue feeding to us.
|
|
|
|
*/
|
|
|
|
if (ocnt) {
|
1996-10-22 02:34:38 +04:00
|
|
|
while ((bus_space_read_1(iot, ioh, AHA_STAT_PORT)) & AHA_STAT_DF)
|
|
|
|
bus_space_read_1(iot, ioh, AHA_DATA_PORT);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Output the command and the number of arguments given
|
|
|
|
* for each byte, first check the port is empty.
|
|
|
|
*/
|
|
|
|
while (icnt--) {
|
|
|
|
for (i = wait; i; i--) {
|
1996-10-22 02:34:38 +04:00
|
|
|
sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
|
1996-03-25 01:20:41 +03:00
|
|
|
if (!(sts & AHA_STAT_CDF))
|
|
|
|
break;
|
|
|
|
delay(50);
|
|
|
|
}
|
|
|
|
if (!i) {
|
|
|
|
if (opcode != AHA_INQUIRE_REVISION)
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: aha_cmd, cmd/data port full\n", name);
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_SRST);
|
1996-09-07 16:12:18 +04:00
|
|
|
return (1);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_write_1(iot, ioh, AHA_CMD_PORT, *ibuf++);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
/*
|
|
|
|
* If we expect input, loop that many times, each time,
|
|
|
|
* looking for the data register to have valid data
|
|
|
|
*/
|
|
|
|
while (ocnt--) {
|
|
|
|
for (i = wait; i; i--) {
|
1996-10-22 02:34:38 +04:00
|
|
|
sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
|
1996-03-25 01:20:41 +03:00
|
|
|
if (sts & AHA_STAT_DF)
|
|
|
|
break;
|
|
|
|
delay(50);
|
|
|
|
}
|
|
|
|
if (!i) {
|
|
|
|
if (opcode != AHA_INQUIRE_REVISION)
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: aha_cmd, cmd/data port empty %d\n",
|
1996-03-25 01:20:41 +03:00
|
|
|
name, ocnt);
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_SRST);
|
1996-09-07 16:12:18 +04:00
|
|
|
return (1);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
1996-10-22 02:34:38 +04:00
|
|
|
*obuf++ = bus_space_read_1(iot, ioh, AHA_DATA_PORT);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Wait for the board to report a finished instruction.
|
|
|
|
* We may get an extra interrupt for the HACC signal, but this is
|
|
|
|
* unimportant.
|
|
|
|
*/
|
1996-04-03 13:45:45 +04:00
|
|
|
if (opcode != AHA_MBO_INTR_EN) {
|
|
|
|
for (i = 20000; i; i--) { /* 1 sec? */
|
1996-10-22 02:34:38 +04:00
|
|
|
sts = bus_space_read_1(iot, ioh, AHA_INTR_PORT);
|
1996-04-03 13:45:45 +04:00
|
|
|
/* XXX Need to save this in the interrupt handler? */
|
|
|
|
if (sts & AHA_INTR_HACC)
|
|
|
|
break;
|
|
|
|
delay(50);
|
|
|
|
}
|
|
|
|
if (!i) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: aha_cmd, host not finished(0x%x)\n",
|
1996-04-03 13:45:45 +04:00
|
|
|
name, sts);
|
1996-09-07 16:12:18 +04:00
|
|
|
return (1);
|
1996-04-03 13:45:45 +04:00
|
|
|
}
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_IRST);
|
1996-09-07 16:12:18 +04:00
|
|
|
return (0);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
1996-09-07 16:12:18 +04:00
|
|
|
void
|
1997-03-29 02:47:08 +03:00
|
|
|
aha_attach(sc, apd)
|
1996-09-07 16:12:18 +04:00
|
|
|
struct aha_softc *sc;
|
1997-03-29 02:47:08 +03:00
|
|
|
struct aha_probe_data *apd;
|
1996-09-07 16:12:18 +04:00
|
|
|
{
|
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
TAILQ_INIT(&sc->sc_free_ccb);
|
|
|
|
TAILQ_INIT(&sc->sc_waiting_ccb);
|
1998-12-09 11:37:50 +03:00
|
|
|
TAILQ_INIT(&sc->sc_queue);
|
1996-03-25 01:20:41 +03:00
|
|
|
|
1998-11-20 00:43:00 +03:00
|
|
|
/*
|
|
|
|
* Fill in the adapter.
|
|
|
|
*/
|
|
|
|
sc->sc_adapter.scsipi_cmd = aha_scsi_cmd;
|
|
|
|
sc->sc_adapter.scsipi_minphys = ahaminphys;
|
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
/*
|
1997-08-27 15:22:52 +04:00
|
|
|
* fill in the prototype scsipi_link.
|
1996-03-25 01:20:41 +03:00
|
|
|
*/
|
1997-08-27 15:22:52 +04:00
|
|
|
sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
|
1996-03-25 01:20:41 +03:00
|
|
|
sc->sc_link.adapter_softc = sc;
|
1997-08-27 15:22:52 +04:00
|
|
|
sc->sc_link.scsipi_scsi.adapter_target = apd->sc_scsi_dev;
|
1998-11-20 00:43:00 +03:00
|
|
|
sc->sc_link.adapter = &sc->sc_adapter;
|
1996-03-25 01:20:41 +03:00
|
|
|
sc->sc_link.device = &aha_dev;
|
|
|
|
sc->sc_link.openings = 2;
|
1997-08-27 15:22:52 +04:00
|
|
|
sc->sc_link.scsipi_scsi.max_target = 7;
|
1998-12-05 22:43:33 +03:00
|
|
|
sc->sc_link.scsipi_scsi.max_lun = 7;
|
1997-08-27 15:22:52 +04:00
|
|
|
sc->sc_link.type = BUS_SCSI;
|
1996-03-25 01:20:41 +03:00
|
|
|
|
1997-06-25 17:30:59 +04:00
|
|
|
aha_inquire_setup_information(sc);
|
1998-02-09 13:53:07 +03:00
|
|
|
if (aha_init(sc) != 0) {
|
|
|
|
/* Error during initialization! */
|
|
|
|
return;
|
|
|
|
}
|
1997-06-25 17:30:59 +04:00
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
/*
|
|
|
|
* ask the adapter what subunits are present
|
|
|
|
*/
|
1996-09-07 16:12:18 +04:00
|
|
|
config_found(&sc->sc_dev, &sc->sc_link, scsiprint);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
integrate void
|
|
|
|
aha_finish_ccbs(sc)
|
|
|
|
struct aha_softc *sc;
|
|
|
|
{
|
|
|
|
struct aha_mbx_in *wmbi;
|
|
|
|
struct aha_ccb *ccb;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
wmbi = wmbx->tmbi;
|
|
|
|
|
1998-02-09 13:53:07 +03:00
|
|
|
bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
|
|
|
|
AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in),
|
|
|
|
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
|
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
if (wmbi->stat == AHA_MBI_FREE) {
|
|
|
|
for (i = 0; i < AHA_MBX_SIZE; i++) {
|
|
|
|
if (wmbi->stat != AHA_MBI_FREE) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: mbi not in round-robin order\n",
|
1996-03-25 01:20:41 +03:00
|
|
|
sc->sc_dev.dv_xname);
|
|
|
|
goto AGAIN;
|
|
|
|
}
|
|
|
|
aha_nextmbx(wmbi, wmbx, mbi);
|
1998-02-09 13:53:07 +03:00
|
|
|
bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
|
|
|
|
AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in),
|
|
|
|
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
#ifdef AHADIAGnot
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: mbi interrupt with no full mailboxes\n",
|
1996-03-25 01:20:41 +03:00
|
|
|
sc->sc_dev.dv_xname);
|
|
|
|
#endif
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
AGAIN:
|
|
|
|
do {
|
|
|
|
ccb = aha_ccb_phys_kv(sc, phystol(wmbi->ccb_addr));
|
|
|
|
if (!ccb) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: bad mbi ccb pointer; skipping\n",
|
1996-03-25 01:20:41 +03:00
|
|
|
sc->sc_dev.dv_xname);
|
|
|
|
goto next;
|
|
|
|
}
|
|
|
|
|
1998-02-09 13:53:07 +03:00
|
|
|
bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
|
|
|
|
AHA_CCB_OFF(ccb), sizeof(struct aha_ccb),
|
|
|
|
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
|
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
#ifdef AHADEBUG
|
|
|
|
if (aha_debug) {
|
|
|
|
u_char *cp = &ccb->scsi_cmd;
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("op=%x %x %x %x %x %x\n",
|
1996-03-25 01:20:41 +03:00
|
|
|
cp[0], cp[1], cp[2], cp[3], cp[4], cp[5]);
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("stat %x for mbi addr = 0x%08x, ",
|
1996-03-25 01:20:41 +03:00
|
|
|
wmbi->stat, wmbi);
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("ccb addr = 0x%x\n", ccb);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
#endif /* AHADEBUG */
|
|
|
|
|
|
|
|
switch (wmbi->stat) {
|
|
|
|
case AHA_MBI_OK:
|
|
|
|
case AHA_MBI_ERROR:
|
|
|
|
if ((ccb->flags & CCB_ABORT) != 0) {
|
|
|
|
/*
|
|
|
|
* If we already started an abort, wait for it
|
|
|
|
* to complete before clearing the CCB. We
|
|
|
|
* could instead just clear CCB_SENDING, but
|
|
|
|
* what if the mailbox was already received?
|
|
|
|
* The worst that happens here is that we clear
|
|
|
|
* the CCB a bit later than we need to. BFD.
|
|
|
|
*/
|
|
|
|
goto next;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case AHA_MBI_ABORT:
|
|
|
|
case AHA_MBI_UNKNOWN:
|
|
|
|
/*
|
|
|
|
* Even if the CCB wasn't found, we clear it anyway.
|
|
|
|
* See preceeding comment.
|
|
|
|
*/
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: bad mbi status %02x; skipping\n",
|
1996-03-25 01:20:41 +03:00
|
|
|
sc->sc_dev.dv_xname, wmbi->stat);
|
|
|
|
goto next;
|
|
|
|
}
|
|
|
|
|
2000-03-23 10:01:25 +03:00
|
|
|
callout_stop(&ccb->xs->xs_callout);
|
1996-03-25 01:20:41 +03:00
|
|
|
aha_done(sc, ccb);
|
|
|
|
|
|
|
|
next:
|
|
|
|
wmbi->stat = AHA_MBI_FREE;
|
1998-02-09 13:53:07 +03:00
|
|
|
bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
|
|
|
|
AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in),
|
|
|
|
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
|
1996-03-25 01:20:41 +03:00
|
|
|
aha_nextmbx(wmbi, wmbx, mbi);
|
1998-02-09 13:53:07 +03:00
|
|
|
bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
|
|
|
|
AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in),
|
|
|
|
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
|
1996-03-25 01:20:41 +03:00
|
|
|
} while (wmbi->stat != AHA_MBI_FREE);
|
|
|
|
|
|
|
|
wmbx->tmbi = wmbi;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Catch an interrupt from the adaptor
|
|
|
|
*/
|
|
|
|
int
|
1996-09-07 16:12:18 +04:00
|
|
|
aha_intr(arg)
|
1996-03-25 01:20:41 +03:00
|
|
|
void *arg;
|
|
|
|
{
|
|
|
|
struct aha_softc *sc = arg;
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
1996-03-25 01:20:41 +03:00
|
|
|
u_char sts;
|
|
|
|
|
|
|
|
#ifdef AHADEBUG
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: aha_intr ", sc->sc_dev.dv_xname);
|
1996-03-25 01:20:41 +03:00
|
|
|
#endif /*AHADEBUG */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* First acknowlege the interrupt, Then if it's not telling about
|
|
|
|
* a completed operation just return.
|
|
|
|
*/
|
1996-10-22 02:34:38 +04:00
|
|
|
sts = bus_space_read_1(iot, ioh, AHA_INTR_PORT);
|
1996-03-25 01:20:41 +03:00
|
|
|
if ((sts & AHA_INTR_ANYINTR) == 0)
|
1996-09-07 16:12:18 +04:00
|
|
|
return (0);
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_IRST);
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
#ifdef AHADIAG
|
|
|
|
/* Make sure we clear CCB_SENDING before finishing a CCB. */
|
|
|
|
aha_collect_mbo(sc);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Mail box out empty? */
|
|
|
|
if (sts & AHA_INTR_MBOA) {
|
|
|
|
struct aha_toggle toggle;
|
|
|
|
|
|
|
|
toggle.cmd.opcode = AHA_MBO_INTR_EN;
|
|
|
|
toggle.cmd.enable = 0;
|
1996-10-22 02:34:38 +04:00
|
|
|
aha_cmd(iot, ioh, sc,
|
1996-09-07 16:12:18 +04:00
|
|
|
sizeof(toggle.cmd), (u_char *)&toggle.cmd,
|
|
|
|
0, (u_char *)0);
|
1996-03-25 01:20:41 +03:00
|
|
|
aha_start_ccbs(sc);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Mail box in full? */
|
|
|
|
if (sts & AHA_INTR_MBIF)
|
|
|
|
aha_finish_ccbs(sc);
|
|
|
|
|
1996-09-07 16:12:18 +04:00
|
|
|
return (1);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
integrate void
|
|
|
|
aha_reset_ccb(sc, ccb)
|
|
|
|
struct aha_softc *sc;
|
|
|
|
struct aha_ccb *ccb;
|
|
|
|
{
|
|
|
|
|
|
|
|
ccb->flags = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* A ccb is put onto the free list.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
aha_free_ccb(sc, ccb)
|
|
|
|
struct aha_softc *sc;
|
|
|
|
struct aha_ccb *ccb;
|
|
|
|
{
|
|
|
|
int s;
|
|
|
|
|
|
|
|
s = splbio();
|
|
|
|
|
|
|
|
aha_reset_ccb(sc, ccb);
|
|
|
|
TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If there were none, wake anybody waiting for one to come free,
|
|
|
|
* starting with queued entries.
|
|
|
|
*/
|
|
|
|
if (ccb->chain.tqe_next == 0)
|
|
|
|
wakeup(&sc->sc_free_ccb);
|
|
|
|
|
|
|
|
splx(s);
|
|
|
|
}
|
|
|
|
|
1997-10-29 02:31:30 +03:00
|
|
|
integrate int
|
1996-03-25 01:20:41 +03:00
|
|
|
aha_init_ccb(sc, ccb)
|
|
|
|
struct aha_softc *sc;
|
|
|
|
struct aha_ccb *ccb;
|
|
|
|
{
|
1997-06-07 03:30:02 +04:00
|
|
|
bus_dma_tag_t dmat = sc->sc_dmat;
|
1997-10-29 02:31:30 +03:00
|
|
|
int hashnum, error;
|
1996-03-25 01:20:41 +03:00
|
|
|
|
1997-06-07 03:30:02 +04:00
|
|
|
/*
|
1998-02-09 13:53:07 +03:00
|
|
|
* Create the DMA map for this CCB.
|
1997-06-07 03:30:02 +04:00
|
|
|
*/
|
1997-10-29 02:31:30 +03:00
|
|
|
error = bus_dmamap_create(dmat, AHA_MAXXFER, AHA_NSEG, AHA_MAXXFER,
|
|
|
|
0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, &ccb->dmamap_xfer);
|
|
|
|
if (error) {
|
1998-02-09 13:53:07 +03:00
|
|
|
printf("%s: unable to create ccb DMA map, error = %d\n",
|
|
|
|
sc->sc_dev.dv_xname, error);
|
1997-10-29 02:31:30 +03:00
|
|
|
return (error);
|
|
|
|
}
|
1997-06-07 03:30:02 +04:00
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
/*
|
|
|
|
* put in the phystokv hash table
|
|
|
|
* Never gets taken out.
|
|
|
|
*/
|
1998-02-09 13:53:07 +03:00
|
|
|
ccb->hashkey = sc->sc_dmamap_control->dm_segs[0].ds_addr +
|
|
|
|
AHA_CCB_OFF(ccb);
|
1996-03-25 01:20:41 +03:00
|
|
|
hashnum = CCB_HASH(ccb->hashkey);
|
|
|
|
ccb->nexthash = sc->sc_ccbhash[hashnum];
|
|
|
|
sc->sc_ccbhash[hashnum] = ccb;
|
|
|
|
aha_reset_ccb(sc, ccb);
|
1997-10-29 02:31:30 +03:00
|
|
|
return (0);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
1997-06-07 03:30:02 +04:00
|
|
|
/*
|
1998-02-09 13:53:07 +03:00
|
|
|
* Create a set of ccbs and add them to the free list. Called once
|
|
|
|
* by aha_init(). We return the number of CCBs successfully created.
|
1997-06-07 03:30:02 +04:00
|
|
|
*/
|
|
|
|
int
|
1998-02-09 13:53:07 +03:00
|
|
|
aha_create_ccbs(sc, ccbstore, count)
|
1997-06-07 03:30:02 +04:00
|
|
|
struct aha_softc *sc;
|
1998-02-09 13:53:07 +03:00
|
|
|
struct aha_ccb *ccbstore;
|
|
|
|
int count;
|
1997-06-07 03:30:02 +04:00
|
|
|
{
|
|
|
|
struct aha_ccb *ccb;
|
1998-02-09 13:53:07 +03:00
|
|
|
int i, error;
|
|
|
|
|
|
|
|
bzero(ccbstore, sizeof(struct aha_ccb) * count);
|
|
|
|
for (i = 0; i < count; i++) {
|
|
|
|
ccb = &ccbstore[i];
|
|
|
|
if ((error = aha_init_ccb(sc, ccb)) != 0) {
|
|
|
|
printf("%s: unable to initialize ccb, error = %d\n",
|
|
|
|
sc->sc_dev.dv_xname, error);
|
|
|
|
goto out;
|
1997-10-29 02:31:30 +03:00
|
|
|
}
|
1997-06-07 03:30:02 +04:00
|
|
|
TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, chain);
|
|
|
|
}
|
1998-02-09 13:53:07 +03:00
|
|
|
out:
|
|
|
|
return (i);
|
1997-06-07 03:30:02 +04:00
|
|
|
}
|
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
/*
|
|
|
|
* Get a free ccb
|
|
|
|
*
|
|
|
|
* If there are none, see if we can allocate a new one. If so, put it in
|
|
|
|
* the hash table too otherwise either return an error or sleep.
|
|
|
|
*/
|
|
|
|
struct aha_ccb *
|
|
|
|
aha_get_ccb(sc, flags)
|
|
|
|
struct aha_softc *sc;
|
|
|
|
int flags;
|
|
|
|
{
|
|
|
|
struct aha_ccb *ccb;
|
|
|
|
int s;
|
|
|
|
|
|
|
|
s = splbio();
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If we can and have to, sleep waiting for one to come free
|
|
|
|
* but only if we can't allocate a new one.
|
|
|
|
*/
|
|
|
|
for (;;) {
|
|
|
|
ccb = sc->sc_free_ccb.tqh_first;
|
|
|
|
if (ccb) {
|
|
|
|
TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain);
|
|
|
|
break;
|
|
|
|
}
|
1999-10-01 03:04:39 +04:00
|
|
|
if ((flags & XS_CTL_NOSLEEP) != 0)
|
1996-03-25 01:20:41 +03:00
|
|
|
goto out;
|
|
|
|
tsleep(&sc->sc_free_ccb, PRIBIO, "ahaccb", 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
ccb->flags |= CCB_ALLOC;
|
|
|
|
|
|
|
|
out:
|
|
|
|
splx(s);
|
|
|
|
return (ccb);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Given a physical address, find the ccb that it corresponds to.
|
|
|
|
*/
|
|
|
|
struct aha_ccb *
|
|
|
|
aha_ccb_phys_kv(sc, ccb_phys)
|
|
|
|
struct aha_softc *sc;
|
|
|
|
u_long ccb_phys;
|
|
|
|
{
|
|
|
|
int hashnum = CCB_HASH(ccb_phys);
|
|
|
|
struct aha_ccb *ccb = sc->sc_ccbhash[hashnum];
|
|
|
|
|
|
|
|
while (ccb) {
|
|
|
|
if (ccb->hashkey == ccb_phys)
|
|
|
|
break;
|
|
|
|
ccb = ccb->nexthash;
|
|
|
|
}
|
1996-09-07 16:12:18 +04:00
|
|
|
return (ccb);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Queue a CCB to be sent to the controller, and send it if possible.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
aha_queue_ccb(sc, ccb)
|
|
|
|
struct aha_softc *sc;
|
|
|
|
struct aha_ccb *ccb;
|
|
|
|
{
|
|
|
|
|
|
|
|
TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain);
|
|
|
|
aha_start_ccbs(sc);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Garbage collect mailboxes that are no longer in use.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
aha_collect_mbo(sc)
|
|
|
|
struct aha_softc *sc;
|
|
|
|
{
|
|
|
|
struct aha_mbx_out *wmbo; /* Mail Box Out pointer */
|
1996-10-11 01:27:25 +04:00
|
|
|
#ifdef AHADIAG
|
1996-03-25 01:20:41 +03:00
|
|
|
struct aha_ccb *ccb;
|
1996-10-11 01:27:25 +04:00
|
|
|
#endif
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
wmbo = wmbx->cmbo;
|
|
|
|
|
|
|
|
while (sc->sc_mbofull > 0) {
|
1998-02-09 13:53:07 +03:00
|
|
|
bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
|
|
|
|
AHA_MBO_OFF(wmbo), sizeof(struct aha_mbx_out),
|
|
|
|
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
|
1996-03-25 01:20:41 +03:00
|
|
|
if (wmbo->cmd != AHA_MBO_FREE)
|
|
|
|
break;
|
|
|
|
|
|
|
|
#ifdef AHADIAG
|
|
|
|
ccb = aha_ccb_phys_kv(sc, phystol(wmbo->ccb_addr));
|
|
|
|
ccb->flags &= ~CCB_SENDING;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
--sc->sc_mbofull;
|
|
|
|
aha_nextmbx(wmbo, wmbx, mbo);
|
|
|
|
}
|
|
|
|
|
|
|
|
wmbx->cmbo = wmbo;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Send as many CCBs as we have empty mailboxes for.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
aha_start_ccbs(sc)
|
|
|
|
struct aha_softc *sc;
|
|
|
|
{
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
1996-03-25 01:20:41 +03:00
|
|
|
struct aha_mbx_out *wmbo; /* Mail Box Out pointer */
|
|
|
|
struct aha_ccb *ccb;
|
|
|
|
|
|
|
|
wmbo = wmbx->tmbo;
|
|
|
|
|
1996-04-30 00:28:40 +04:00
|
|
|
while ((ccb = sc->sc_waiting_ccb.tqh_first) != NULL) {
|
1996-03-25 01:20:41 +03:00
|
|
|
if (sc->sc_mbofull >= AHA_MBX_SIZE) {
|
|
|
|
aha_collect_mbo(sc);
|
|
|
|
if (sc->sc_mbofull >= AHA_MBX_SIZE) {
|
|
|
|
struct aha_toggle toggle;
|
|
|
|
|
|
|
|
toggle.cmd.opcode = AHA_MBO_INTR_EN;
|
|
|
|
toggle.cmd.enable = 1;
|
1996-10-22 02:34:38 +04:00
|
|
|
aha_cmd(iot, ioh, sc,
|
1996-09-07 16:12:18 +04:00
|
|
|
sizeof(toggle.cmd), (u_char *)&toggle.cmd,
|
|
|
|
0, (u_char *)0);
|
1996-03-25 01:20:41 +03:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain);
|
|
|
|
#ifdef AHADIAG
|
|
|
|
ccb->flags |= CCB_SENDING;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Link ccb to mbo. */
|
1998-02-09 13:53:07 +03:00
|
|
|
ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr +
|
|
|
|
AHA_CCB_OFF(ccb), wmbo->ccb_addr);
|
1996-03-25 01:20:41 +03:00
|
|
|
if (ccb->flags & CCB_ABORT)
|
|
|
|
wmbo->cmd = AHA_MBO_ABORT;
|
|
|
|
else
|
|
|
|
wmbo->cmd = AHA_MBO_START;
|
|
|
|
|
1998-02-09 13:53:07 +03:00
|
|
|
bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
|
|
|
|
AHA_MBO_OFF(wmbo), sizeof(struct aha_mbx_out),
|
|
|
|
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
|
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
/* Tell the card to poll immediately. */
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_write_1(iot, ioh, AHA_CMD_PORT, AHA_START_SCSI);
|
1996-03-25 01:20:41 +03:00
|
|
|
|
1999-10-01 03:04:39 +04:00
|
|
|
if ((ccb->xs->xs_control & XS_CTL_POLL) == 0)
|
2000-03-23 10:01:25 +03:00
|
|
|
callout_reset(&ccb->xs->xs_callout,
|
|
|
|
(ccb->timeout * hz) / 1000, aha_timeout, ccb);
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
++sc->sc_mbofull;
|
|
|
|
aha_nextmbx(wmbo, wmbx, mbo);
|
|
|
|
}
|
|
|
|
|
|
|
|
wmbx->tmbo = wmbo;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We have a ccb which has been processed by the
|
|
|
|
* adaptor, now we look to see how the operation
|
|
|
|
* went. Wake up the owner if waiting
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
aha_done(sc, ccb)
|
|
|
|
struct aha_softc *sc;
|
|
|
|
struct aha_ccb *ccb;
|
|
|
|
{
|
1997-06-07 03:30:02 +04:00
|
|
|
bus_dma_tag_t dmat = sc->sc_dmat;
|
1997-08-27 15:22:52 +04:00
|
|
|
struct scsipi_sense_data *s1, *s2;
|
|
|
|
struct scsipi_xfer *xs = ccb->xs;
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
SC_DEBUG(xs->sc_link, SDEV_DB2, ("aha_done\n"));
|
1997-06-07 03:30:02 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If we were a data transfer, unload the map that described
|
|
|
|
* the data buffer.
|
|
|
|
*/
|
|
|
|
if (xs->datalen) {
|
1998-02-04 08:12:46 +03:00
|
|
|
bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
|
|
|
|
ccb->dmamap_xfer->dm_mapsize,
|
1999-10-01 03:04:39 +04:00
|
|
|
(xs->xs_control & XS_CTL_DATA_IN) ? BUS_DMASYNC_POSTREAD :
|
1997-06-07 03:30:02 +04:00
|
|
|
BUS_DMASYNC_POSTWRITE);
|
|
|
|
bus_dmamap_unload(dmat, ccb->dmamap_xfer);
|
|
|
|
}
|
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
/*
|
|
|
|
* Otherwise, put the results of the operation
|
|
|
|
* into the xfer and call whoever started it
|
|
|
|
*/
|
|
|
|
#ifdef AHADIAG
|
|
|
|
if (ccb->flags & CCB_SENDING) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: exiting ccb still in transit!\n", sc->sc_dev.dv_xname);
|
1996-03-25 01:20:41 +03:00
|
|
|
Debugger();
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
if ((ccb->flags & CCB_ALLOC) == 0) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: exiting ccb not allocated!\n", sc->sc_dev.dv_xname);
|
1996-03-25 01:20:41 +03:00
|
|
|
Debugger();
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (xs->error == XS_NOERROR) {
|
|
|
|
if (ccb->host_stat != AHA_OK) {
|
|
|
|
switch (ccb->host_stat) {
|
|
|
|
case AHA_SEL_TIMEOUT: /* No response */
|
|
|
|
xs->error = XS_SELTIMEOUT;
|
|
|
|
break;
|
|
|
|
default: /* Other scsi protocol messes */
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: host_stat %x\n",
|
1996-03-25 01:20:41 +03:00
|
|
|
sc->sc_dev.dv_xname, ccb->host_stat);
|
|
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else if (ccb->target_stat != SCSI_OK) {
|
|
|
|
switch (ccb->target_stat) {
|
|
|
|
case SCSI_CHECK:
|
1997-08-27 15:22:52 +04:00
|
|
|
s1 = (struct scsipi_sense_data *) (((char *) (&ccb->scsi_cmd)) +
|
1996-03-25 01:20:41 +03:00
|
|
|
ccb->scsi_cmd_length);
|
1997-08-27 15:22:52 +04:00
|
|
|
s2 = &xs->sense.scsi_sense;
|
1996-03-25 01:20:41 +03:00
|
|
|
*s2 = *s1;
|
|
|
|
xs->error = XS_SENSE;
|
|
|
|
break;
|
|
|
|
case SCSI_BUSY:
|
|
|
|
xs->error = XS_BUSY;
|
|
|
|
break;
|
|
|
|
default:
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: target_stat %x\n",
|
1996-03-25 01:20:41 +03:00
|
|
|
sc->sc_dev.dv_xname, ccb->target_stat);
|
|
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else
|
|
|
|
xs->resid = 0;
|
|
|
|
}
|
|
|
|
aha_free_ccb(sc, ccb);
|
1999-10-01 03:04:39 +04:00
|
|
|
xs->xs_status |= XS_STS_DONE;
|
1997-08-27 15:22:52 +04:00
|
|
|
scsipi_done(xs);
|
1997-11-04 08:58:22 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If there are queue entries in the software queue, try to
|
|
|
|
* run the first one. We should be more or less guaranteed
|
|
|
|
* to succeed, since we just freed a CCB.
|
|
|
|
*
|
|
|
|
* NOTE: aha_scsi_cmd() relies on our calling it with
|
|
|
|
* the first entry in the queue.
|
|
|
|
*/
|
1998-12-09 11:37:50 +03:00
|
|
|
if ((xs = TAILQ_FIRST(&sc->sc_queue)) != NULL)
|
1997-11-04 08:58:22 +03:00
|
|
|
(void) aha_scsi_cmd(xs);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Find the board and find its irq/drq
|
|
|
|
*/
|
|
|
|
int
|
1996-10-22 02:34:38 +04:00
|
|
|
aha_find(iot, ioh, sc)
|
|
|
|
bus_space_tag_t iot;
|
|
|
|
bus_space_handle_t ioh;
|
1997-03-29 02:47:08 +03:00
|
|
|
struct aha_probe_data *sc;
|
1996-03-25 01:20:41 +03:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
u_char sts;
|
|
|
|
struct aha_config config;
|
|
|
|
int irq, drq;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* reset board, If it doesn't respond, assume
|
|
|
|
* that it's not there.. good for the probe
|
|
|
|
*/
|
|
|
|
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_HRST | AHA_CTRL_SRST);
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
delay(100);
|
|
|
|
for (i = AHA_RESET_TIMEOUT; i; i--) {
|
1996-10-22 02:34:38 +04:00
|
|
|
sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
|
1996-03-25 01:20:41 +03:00
|
|
|
if (sts == (AHA_STAT_IDLE | AHA_STAT_INIT))
|
|
|
|
break;
|
|
|
|
delay(1000); /* calibrated in msec */
|
|
|
|
}
|
|
|
|
if (!i) {
|
|
|
|
#ifdef AHADEBUG
|
|
|
|
if (aha_debug)
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("aha_find: No answer from adaptec board\n");
|
1996-03-25 01:20:41 +03:00
|
|
|
#endif /* AHADEBUG */
|
1996-09-07 16:12:18 +04:00
|
|
|
return (0);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* setup dma channel from jumpers and save int
|
|
|
|
* level
|
|
|
|
*/
|
|
|
|
delay(1000); /* for Bustek 545 */
|
|
|
|
config.cmd.opcode = AHA_INQUIRE_CONFIG;
|
1997-03-29 02:47:08 +03:00
|
|
|
aha_cmd(iot, ioh, (struct aha_softc *)0,
|
1996-09-07 16:12:18 +04:00
|
|
|
sizeof(config.cmd), (u_char *)&config.cmd,
|
1996-03-25 01:20:41 +03:00
|
|
|
sizeof(config.reply), (u_char *)&config.reply);
|
|
|
|
switch (config.reply.chan) {
|
|
|
|
case EISADMA:
|
1996-09-07 16:12:18 +04:00
|
|
|
drq = -1;
|
1996-03-25 01:20:41 +03:00
|
|
|
break;
|
|
|
|
case CHAN0:
|
|
|
|
drq = 0;
|
|
|
|
break;
|
|
|
|
case CHAN5:
|
|
|
|
drq = 5;
|
|
|
|
break;
|
|
|
|
case CHAN6:
|
|
|
|
drq = 6;
|
|
|
|
break;
|
|
|
|
case CHAN7:
|
|
|
|
drq = 7;
|
|
|
|
break;
|
|
|
|
default:
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("aha_find: illegal drq setting %x\n", config.reply.chan);
|
1996-09-07 16:12:18 +04:00
|
|
|
return (0);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
switch (config.reply.intr) {
|
|
|
|
case INT9:
|
|
|
|
irq = 9;
|
|
|
|
break;
|
|
|
|
case INT10:
|
|
|
|
irq = 10;
|
|
|
|
break;
|
|
|
|
case INT11:
|
|
|
|
irq = 11;
|
|
|
|
break;
|
|
|
|
case INT12:
|
|
|
|
irq = 12;
|
|
|
|
break;
|
|
|
|
case INT14:
|
|
|
|
irq = 14;
|
|
|
|
break;
|
|
|
|
case INT15:
|
|
|
|
irq = 15;
|
|
|
|
break;
|
|
|
|
default:
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("aha_find: illegal irq setting %x\n", config.reply.intr);
|
1996-09-07 16:12:18 +04:00
|
|
|
return (0);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
1997-03-29 02:47:08 +03:00
|
|
|
if (sc) {
|
1996-03-25 01:20:41 +03:00
|
|
|
sc->sc_irq = irq;
|
|
|
|
sc->sc_drq = drq;
|
1996-09-07 16:12:18 +04:00
|
|
|
sc->sc_scsi_dev = config.reply.scsi_dev;
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
1996-09-07 16:12:18 +04:00
|
|
|
return (1);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Start the board, ready for normal operation
|
|
|
|
*/
|
1998-02-09 13:53:07 +03:00
|
|
|
int
|
1996-03-25 01:20:41 +03:00
|
|
|
aha_init(sc)
|
|
|
|
struct aha_softc *sc;
|
|
|
|
{
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
1997-06-07 03:30:02 +04:00
|
|
|
bus_dma_segment_t seg;
|
1996-03-25 01:20:41 +03:00
|
|
|
struct aha_devices devices;
|
|
|
|
struct aha_setup setup;
|
|
|
|
struct aha_mailbox mailbox;
|
1998-02-09 13:53:07 +03:00
|
|
|
int error, i, j, initial_ccbs, rseg;
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* XXX
|
|
|
|
* If we are a 1542C or later, disable the extended BIOS so that the
|
|
|
|
* mailbox interface is unlocked.
|
|
|
|
* No need to check the extended BIOS flags as some of the
|
|
|
|
* extensions that cause us problems are not flagged in that byte.
|
|
|
|
*/
|
|
|
|
if (!strncmp(sc->sc_model, "1542C", 5)) {
|
|
|
|
struct aha_extbios extbios;
|
1996-03-28 21:19:05 +03:00
|
|
|
struct aha_unlock unlock;
|
1996-03-25 01:20:41 +03:00
|
|
|
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: unlocking mailbox interface\n", sc->sc_dev.dv_xname);
|
1996-03-25 01:20:41 +03:00
|
|
|
extbios.cmd.opcode = AHA_EXT_BIOS;
|
1996-10-22 02:34:38 +04:00
|
|
|
aha_cmd(iot, ioh, sc,
|
1996-09-07 16:12:18 +04:00
|
|
|
sizeof(extbios.cmd), (u_char *)&extbios.cmd,
|
1996-03-25 01:20:41 +03:00
|
|
|
sizeof(extbios.reply), (u_char *)&extbios.reply);
|
|
|
|
|
1996-03-25 01:23:56 +03:00
|
|
|
#ifdef AHADEBUG
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: flags=%02x, mailboxlock=%02x\n",
|
1996-03-25 01:20:41 +03:00
|
|
|
sc->sc_dev.dv_xname,
|
|
|
|
extbios.reply.flags, extbios.reply.mailboxlock);
|
|
|
|
#endif /* AHADEBUG */
|
|
|
|
|
1996-03-28 21:19:05 +03:00
|
|
|
unlock.cmd.opcode = AHA_MBX_ENABLE;
|
|
|
|
unlock.cmd.junk = 0;
|
|
|
|
unlock.cmd.magic = extbios.reply.mailboxlock;
|
1996-10-22 02:34:38 +04:00
|
|
|
aha_cmd(iot, ioh, sc,
|
1996-09-07 16:12:18 +04:00
|
|
|
sizeof(unlock.cmd), (u_char *)&unlock.cmd,
|
1996-03-25 01:20:41 +03:00
|
|
|
0, (u_char *)0);
|
|
|
|
}
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
/*
|
|
|
|
* Change the bus on/off times to not clash with other dma users.
|
|
|
|
*/
|
1996-10-22 02:34:38 +04:00
|
|
|
aha_cmd(iot, ioh, 1, 0, 0, 0, AHA_BUS_ON_TIME_SET, 7);
|
|
|
|
aha_cmd(iot, ioh, 1, 0, 0, 0, AHA_BUS_OFF_TIME_SET, 4);
|
1996-03-25 01:20:41 +03:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Inquire Installed Devices (to force synchronous negotiation). */
|
|
|
|
devices.cmd.opcode = AHA_INQUIRE_DEVICES;
|
1996-10-22 02:34:38 +04:00
|
|
|
aha_cmd(iot, ioh, sc,
|
1996-09-07 16:12:18 +04:00
|
|
|
sizeof(devices.cmd), (u_char *)&devices.cmd,
|
1996-03-25 01:20:41 +03:00
|
|
|
sizeof(devices.reply), (u_char *)&devices.reply);
|
|
|
|
|
1997-06-25 17:30:59 +04:00
|
|
|
/* Count installed units */
|
|
|
|
initial_ccbs = 0;
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
for (j = 0; j < 8; j++) {
|
|
|
|
if (((devices.reply.lun_map[i] >> j) & 1) == 1)
|
|
|
|
initial_ccbs += 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
initial_ccbs *= sc->sc_link.openings;
|
1998-02-09 13:53:07 +03:00
|
|
|
if (initial_ccbs > AHA_CCB_MAX)
|
|
|
|
initial_ccbs = AHA_CCB_MAX;
|
1998-04-29 05:02:44 +04:00
|
|
|
if (initial_ccbs == 0) /* yes, this can happen */
|
|
|
|
initial_ccbs = sc->sc_link.openings;
|
1997-06-25 17:30:59 +04:00
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
/* Obtain setup information from. */
|
|
|
|
setup.cmd.opcode = AHA_INQUIRE_SETUP;
|
|
|
|
setup.cmd.len = sizeof(setup.reply);
|
1996-10-22 02:34:38 +04:00
|
|
|
aha_cmd(iot, ioh, sc,
|
1996-09-07 16:12:18 +04:00
|
|
|
sizeof(setup.cmd), (u_char *)&setup.cmd,
|
1996-03-25 01:20:41 +03:00
|
|
|
sizeof(setup.reply), (u_char *)&setup.reply);
|
|
|
|
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: %s, %s\n",
|
1996-03-25 01:20:41 +03:00
|
|
|
sc->sc_dev.dv_xname,
|
|
|
|
setup.reply.sync_neg ? "sync" : "async",
|
1996-03-25 01:23:56 +03:00
|
|
|
setup.reply.parity ? "parity" : "no parity");
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
if (!setup.reply.sync[i].valid ||
|
|
|
|
(!setup.reply.sync[i].offset && !setup.reply.sync[i].period))
|
|
|
|
continue;
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s targ %d: sync, offset %d, period %dnsec\n",
|
1996-03-25 01:20:41 +03:00
|
|
|
sc->sc_dev.dv_xname, i,
|
|
|
|
setup.reply.sync[i].offset, setup.reply.sync[i].period * 50 + 200);
|
|
|
|
}
|
|
|
|
|
1997-06-07 03:30:02 +04:00
|
|
|
/*
|
1998-02-09 13:53:07 +03:00
|
|
|
* Allocate the mailbox and control blocks.
|
1997-06-07 03:30:02 +04:00
|
|
|
*/
|
1998-02-09 13:53:07 +03:00
|
|
|
if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct aha_control),
|
2000-11-14 21:21:00 +03:00
|
|
|
PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
|
1998-02-09 13:53:07 +03:00
|
|
|
printf("%s: unable to allocate control structures, "
|
|
|
|
"error = %d\n", sc->sc_dev.dv_xname, error);
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
|
|
|
|
sizeof(struct aha_control), (caddr_t *)&sc->sc_control,
|
|
|
|
BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
|
|
|
|
printf("%s: unable to map control structures, error = %d\n",
|
|
|
|
sc->sc_dev.dv_xname, error);
|
|
|
|
return (error);
|
|
|
|
}
|
1997-06-07 03:30:02 +04:00
|
|
|
|
|
|
|
/*
|
1998-02-09 13:53:07 +03:00
|
|
|
* Create and load the DMA map used for the mailbox and
|
|
|
|
* control blocks.
|
1997-06-07 03:30:02 +04:00
|
|
|
*/
|
1998-02-09 13:53:07 +03:00
|
|
|
if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct aha_control),
|
|
|
|
1, sizeof(struct aha_control), 0, BUS_DMA_NOWAIT,
|
|
|
|
&sc->sc_dmamap_control)) != 0) {
|
|
|
|
printf("%s: unable to create control DMA map, error = %d\n",
|
|
|
|
sc->sc_dev.dv_xname, error);
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_control,
|
|
|
|
sc->sc_control, sizeof(struct aha_control), NULL,
|
|
|
|
BUS_DMA_NOWAIT)) != 0) {
|
|
|
|
printf("%s: unable to load control DMA map, error = %d\n",
|
|
|
|
sc->sc_dev.dv_xname, error);
|
|
|
|
return (error);
|
|
|
|
}
|
1997-06-07 03:30:02 +04:00
|
|
|
|
|
|
|
/*
|
1998-02-09 13:53:07 +03:00
|
|
|
* Initialize the control blocks.
|
1997-06-07 03:30:02 +04:00
|
|
|
*/
|
1998-02-09 13:53:07 +03:00
|
|
|
i = aha_create_ccbs(sc, sc->sc_control->ac_ccbs, initial_ccbs);
|
|
|
|
if (i == 0) {
|
|
|
|
printf("%s: unable to create control blocks\n",
|
|
|
|
sc->sc_dev.dv_xname);
|
|
|
|
return (ENOMEM);
|
|
|
|
} else if (i != initial_ccbs) {
|
|
|
|
printf("%s: WARNING: only %d of %d control blocks created\n",
|
|
|
|
sc->sc_dev.dv_xname, i, initial_ccbs);
|
|
|
|
}
|
1997-06-07 03:30:02 +04:00
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
/*
|
|
|
|
* Set up initial mail box for round-robin operation.
|
|
|
|
*/
|
|
|
|
for (i = 0; i < AHA_MBX_SIZE; i++) {
|
|
|
|
wmbx->mbo[i].cmd = AHA_MBO_FREE;
|
1998-02-09 13:53:07 +03:00
|
|
|
bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
|
|
|
|
AHA_MBO_OFF(&wmbx->mbo[i]), sizeof(struct aha_mbx_out),
|
|
|
|
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
|
1996-05-05 04:40:01 +04:00
|
|
|
wmbx->mbi[i].stat = AHA_MBI_FREE;
|
1998-02-09 13:53:07 +03:00
|
|
|
bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
|
|
|
|
AHA_MBI_OFF(&wmbx->mbi[i]), sizeof(struct aha_mbx_in),
|
|
|
|
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
wmbx->cmbo = wmbx->tmbo = &wmbx->mbo[0];
|
|
|
|
wmbx->tmbi = &wmbx->mbi[0];
|
|
|
|
sc->sc_mbofull = 0;
|
|
|
|
|
|
|
|
/* Initialize mail box. */
|
|
|
|
mailbox.cmd.opcode = AHA_MBX_INIT;
|
|
|
|
mailbox.cmd.nmbx = AHA_MBX_SIZE;
|
1998-02-09 13:53:07 +03:00
|
|
|
ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr +
|
|
|
|
offsetof(struct aha_control, ac_mbx), mailbox.cmd.addr);
|
1996-10-22 02:34:38 +04:00
|
|
|
aha_cmd(iot, ioh, sc,
|
1996-09-07 16:12:18 +04:00
|
|
|
sizeof(mailbox.cmd), (u_char *)&mailbox.cmd,
|
1996-03-25 01:20:41 +03:00
|
|
|
0, (u_char *)0);
|
1998-02-09 13:53:07 +03:00
|
|
|
return (0);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
aha_inquire_setup_information(sc)
|
|
|
|
struct aha_softc *sc;
|
|
|
|
{
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
1996-03-25 01:20:41 +03:00
|
|
|
struct aha_revision revision;
|
|
|
|
u_char sts;
|
|
|
|
int i;
|
|
|
|
char *p;
|
|
|
|
|
|
|
|
strcpy(sc->sc_model, "unknown");
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Assume we have a board at this stage, do an adapter inquire
|
|
|
|
* to find out what type of controller it is. If the command
|
|
|
|
* fails, we assume it's either a crusty board or an old 1542
|
|
|
|
* clone, and skip the board-specific stuff.
|
|
|
|
*/
|
|
|
|
revision.cmd.opcode = AHA_INQUIRE_REVISION;
|
1996-10-22 02:34:38 +04:00
|
|
|
if (aha_cmd(iot, ioh, sc,
|
1996-09-07 16:12:18 +04:00
|
|
|
sizeof(revision.cmd), (u_char *)&revision.cmd,
|
1996-03-25 01:20:41 +03:00
|
|
|
sizeof(revision.reply), (u_char *)&revision.reply)) {
|
|
|
|
/*
|
|
|
|
* aha_cmd() already started the reset. It's not clear we
|
|
|
|
* even need to bother here.
|
|
|
|
*/
|
|
|
|
for (i = AHA_RESET_TIMEOUT; i; i--) {
|
1996-10-22 02:34:38 +04:00
|
|
|
sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
|
1996-03-25 01:20:41 +03:00
|
|
|
if (sts == (AHA_STAT_IDLE | AHA_STAT_INIT))
|
|
|
|
break;
|
|
|
|
delay(1000);
|
|
|
|
}
|
|
|
|
if (!i) {
|
|
|
|
#ifdef AHADEBUG
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("aha_init: soft reset failed\n");
|
1996-03-25 01:20:41 +03:00
|
|
|
#endif /* AHADEBUG */
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
#ifdef AHADEBUG
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("aha_init: inquire command failed\n");
|
1996-03-25 01:20:41 +03:00
|
|
|
#endif /* AHADEBUG */
|
|
|
|
goto noinquire;
|
|
|
|
}
|
|
|
|
|
1996-03-25 01:23:56 +03:00
|
|
|
#ifdef AHADEBUG
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: inquire %x, %x, %x, %x\n",
|
1996-03-25 01:20:41 +03:00
|
|
|
sc->sc_dev.dv_xname,
|
|
|
|
revision.reply.boardid, revision.reply.spec_opts,
|
|
|
|
revision.reply.revision_1, revision.reply.revision_2);
|
|
|
|
#endif /* AHADEBUG */
|
|
|
|
|
|
|
|
switch (revision.reply.boardid) {
|
1999-04-16 03:51:44 +04:00
|
|
|
case BOARD_1540_16HEAD_BIOS:
|
|
|
|
case BOARD_1540_64HEAD_BIOS:
|
|
|
|
case BOARD_1540:
|
1996-03-25 01:20:41 +03:00
|
|
|
strcpy(sc->sc_model, "1540");
|
|
|
|
break;
|
1999-04-16 03:51:44 +04:00
|
|
|
case BOARD_1542:
|
1996-03-25 01:20:41 +03:00
|
|
|
strcpy(sc->sc_model, "1540A/1542A/1542B");
|
|
|
|
break;
|
1999-04-16 03:51:44 +04:00
|
|
|
case BOARD_1640:
|
1996-03-25 01:20:41 +03:00
|
|
|
strcpy(sc->sc_model, "1640");
|
|
|
|
break;
|
1999-04-16 03:51:44 +04:00
|
|
|
case BOARD_1740:
|
|
|
|
strcpy(sc->sc_model, "1740");
|
|
|
|
break;
|
|
|
|
case BOARD_1542C:
|
1996-03-25 01:20:41 +03:00
|
|
|
strcpy(sc->sc_model, "1542C");
|
|
|
|
break;
|
1999-04-16 03:51:44 +04:00
|
|
|
case BOARD_1542CF:
|
1996-03-25 01:20:41 +03:00
|
|
|
strcpy(sc->sc_model, "1542CF");
|
|
|
|
break;
|
1999-04-16 03:51:44 +04:00
|
|
|
case BOARD_1542CP:
|
1996-03-25 01:20:41 +03:00
|
|
|
strcpy(sc->sc_model, "1542CP");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
p = sc->sc_firmware;
|
|
|
|
*p++ = revision.reply.revision_1;
|
|
|
|
*p++ = '.';
|
|
|
|
*p++ = revision.reply.revision_2;
|
|
|
|
*p = '\0';
|
|
|
|
|
|
|
|
noinquire:
|
1997-02-26 07:52:13 +03:00
|
|
|
printf("%s: model AHA-%s, firmware %s\n",
|
|
|
|
sc->sc_dev.dv_xname,
|
|
|
|
sc->sc_model, sc->sc_firmware);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
ahaminphys(bp)
|
|
|
|
struct buf *bp;
|
|
|
|
{
|
|
|
|
|
1997-06-07 03:30:02 +04:00
|
|
|
if (bp->b_bcount > AHA_MAXXFER)
|
|
|
|
bp->b_bcount = AHA_MAXXFER;
|
1996-03-25 01:20:41 +03:00
|
|
|
minphys(bp);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* start a scsi operation given the command and the data address. Also needs
|
|
|
|
* the unit, target and lu.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
aha_scsi_cmd(xs)
|
1997-08-27 15:22:52 +04:00
|
|
|
struct scsipi_xfer *xs;
|
1996-03-25 01:20:41 +03:00
|
|
|
{
|
1997-08-27 15:22:52 +04:00
|
|
|
struct scsipi_link *sc_link = xs->sc_link;
|
1996-03-25 01:20:41 +03:00
|
|
|
struct aha_softc *sc = sc_link->adapter_softc;
|
1997-06-07 03:30:02 +04:00
|
|
|
bus_dma_tag_t dmat = sc->sc_dmat;
|
1996-03-25 01:20:41 +03:00
|
|
|
struct aha_ccb *ccb;
|
1997-06-07 03:30:02 +04:00
|
|
|
int error, seg, flags, s;
|
2000-02-12 22:12:52 +03:00
|
|
|
int fromqueue = 0, dontqueue = 0, nowait = 0;
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
SC_DEBUG(sc_link, SDEV_DB2, ("aha_scsi_cmd\n"));
|
1997-11-04 08:58:22 +03:00
|
|
|
|
|
|
|
s = splbio(); /* protect the queue */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If we're running the queue from aha_done(), we've been
|
|
|
|
* called with the first queue entry as our argument.
|
|
|
|
*/
|
1998-12-09 11:37:50 +03:00
|
|
|
if (xs == TAILQ_FIRST(&sc->sc_queue)) {
|
|
|
|
TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q);
|
1997-11-04 08:58:22 +03:00
|
|
|
fromqueue = 1;
|
2000-02-12 22:12:52 +03:00
|
|
|
nowait = 1;
|
1997-11-04 08:58:22 +03:00
|
|
|
goto get_ccb;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Polled requests can't be queued for later. */
|
1999-10-01 03:04:39 +04:00
|
|
|
dontqueue = xs->xs_control & XS_CTL_POLL;
|
1997-11-04 08:58:22 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If there are jobs in the queue, run them first.
|
|
|
|
*/
|
1998-12-09 11:37:50 +03:00
|
|
|
if (TAILQ_FIRST(&sc->sc_queue) != NULL) {
|
1997-11-04 08:58:22 +03:00
|
|
|
/*
|
|
|
|
* If we can't queue, we have to abort, since
|
|
|
|
* we have to preserve order.
|
|
|
|
*/
|
|
|
|
if (dontqueue) {
|
|
|
|
splx(s);
|
|
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
|
|
return (TRY_AGAIN_LATER);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Swap with the first queue entry.
|
|
|
|
*/
|
1998-12-09 11:37:50 +03:00
|
|
|
TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q);
|
|
|
|
xs = TAILQ_FIRST(&sc->sc_queue);
|
|
|
|
TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q);
|
1997-11-04 08:58:22 +03:00
|
|
|
fromqueue = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
get_ccb:
|
1996-03-25 01:20:41 +03:00
|
|
|
/*
|
|
|
|
* get a ccb to use. If the transfer
|
|
|
|
* is from a buf (possibly from interrupt time)
|
|
|
|
* then we can't allow it to sleep
|
|
|
|
*/
|
1999-10-01 03:04:39 +04:00
|
|
|
flags = xs->xs_control;
|
2000-02-12 22:12:52 +03:00
|
|
|
if (nowait)
|
|
|
|
flags |= XS_CTL_NOSLEEP;
|
1996-03-25 01:20:41 +03:00
|
|
|
if ((ccb = aha_get_ccb(sc, flags)) == NULL) {
|
1997-11-04 08:58:22 +03:00
|
|
|
/*
|
|
|
|
* If we can't queue, we lose.
|
|
|
|
*/
|
|
|
|
if (dontqueue) {
|
|
|
|
splx(s);
|
|
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
|
|
return (TRY_AGAIN_LATER);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Stuff ourselves into the queue, in front
|
|
|
|
* if we came off in the first place.
|
|
|
|
*/
|
1998-12-09 11:37:50 +03:00
|
|
|
if (fromqueue)
|
|
|
|
TAILQ_INSERT_HEAD(&sc->sc_queue, xs, adapter_q);
|
|
|
|
else
|
|
|
|
TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q);
|
1997-11-04 08:58:22 +03:00
|
|
|
splx(s);
|
|
|
|
return (SUCCESSFULLY_QUEUED);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
1997-11-04 08:58:22 +03:00
|
|
|
|
|
|
|
splx(s); /* done playing with the queue */
|
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
ccb->xs = xs;
|
|
|
|
ccb->timeout = xs->timeout;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Put all the arguments for the xfer in the ccb
|
|
|
|
*/
|
1999-10-01 03:04:39 +04:00
|
|
|
if (flags & XS_CTL_RESET) {
|
1996-03-25 01:20:41 +03:00
|
|
|
ccb->opcode = AHA_RESET_CCB;
|
|
|
|
ccb->scsi_cmd_length = 0;
|
|
|
|
} else {
|
|
|
|
/* can't use S/G if zero length */
|
|
|
|
ccb->opcode = (xs->datalen ? AHA_INIT_SCAT_GATH_CCB
|
|
|
|
: AHA_INITIATOR_CCB);
|
|
|
|
bcopy(xs->cmd, &ccb->scsi_cmd,
|
|
|
|
ccb->scsi_cmd_length = xs->cmdlen);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (xs->datalen) {
|
1997-06-07 03:30:02 +04:00
|
|
|
/*
|
|
|
|
* Map the DMA transfer.
|
|
|
|
*/
|
|
|
|
#ifdef TFS
|
1999-10-01 03:04:39 +04:00
|
|
|
if (flags & XS_CTL_DATA_UIO) {
|
1997-06-07 03:30:02 +04:00
|
|
|
error = bus_dmamap_load_uio(dmat,
|
|
|
|
ccb->dmamap_xfer, (struct uio *)xs->data,
|
1999-10-01 03:04:39 +04:00
|
|
|
(flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT :
|
1997-06-07 03:30:02 +04:00
|
|
|
BUS_DMA_WAITOK);
|
1996-03-25 01:20:41 +03:00
|
|
|
} else
|
1997-06-07 03:30:02 +04:00
|
|
|
#endif
|
1996-03-25 01:20:41 +03:00
|
|
|
{
|
1997-06-07 03:30:02 +04:00
|
|
|
error = bus_dmamap_load(dmat,
|
|
|
|
ccb->dmamap_xfer, xs->data, xs->datalen, NULL,
|
1999-10-01 03:04:39 +04:00
|
|
|
(flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT :
|
1997-06-07 03:30:02 +04:00
|
|
|
BUS_DMA_WAITOK);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
1997-06-07 03:30:02 +04:00
|
|
|
|
|
|
|
if (error) {
|
|
|
|
if (error == EFBIG) {
|
|
|
|
printf("%s: aha_scsi_cmd, more than %d"
|
|
|
|
" dma segments\n",
|
|
|
|
sc->sc_dev.dv_xname, AHA_NSEG);
|
|
|
|
} else {
|
|
|
|
printf("%s: aha_scsi_cmd, error %d loading"
|
|
|
|
" dma map\n",
|
|
|
|
sc->sc_dev.dv_xname, error);
|
|
|
|
}
|
1996-03-25 01:20:41 +03:00
|
|
|
goto bad;
|
|
|
|
}
|
1997-06-07 03:30:02 +04:00
|
|
|
|
1998-02-04 08:12:46 +03:00
|
|
|
bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0,
|
|
|
|
ccb->dmamap_xfer->dm_mapsize,
|
1999-10-01 03:04:39 +04:00
|
|
|
(flags & XS_CTL_DATA_IN) ? BUS_DMASYNC_PREREAD :
|
1997-06-07 03:30:02 +04:00
|
|
|
BUS_DMASYNC_PREWRITE);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Load the hardware scatter/gather map with the
|
|
|
|
* contents of the DMA map.
|
|
|
|
*/
|
|
|
|
for (seg = 0; seg < ccb->dmamap_xfer->dm_nsegs; seg++) {
|
|
|
|
ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_addr,
|
|
|
|
ccb->scat_gath[seg].seg_addr);
|
|
|
|
ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_len,
|
|
|
|
ccb->scat_gath[seg].seg_len);
|
|
|
|
}
|
|
|
|
|
1998-02-09 13:53:07 +03:00
|
|
|
ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr +
|
|
|
|
AHA_CCB_OFF(ccb) + offsetof(struct aha_ccb, scat_gath),
|
|
|
|
ccb->data_addr);
|
1997-06-07 03:30:02 +04:00
|
|
|
ltophys(ccb->dmamap_xfer->dm_nsegs *
|
|
|
|
sizeof(struct aha_scat_gath), ccb->data_length);
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* No data xfer, use non S/G values.
|
|
|
|
*/
|
1996-03-25 01:20:41 +03:00
|
|
|
ltophys(0, ccb->data_addr);
|
|
|
|
ltophys(0, ccb->data_length);
|
|
|
|
}
|
|
|
|
|
|
|
|
ccb->data_out = 0;
|
|
|
|
ccb->data_in = 0;
|
1997-08-27 15:22:52 +04:00
|
|
|
ccb->target = sc_link->scsipi_scsi.target;
|
|
|
|
ccb->lun = sc_link->scsipi_scsi.lun;
|
1996-03-25 01:20:41 +03:00
|
|
|
ccb->req_sense_length = sizeof(ccb->scsi_sense);
|
|
|
|
ccb->host_stat = 0x00;
|
|
|
|
ccb->target_stat = 0x00;
|
|
|
|
ccb->link_id = 0;
|
|
|
|
ltophys(0, ccb->link_addr);
|
|
|
|
|
1998-02-09 13:53:07 +03:00
|
|
|
bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
|
|
|
|
AHA_CCB_OFF(ccb), sizeof(struct aha_ccb),
|
|
|
|
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
|
|
|
|
|
1996-03-25 01:20:41 +03:00
|
|
|
s = splbio();
|
|
|
|
aha_queue_ccb(sc, ccb);
|
|
|
|
splx(s);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Usually return SUCCESSFULLY QUEUED
|
|
|
|
*/
|
|
|
|
SC_DEBUG(sc_link, SDEV_DB3, ("cmd_sent\n"));
|
1999-10-01 03:04:39 +04:00
|
|
|
if ((flags & XS_CTL_POLL) == 0)
|
1996-09-07 16:12:18 +04:00
|
|
|
return (SUCCESSFULLY_QUEUED);
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If we can't use interrupts, poll on completion
|
|
|
|
*/
|
|
|
|
if (aha_poll(sc, xs, ccb->timeout)) {
|
|
|
|
aha_timeout(ccb);
|
|
|
|
if (aha_poll(sc, xs, ccb->timeout))
|
|
|
|
aha_timeout(ccb);
|
|
|
|
}
|
1996-09-07 16:12:18 +04:00
|
|
|
return (COMPLETE);
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
bad:
|
|
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
|
|
aha_free_ccb(sc, ccb);
|
1996-09-07 16:12:18 +04:00
|
|
|
return (COMPLETE);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Poll a particular unit, looking for a particular xs
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
aha_poll(sc, xs, count)
|
|
|
|
struct aha_softc *sc;
|
1997-08-27 15:22:52 +04:00
|
|
|
struct scsipi_xfer *xs;
|
1996-03-25 01:20:41 +03:00
|
|
|
int count;
|
|
|
|
{
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
/* timeouts are in msec, so we loop in 1000 usec cycles */
|
|
|
|
while (count) {
|
|
|
|
/*
|
|
|
|
* If we had interrupts enabled, would we
|
|
|
|
* have got an interrupt?
|
|
|
|
*/
|
1996-10-22 02:34:38 +04:00
|
|
|
if (bus_space_read_1(iot, ioh, AHA_INTR_PORT) & AHA_INTR_ANYINTR)
|
1996-09-07 16:12:18 +04:00
|
|
|
aha_intr(sc);
|
1999-10-01 03:04:39 +04:00
|
|
|
if (xs->xs_status & XS_STS_DONE)
|
1996-09-07 16:12:18 +04:00
|
|
|
return (0);
|
1996-03-25 01:20:41 +03:00
|
|
|
delay(1000); /* only happens in boot so ok */
|
|
|
|
count--;
|
|
|
|
}
|
1996-09-07 16:12:18 +04:00
|
|
|
return (1);
|
1996-03-25 01:20:41 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
aha_timeout(arg)
|
|
|
|
void *arg;
|
|
|
|
{
|
|
|
|
struct aha_ccb *ccb = arg;
|
1997-08-27 15:22:52 +04:00
|
|
|
struct scsipi_xfer *xs = ccb->xs;
|
|
|
|
struct scsipi_link *sc_link = xs->sc_link;
|
1996-03-25 01:20:41 +03:00
|
|
|
struct aha_softc *sc = sc_link->adapter_softc;
|
|
|
|
int s;
|
|
|
|
|
1997-08-27 15:22:52 +04:00
|
|
|
scsi_print_addr(sc_link);
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("timed out");
|
1996-03-25 01:20:41 +03:00
|
|
|
|
|
|
|
s = splbio();
|
|
|
|
|
|
|
|
#ifdef AHADIAG
|
|
|
|
/*
|
|
|
|
* If The ccb's mbx is not free, then the board has gone south?
|
|
|
|
*/
|
|
|
|
aha_collect_mbo(sc);
|
|
|
|
if (ccb->flags & CCB_SENDING) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: not taking commands!\n", sc->sc_dev.dv_xname);
|
1996-03-25 01:20:41 +03:00
|
|
|
Debugger();
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If it has been through before, then
|
|
|
|
* a previous abort has failed, don't
|
|
|
|
* try abort again
|
|
|
|
*/
|
|
|
|
if (ccb->flags & CCB_ABORT) {
|
|
|
|
/* abort timed out */
|
1996-10-13 05:37:04 +04:00
|
|
|
printf(" AGAIN\n");
|
1996-03-25 01:20:41 +03:00
|
|
|
/* XXX Must reset! */
|
|
|
|
} else {
|
|
|
|
/* abort the operation that has timed out */
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("\n");
|
1996-03-25 01:20:41 +03:00
|
|
|
ccb->xs->error = XS_TIMEOUT;
|
|
|
|
ccb->timeout = AHA_ABORT_TIMEOUT;
|
|
|
|
ccb->flags |= CCB_ABORT;
|
|
|
|
aha_queue_ccb(sc, ccb);
|
|
|
|
}
|
|
|
|
|
|
|
|
splx(s);
|
|
|
|
}
|