1999-03-24 00:29:03 +03:00
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/* $NetBSD: bus.h,v 1.3 1999/03/23 21:29:06 drochner Exp $ */
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1999-03-16 19:30:16 +03:00
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* bus_space(9) and bus_dma(9) interface for NetBSD/x68k.
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*/
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#ifndef _X68K_BUS_H_
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#define _X68K_BUS_H_
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/*
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* Bus address and size types
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*/
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typedef u_long bus_addr_t;
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typedef u_long bus_size_t;
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typedef u_long bus_space_handle_t;
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/*
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* Bus space descripter
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*/
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typedef struct x68k_bus_space *bus_space_tag_t;
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struct x68k_bus_space {
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#if 0
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enum {
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X68K_INTIO_BUS,
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X68K_PCI_BUS,
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X68K_NEPTUNE_BUS
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} x68k_bus_type;
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#endif
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int (*x68k_bus_space_map) __P((
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bus_space_tag_t,
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bus_addr_t,
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bus_size_t,
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int, /* flags */
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bus_space_handle_t *));
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void (*x68k_bus_space_unmap) __P((
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bus_space_tag_t,
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bus_space_handle_t,
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bus_size_t));
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int (*x68k_bus_space_subregion) __P((
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bus_space_tag_t,
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bus_space_handle_t,
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bus_size_t, /* offset */
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bus_size_t, /* size */
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bus_space_handle_t *));
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int (*x68k_bus_space_alloc) __P((
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bus_space_tag_t,
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bus_addr_t, /* reg_start */
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bus_addr_t, /* reg_end */
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bus_size_t,
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bus_size_t, /* alignment */
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bus_size_t, /* boundary */
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int, /* flags */
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bus_addr_t *,
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bus_space_handle_t *));
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void (*x68k_bus_space_free) __P((
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bus_space_tag_t,
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bus_space_handle_t,
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bus_size_t));
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#if 0
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void (*x68k_bus_space_barrier) __P((
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bus_space_tag_t,
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bus_space_handle_t,
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bus_size_t, /* offset */
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bus_size_t, /* length */
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int)); /* flags */
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#endif
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struct device *x68k_bus_device;
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};
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int x68k_bus_space_alloc __P((bus_space_tag_t, bus_addr_t, bus_addr_t, bus_size_t, bus_size_t, bus_size_t, int, bus_addr_t *, bus_space_handle_t *));
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void x68k_bus_space_free __P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
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/*
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* bus_space(9) interface
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*/
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#define bus_space_map(t,a,s,f,h) \
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((*((t)->x68k_bus_space_map)) ((t),(a),(s),(f),(h)))
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#define bus_space_unmap(t,h,s) \
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((*((t)->x68k_bus_space_unmap)) ((t),(h),(s)))
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#define bus_space_subregion(t,h,o,s,p) \
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((*((t)->x68k_bus_space_subregion)) ((t),(h),(o),(s),(p)))
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#define BUS_SPACE_MAP_CACHEABLE 0x0001
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#define BUS_SPACE_MAP_LINEAR 0x0002
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/*
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* For simpler hadware, many x68k devices are mapped with shifted address
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* i.e. only on even or odd addresses.
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*/
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#define BUS_SPACE_MAP_SHIFTED 0x1001
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#define bus_space_alloc(t,rs,re,s,a,b,f,r,h) \
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((*((t)->x68k_bus_space_alloc)) ((t),(rs),(re),(s),(a),(b),(f),(r),(h)))
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#define bus_space_free(t,h,s) \
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((*((t)->x68k_bus_space_free)) ((t),(h),(s)))
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/*
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* Note: the 680x0 does not currently require barriers, but we must
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* provide the flags to MI code.
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*/
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#define bus_space_barrier(t, h, o, l, f) \
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((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
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#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
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#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
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#define bus_space_read_1(t,h,o) _bus_space_read_1(t,h,o)
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#define bus_space_read_2(t,h,o) _bus_space_read_2(t,h,o)
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#define bus_space_read_4(t,h,o) _bus_space_read_4(t,h,o)
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#define bus_space_read_multi_1(t,h,o,p,c) _bus_space_read_multi_1(t,h,o,p,c)
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#define bus_space_read_multi_2(t,h,o,p,c) _bus_space_read_multi_2(t,h,o,p,c)
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#define bus_space_read_multi_4(t,h,o,p,c) _bus_space_read_multi_4(t,h,o,p,c)
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#define bus_space_read_region_1(t,h,o,p,c) _bus_space_read_region_1(t,h,o,p,c)
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#define bus_space_read_region_2(t,h,o,p,c) _bus_space_read_region_2(t,h,o,p,c)
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#define bus_space_read_region_4(t,h,o,p,c) _bus_space_read_region_4(t,h,o,p,c)
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#define bus_space_write_1(t,h,o,v) _bus_space_write_1(t,h,o,v)
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#define bus_space_write_2(t,h,o,v) _bus_space_write_2(t,h,o,v)
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#define bus_space_write_4(t,h,o,v) _bus_space_write_4(t,h,o,v)
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#define bus_space_write_multi_1(t,h,o,p,c) _bus_space_write_multi_1(t,h,o,p,c)
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#define bus_space_write_multi_2(t,h,o,p,c) _bus_space_write_multi_2(t,h,o,p,c)
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#define bus_space_write_multi_4(t,h,o,p,c) _bus_space_write_multi_4(t,h,o,p,c)
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#define bus_space_write_region_1(t,h,o,p,c) \
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_bus_space_write_region_1(t,h,o,p,c)
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#define bus_space_write_region_2(t,h,o,p,c) \
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_bus_space_write_region_2(t,h,o,p,c)
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#define bus_space_write_region_4(t,h,o,p,c) \
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_bus_space_write_region_4(t,h,o,p,c)
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#define bus_space_set_region_1(t,h,o,v,c) _bus_space_set_region_1(t,h,o,v,c)
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#define bus_space_set_region_2(t,h,o,v,c) _bus_space_set_region_2(t,h,o,v,c)
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#define bus_space_set_region_4(t,h,o,v,c) _bus_space_set_region_4(t,h,o,v,c)
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#define bus_space_copy_region_1(t,sh,so,dh,do,c) \
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_bus_space_copy_region_1(t,sh,so,dh,do,c)
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#define bus_space_copy_region_2(t,sh,so,dh,do,c) \
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_bus_space_copy_region_2(t,sh,so,dh,do,c)
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#define bus_space_copy_region_4(t,sh,so,dh,do,c) \
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_bus_space_copy_region_4(t,sh,so,dh,do,c)
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static inline u_int8_t _bus_space_read_1
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__P((bus_space_tag_t, bus_space_handle_t bsh, bus_size_t offset));
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static inline u_int16_t _bus_space_read_2
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
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static inline u_int32_t _bus_space_read_4
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
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static inline void _bus_space_read_multi_1
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int8_t *, bus_size_t));
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static inline void _bus_space_read_multi_2
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int16_t *, bus_size_t));
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static inline void _bus_space_read_multi_4
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int32_t *, bus_size_t));
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static inline void _bus_space_read_region_1
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int8_t *, bus_size_t));
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static inline void _bus_space_read_region_2
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int16_t *, bus_size_t));
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static inline void _bus_space_read_region_4
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int32_t *, bus_size_t));
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static inline void _bus_space_write_1
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int8_t));
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static inline void _bus_space_write_2
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int16_t));
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static inline void _bus_space_write_4
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int32_t));
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static inline void _bus_space_write_multi_1
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int8_t *, bus_size_t));
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static inline void _bus_space_write_multi_2
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int16_t *, bus_size_t));
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static inline void _bus_space_write_multi_4
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int32_t *, bus_size_t));
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static inline void _bus_space_write_region_1
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int8_t *, bus_size_t));
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static inline void _bus_space_write_region_2
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int16_t *, bus_size_t));
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static inline void _bus_space_write_region_4
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int32_t *, bus_size_t));
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static inline void _bus_space_set_region_1
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int8_t, bus_size_t));
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static inline void _bus_space_set_region_2
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int16_t, bus_size_t));
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static inline void _bus_space_set_region_4
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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u_int32_t, bus_size_t));
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static inline void _bus_space_copy_region_1
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t));
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static inline void _bus_space_copy_region_2
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t));
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static inline void _bus_space_copy_region_4
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__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,
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bus_space_handle_t, bus_size_t, bus_size_t));
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static inline u_int8_t
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_bus_space_read_1(t, bsh, offset)
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bus_space_tag_t t;
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bus_space_handle_t bsh;
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bus_size_t offset;
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{
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return (*((volatile u_int8_t *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset)));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline u_int16_t
|
|
|
|
|
_bus_space_read_2(t, bsh, offset)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
{
|
|
|
|
|
return (*((volatile u_int16_t *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset)));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline u_int32_t
|
|
|
|
|
_bus_space_read_4(t, bsh, offset)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
{
|
|
|
|
|
return (*((volatile u_int32_t *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset)));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_read_multi_1(t, bsh, offset, datap, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int8_t *datap;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*datap++ = *(volatile u_int8_t *) ((bsh&0x80000000)
|
|
|
|
|
? ((bsh&0x7fffffff)
|
|
|
|
|
+ offset*2)
|
|
|
|
|
: bsh + offset);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_read_multi_2(t, bsh, offset, datap, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int16_t *datap;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*datap++ = *(volatile u_int16_t *) ((bsh&0x80000000)
|
|
|
|
|
? ((bsh&0x7fffffff)
|
|
|
|
|
+ offset*2)
|
|
|
|
|
: bsh + offset);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_read_multi_4(t, bsh, offset, datap, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int32_t *datap;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*datap++ = *(volatile u_int32_t *) ((bsh&0x80000000)
|
|
|
|
|
? ((bsh&0x7fffffff)
|
|
|
|
|
+ offset*2)
|
|
|
|
|
: bsh + offset);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_read_region_1(t, bsh, offset, datap, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int8_t *datap;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
volatile u_int8_t *addr = (void *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset);
|
|
|
|
|
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*datap++ = *addr++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_read_region_2(t, bsh, offset, datap, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int16_t *datap;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
volatile u_int16_t *addr = (void *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset);
|
|
|
|
|
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*datap++ = *addr++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_read_region_4(t, bsh, offset, datap, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int32_t *datap;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
volatile u_int32_t *addr = (void *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset);
|
|
|
|
|
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*datap++ = *addr++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_write_1(t, bsh, offset, value)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int8_t value;
|
|
|
|
|
{
|
|
|
|
|
*(volatile u_int8_t *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset) = value;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_write_2(t, bsh, offset, value)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int16_t value;
|
|
|
|
|
{
|
|
|
|
|
*(volatile u_int16_t *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset) = value;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_write_4(t, bsh, offset, value)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int32_t value;
|
|
|
|
|
{
|
|
|
|
|
*(volatile u_int32_t *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset) = value;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_write_multi_1(t, bsh, offset, datap, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int8_t *datap;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*(volatile u_int8_t *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset) = *datap++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_write_multi_2(t, bsh, offset, datap, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int16_t *datap;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*(volatile u_int16_t *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset) = *datap++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_write_multi_4(t, bsh, offset, datap, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int32_t *datap;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*(volatile u_int32_t *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset) = *datap++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_write_region_1(t, bsh, offset, datap, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int8_t *datap;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
volatile u_int8_t *addr = (void *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset);
|
|
|
|
|
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*addr++ = *datap++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_write_region_2(t, bsh, offset, datap, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int16_t *datap;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
volatile u_int16_t *addr = (void *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset);
|
|
|
|
|
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*addr++ = *datap++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_write_region_4(t, bsh, offset, datap, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int32_t *datap;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
volatile u_int32_t *addr = (void *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset);
|
|
|
|
|
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*addr++ = *datap++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_set_region_1(t, bsh, offset, value, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int8_t value;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
volatile u_int8_t *addr = (void *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset);
|
|
|
|
|
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*addr++ = value;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_set_region_2(t, bsh, offset, value, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int16_t value;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
volatile u_int16_t *addr = (void *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset);
|
|
|
|
|
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*addr++ = value;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_set_region_4(t, bsh, offset, value, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t bsh;
|
|
|
|
|
bus_size_t offset;
|
|
|
|
|
u_int32_t value;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
volatile u_int32_t *addr = (void *) ((bsh&0x80000000)
|
|
|
|
|
? (bsh&0x7fffffff) + offset*2
|
|
|
|
|
: bsh + offset);
|
|
|
|
|
|
|
|
|
|
while (count-- > 0) {
|
|
|
|
|
*addr++ = value;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
_bus_space_copy_region_1(t, sbsh, soffset, dbsh, doffset, count)
|
|
|
|
|
bus_space_tag_t t;
|
|
|
|
|
bus_space_handle_t sbsh;
|
|
|
|
|
bus_size_t soffset;
|
|
|
|
|
bus_space_handle_t dbsh;
|
|
|
|
|
bus_size_t doffset;
|
|
|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
volatile u_int8_t *saddr = (void *) (sbsh + soffset);
|
|
|
|
|
volatile u_int8_t *daddr = (void *) (dbsh + doffset);
|
|
|
|
|
|
|
|
|
|
if ((u_int32_t) saddr >= (u_int32_t) daddr)
|
|
|
|
|
while (count-- > 0)
|
|
|
|
|
*daddr++ = *saddr++;
|
|
|
|
|
else {
|
|
|
|
|
saddr += count;
|
|
|
|
|
daddr += count;
|
|
|
|
|
while (count-- > 0)
|
|
|
|
|
*--daddr = *--saddr;
|
|
|
|
|
}
|
|
|
|
|
}
|
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|
|
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|
|
|
static inline void
|
|
|
|
|
_bus_space_copy_region_2(t, sbsh, soffset, dbsh, doffset, count)
|
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|
|
|
bus_space_tag_t t;
|
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|
bus_space_handle_t sbsh;
|
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|
bus_size_t soffset;
|
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|
bus_space_handle_t dbsh;
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|
bus_size_t doffset;
|
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|
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|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
volatile u_int16_t *saddr = (void *) (sbsh + soffset);
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volatile u_int16_t *daddr = (void *) (dbsh + doffset);
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if ((u_int32_t) saddr >= (u_int32_t) daddr)
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while (count-- > 0)
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*daddr++ = *saddr++;
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else {
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|
saddr += count;
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|
daddr += count;
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|
while (count-- > 0)
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*--daddr = *--saddr;
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}
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}
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static inline void
|
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|
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|
_bus_space_copy_region_4(t, sbsh, soffset, dbsh, doffset, count)
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|
bus_space_tag_t t;
|
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|
bus_space_handle_t sbsh;
|
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|
bus_size_t soffset;
|
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|
bus_space_handle_t dbsh;
|
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|
bus_size_t doffset;
|
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|
|
|
bus_size_t count;
|
|
|
|
|
{
|
|
|
|
|
volatile u_int32_t *saddr = (void *) (sbsh + soffset);
|
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|
|
|
volatile u_int32_t *daddr = (void *) (dbsh + doffset);
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|
if ((u_int32_t) saddr >= (u_int32_t) daddr)
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|
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|
while (count-- > 0)
|
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|
|
*daddr++ = *saddr++;
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|
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|
else {
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|
|
saddr += count;
|
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|
|
|
daddr += count;
|
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|
|
|
while (count-- > 0)
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|
|
*--daddr = *--saddr;
|
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|
|
|
}
|
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|
|
|
}
|
|
|
|
|
|
1999-03-24 00:29:03 +03:00
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|
#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
|
1999-03-16 19:30:16 +03:00
|
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|
|
|
|
/*
|
|
|
|
|
* DMA segment
|
|
|
|
|
*/
|
|
|
|
|
struct x68k_bus_dma_segment {
|
|
|
|
|
bus_addr_t ds_addr;
|
|
|
|
|
bus_size_t ds_len;
|
|
|
|
|
};
|
|
|
|
|
typedef struct x68k_bus_dma_segment bus_dma_segment_t;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* DMA descriptor
|
|
|
|
|
*/
|
|
|
|
|
/* Forwards needed by prototypes below. */
|
|
|
|
|
struct mbuf;
|
|
|
|
|
struct uio;
|
|
|
|
|
|
|
|
|
|
typedef struct x68k_bus_dma *bus_dma_tag_t;
|
|
|
|
|
typedef struct x68k_bus_dmamap *bus_dmamap_t;
|
|
|
|
|
struct x68k_bus_dma {
|
|
|
|
|
/*
|
|
|
|
|
* The `bounce threshold' is checked while we are loading
|
|
|
|
|
* the DMA map. If the physical address of the segment
|
|
|
|
|
* exceeds the threshold, an error will be returned. The
|
|
|
|
|
* caller can then take whatever action is necessary to
|
|
|
|
|
* bounce the transfer. If this value is 0, it will be
|
|
|
|
|
* ignored.
|
|
|
|
|
*/
|
|
|
|
|
bus_addr_t _bounce_thresh;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* DMA mapping methods.
|
|
|
|
|
*/
|
|
|
|
|
int (*x68k_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int,
|
|
|
|
|
bus_size_t, bus_size_t, int, bus_dmamap_t *));
|
|
|
|
|
void (*x68k_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t));
|
|
|
|
|
int (*x68k_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *,
|
|
|
|
|
bus_size_t, struct proc *, int));
|
|
|
|
|
int (*x68k_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t,
|
|
|
|
|
struct mbuf *, int));
|
|
|
|
|
int (*x68k_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t,
|
|
|
|
|
struct uio *, int));
|
|
|
|
|
int (*x68k_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t,
|
|
|
|
|
bus_dma_segment_t *, int, bus_size_t, int));
|
|
|
|
|
void (*x68k_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t));
|
|
|
|
|
void (*x68k_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t,
|
|
|
|
|
bus_addr_t, bus_size_t, int));
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* DMA memory utility functions.
|
|
|
|
|
*/
|
|
|
|
|
int (*x68k_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t,
|
|
|
|
|
bus_size_t, bus_dma_segment_t *, int, int *, int));
|
|
|
|
|
void (*x68k_dmamem_free) __P((bus_dma_tag_t,
|
|
|
|
|
bus_dma_segment_t *, int));
|
|
|
|
|
int (*x68k_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *,
|
|
|
|
|
int, size_t, caddr_t *, int));
|
|
|
|
|
void (*x68k_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t));
|
|
|
|
|
int (*x68k_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *,
|
|
|
|
|
int, int, int, int));
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* bus_dmamap_t
|
|
|
|
|
*
|
|
|
|
|
* Describes a DMA mapping.
|
|
|
|
|
*/
|
|
|
|
|
struct x68k_bus_dmamap {
|
|
|
|
|
/*
|
|
|
|
|
* PRIVATE MEMBERS: not for use my machine-independent code.
|
|
|
|
|
*/
|
|
|
|
|
bus_size_t x68k_dm_size; /* largest DMA transfer mappable */
|
|
|
|
|
int x68k_dm_segcnt; /* number of segs this map can map */
|
|
|
|
|
bus_size_t x68k_dm_maxsegsz; /* largest possible segment */
|
|
|
|
|
bus_size_t x68k_dm_boundary; /* don't cross this */
|
|
|
|
|
bus_addr_t x68k_dm_bounce_thresh; /* bounce threshold */
|
|
|
|
|
int x68k_dm_flags; /* misc. flags */
|
|
|
|
|
|
|
|
|
|
void *x68k_dm_cookie; /* cookie for bus-specific functions */
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* PUBLIC MEMBERS: these are used by machine-independent code.
|
|
|
|
|
*/
|
|
|
|
|
bus_size_t dm_mapsize; /* size of the mapping */
|
|
|
|
|
int dm_nsegs; /* # valid segments in mapping */
|
|
|
|
|
bus_dma_segment_t dm_segs[1]; /* segments; variable length */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
int x68k_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t,
|
|
|
|
|
bus_size_t, int, bus_dmamap_t *));
|
|
|
|
|
void x68k_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
|
|
|
|
|
int x68k_bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
|
|
|
|
|
bus_size_t, struct proc *, int));
|
|
|
|
|
int x68k_bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
|
|
|
|
|
struct mbuf *, int));
|
|
|
|
|
int x68k_bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
|
|
|
|
|
struct uio *, int));
|
|
|
|
|
int x68k_bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
|
|
|
|
|
bus_dma_segment_t *, int, bus_size_t, int));
|
|
|
|
|
void x68k_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
|
|
|
|
|
void x68k_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
|
|
|
|
|
bus_size_t, int));
|
|
|
|
|
|
|
|
|
|
int x68k_bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
|
|
|
|
|
bus_size_t alignment, bus_size_t boundary,
|
|
|
|
|
bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
|
|
|
|
|
void x68k_bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
|
|
|
|
|
int nsegs));
|
|
|
|
|
int x68k_bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
|
|
|
|
|
int nsegs, size_t size, caddr_t *kvap, int flags));
|
|
|
|
|
void x68k_bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
|
|
|
|
|
size_t size));
|
|
|
|
|
int x68k_bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
|
|
|
|
|
int nsegs, int off, int prot, int flags));
|
|
|
|
|
|
|
|
|
|
int x68k_bus_dmamap_load_buffer __P((bus_dmamap_t, void *,
|
|
|
|
|
bus_size_t buflen, struct proc *, int, paddr_t *, int *, int));
|
|
|
|
|
int x68k_bus_dmamem_alloc_range __P((bus_dma_tag_t tag, bus_size_t size,
|
|
|
|
|
bus_size_t alignment, bus_size_t boundary,
|
|
|
|
|
bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
|
|
|
|
|
paddr_t low, paddr_t high));
|
|
|
|
|
|
|
|
|
|
#define bus_dmamap_create(t,s,n,m,b,f,p) \
|
|
|
|
|
((*((t)->x68k_dmamap_create)) ((t),(s),(n),(m),(b),(f),(p)))
|
|
|
|
|
#define bus_dmamap_destroy(t,p) \
|
|
|
|
|
((*((t)->x68k_dmamap_destroy)) ((t),(p)))
|
|
|
|
|
#define bus_dmamap_load(t,m,b,s,p,f) \
|
|
|
|
|
((*((t)->x68k_dmamap_load)) ((t),(m),(b),(s),(p),(f)))
|
|
|
|
|
#define bus_dmamap_load_mbuf(t,m,b,f) \
|
|
|
|
|
((*((t)->x68k_dmamap_load_mbuf)) ((t),(m),(b),(f)))
|
|
|
|
|
#define bus_dmamap_load_uio(t,m,u,f) \
|
|
|
|
|
((*((t)->x68k_dmamap_load_uio)) ((t),(m),(u),(f)))
|
|
|
|
|
#define bus_dmamap_load_raw(t,m,sg,n,s,f) \
|
|
|
|
|
((*((t)->x68k_dmamap_load_raw)) ((t),(m),(sg),(n),(s),(f)))
|
|
|
|
|
#define bus_dmamap_unload(t,p) \
|
|
|
|
|
((*((t)->x68k_dmamap_unload)) ((t),(p)))
|
|
|
|
|
#define bus_dmamap_sync(t,p,o,l,ops) \
|
|
|
|
|
((*((t)->x68k_dmamap_sync)) ((t),(p),(o),(l),(ops)))
|
|
|
|
|
|
|
|
|
|
#define bus_dmamem_alloc(t,s,a,b,sg,n,r,f) \
|
|
|
|
|
((*((t)->x68k_dmamem_alloc)) ((t),(s),(a),(b),(sg),(n),(r),(f)))
|
|
|
|
|
#define bus_dmamem_free(t,sg,n) \
|
|
|
|
|
((*((t)->x68k_dmamem_free)) ((t),(sg),(n)))
|
|
|
|
|
#define bus_dmamem_map(t,sg,n,s,k,f) \
|
|
|
|
|
((*((t)->x68k_dmamem_map)) ((t),(sg),(n),(s),(k),(f)))
|
|
|
|
|
#define bus_dmamem_unmap(t,k,s) \
|
|
|
|
|
((*((t)->x68k_dmamem_unmap)) ((t),(k),(s)))
|
|
|
|
|
#define bus_dmamem_mmap(t,sg,n,o,p,f) \
|
|
|
|
|
((*((t)->x68k_dmamem_mmap)) ((t),(sg),(n),(o),(p),(f)))
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Flags used in various bus DMA methods.
|
|
|
|
|
*/
|
|
|
|
|
#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
|
|
|
|
|
#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
|
|
|
|
|
#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
|
|
|
|
|
#define BUS_DMA_COHERENT 0x04 /* hint: map memory DMA coherent */
|
|
|
|
|
#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
|
|
|
|
|
#define BUS_DMA_BUS2 0x20
|
|
|
|
|
#define BUS_DMA_BUS3 0x40
|
|
|
|
|
#define BUS_DMA_BUS4 0x80
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Operations performed by bus_dmamap_sync().
|
|
|
|
|
*/
|
|
|
|
|
#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
|
|
|
|
|
#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
|
|
|
|
|
#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
|
|
|
|
|
#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
|
|
|
|
|
|
|
|
|
|
#endif /* _X68K_BUS_H_ */
|
