208 lines
6.1 KiB
C
208 lines
6.1 KiB
C
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/* $NetBSD: sdhc_cardbus.c,v 1.1 2010/03/27 03:04:51 nonaka Exp $ */
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/*
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* Copyright (c) 2010 NONAKA Kimihiro <nonaka@netbsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: sdhc_cardbus.c,v 1.1 2010/03/27 03:04:51 nonaka Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/pmf.h>
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#include <dev/cardbus/cardbusvar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/sdmmc/sdhcreg.h>
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#include <dev/sdmmc/sdhcvar.h>
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#include <dev/sdmmc/sdmmcvar.h>
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/* PCI interface classes */
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#define SDHC_PCI_INTERFACE_NO_DMA 0x00
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#define SDHC_PCI_INTERFACE_DMA 0x01
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#define SDHC_PCI_INTERFACE_VENDOR 0x02
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/*
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* 8-bit PCI configuration register that tells us how many slots there
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* are and which BAR entry corresponds to the first slot.
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*/
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#define SDHC_PCI_CONF_SLOT_INFO 0x40
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#define SDHC_PCI_NUM_SLOTS(info) ((((info) >> 4) & 0x7) + 1)
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#define SDHC_PCI_FIRST_BAR(info) ((info) & 0x7)
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struct sdhc_cardbus_softc {
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struct sdhc_softc sc;
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cardbus_chipset_tag_t sc_cc;
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cardbus_function_tag_t sc_cf;
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cardbus_devfunc_t sc_ct;
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pcitag_t sc_tag;
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bus_space_tag_t sc_iot; /* CardBus I/O space tag */
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bus_space_tag_t sc_memt; /* CardBus MEM space tag */
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rbus_tag_t sc_rbus_iot; /* CardBus i/o rbus tag */
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rbus_tag_t sc_rbus_memt; /* CardBus mem rbus tag */
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void *sc_ih;
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};
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static int sdhc_cardbus_match(device_t, cfdata_t, void *);
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static void sdhc_cardbus_attach(device_t, device_t, void *);
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static int sdhc_cardbus_detach(device_t, int);
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CFATTACH_DECL_NEW(sdhc_cardbus, sizeof(struct sdhc_cardbus_softc),
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sdhc_cardbus_match, sdhc_cardbus_attach, sdhc_cardbus_detach, NULL);
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#ifdef SDHC_DEBUG
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#define DPRINTF(s) printf s
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#else
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#define DPRINTF(s) /**/
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#endif
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static int
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sdhc_cardbus_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct cardbus_attach_args *ca = aux;
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if (PCI_CLASS(ca->ca_class) == PCI_CLASS_SYSTEM &&
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PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_SYSTEM_SDHC)
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return 3;
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return 0;
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}
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static void
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sdhc_cardbus_attach(device_t parent, device_t self, void *aux)
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{
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struct sdhc_cardbus_softc *sc = device_private(self);
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struct cardbus_attach_args *ca = aux;
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cardbus_devfunc_t ct = ca->ca_ct;
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cardbus_chipset_tag_t cc = ct->ct_cc;
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cardbus_function_tag_t cf = ct->ct_cf;
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pcireg_t csr;
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pcireg_t slotinfo;
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char devinfo[256];
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int nslots;
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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bus_size_t size;
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sc->sc.sc_dev = self;
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sc->sc.sc_dmat = ca->ca_dmat;
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sc->sc.sc_host = NULL;
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sc->sc_cc = cc;
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sc->sc_cf = cf;
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sc->sc_ct = ct;
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sc->sc_tag = ca->ca_tag;
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sc->sc_iot = ca->ca_iot;
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sc->sc_memt = ca->ca_memt;
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sc->sc_rbus_iot = ca->ca_rbus_iot;
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sc->sc_rbus_memt = ca->ca_rbus_memt;
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pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo));
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aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
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PCI_REVISION(ca->ca_class));
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aprint_naive("\n");
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/*
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* Map and attach all hosts supported by the host controller.
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*/
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slotinfo = Cardbus_conf_read(ct, ca->ca_tag, SDHC_PCI_CONF_SLOT_INFO);
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nslots = SDHC_PCI_NUM_SLOTS(slotinfo);
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KASSERT(nslots == 1);
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/* Allocate an array big enough to hold all the possible hosts */
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sc->sc.sc_host = malloc(sizeof(struct sdhc_host *) * nslots,
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M_DEVBUF, M_NOWAIT | M_ZERO);
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if (sc->sc.sc_host == NULL) {
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aprint_error_dev(self, "couldn't alloc memory\n");
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goto err;
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}
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/* Enable the device. */
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csr = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG);
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Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG,
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csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE);
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/* Establish the interrupt. */
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sc->sc_ih = Cardbus_intr_establish(ct, ca->ca_intrline, IPL_SDMMC,
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sdhc_intr, &sc->sc);
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if (sc->sc_ih == NULL) {
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aprint_error_dev(self, "couldn't establish interrupt\n");
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goto err;
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}
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/* Enable use of DMA if supported by the interface. */
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if ((PCI_INTERFACE(ca->ca_class) == SDHC_PCI_INTERFACE_DMA))
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SET(sc->sc.sc_flags, SDHC_FLAG_USE_DMA);
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if (Cardbus_mapreg_map(ct, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM, 0,
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&iot, &ioh, NULL, &size)) {
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aprint_error_dev(self, "couldn't map register\n");
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goto err;
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}
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if (sdhc_host_found(&sc->sc, iot, ioh, size) != 0) {
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aprint_error_dev(self, "couldn't initialize host\n");
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goto err;
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}
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if (!pmf_device_register1(self, sdhc_suspend, sdhc_resume,
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sdhc_shutdown)) {
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aprint_error_dev(self, "couldn't establish powerhook\n");
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}
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return;
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err:
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if (sc->sc_ih != NULL)
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Cardbus_intr_disestablish(ct, sc->sc_ih);
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if (sc->sc.sc_host != NULL)
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free(sc->sc.sc_host, M_DEVBUF);
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}
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static int
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sdhc_cardbus_detach(device_t self, int flags)
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{
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struct sdhc_cardbus_softc *sc = device_private(self);
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struct cardbus_devfunc *ct = sc->sc_ct;
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int rv;
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rv = sdhc_detach((device_t)sc->sc.sc_host[0], flags);
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if (rv)
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return rv;
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if (sc->sc_ih != NULL) {
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Cardbus_intr_disestablish(ct, sc->sc_ih);
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sc->sc_ih = NULL;
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}
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if (sc->sc.sc_host != NULL) {
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free(sc->sc.sc_host, M_DEVBUF);
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sc->sc.sc_host = NULL;
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}
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return 0;
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}
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