Added sdhc at cardbus support.
This commit is contained in:
nonaka
parent
6f6b6bc6df
commit
821373d09b
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@ -1,4 +1,4 @@
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.\" $NetBSD: sdhc.4,v 1.2 2009/08/02 00:19:29 nonaka Exp $
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.\" $NetBSD: sdhc.4,v 1.3 2010/03/27 03:04:52 nonaka Exp $
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.\" $OpenBSD: sdhc.4,v 1.4 2009/02/14 18:47:45 deraadt Exp $
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.\"
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.\" Theo de Raadt, 2006. Public Domain.
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@ -11,6 +11,7 @@
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.Nd SD Host Controller
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.Sh SYNOPSIS
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.Cd "sdhc* at pci?"
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.Cd "sdhc* at cardbus? function ?"
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.Cd "sdmmc* at sdhc?"
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.Sh DESCRIPTION
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The
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@ -1,4 +1,4 @@
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# $NetBSD: ALL,v 1.250 2010/03/19 04:04:27 cnst Exp $
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# $NetBSD: ALL,v 1.251 2010/03/27 03:04:51 nonaka Exp $
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# From NetBSD: GENERIC,v 1.787 2006/10/01 18:37:54 bouyer Exp
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#
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# ALL machine description file
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@ -17,7 +17,7 @@ include "arch/i386/conf/std.i386"
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options INCLUDE_CONFIG_FILE # embed config file in kernel binary
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#ident "ALL-$Revision: 1.250 $"
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#ident "ALL-$Revision: 1.251 $"
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maxusers 64 # estimated number of users
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@ -1333,10 +1333,13 @@ sbp* at ieee1394if? euihi ? euilo ? # SCSI over IEEE1394
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# SD/MMC/SDIO Controller and Device support
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# SD/MMC controller
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sdhc* at pci? # SD Host Controller
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sdmmc* at sdhc? # SD/MMC bus
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# PCI SD/MMC controller
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sdhc* at pci? # SD Host Controller
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# CardBus SD/MMC controller
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sdhc* at cardbus? function ? # SD Host Controller
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sdmmc* at sdhc? # SD/MMC bus
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ld* at sdmmc?
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@ -1,4 +1,4 @@
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# $NetBSD: GENERIC,v 1.974 2010/03/08 22:51:52 hubertf Exp $
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# $NetBSD: GENERIC,v 1.975 2010/03/27 03:04:51 nonaka Exp $
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#
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# GENERIC machine description file
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#
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@ -22,7 +22,7 @@ include "arch/i386/conf/std.i386"
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options INCLUDE_CONFIG_FILE # embed config file in kernel binary
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#ident "GENERIC-$Revision: 1.974 $"
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#ident "GENERIC-$Revision: 1.975 $"
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maxusers 64 # estimated number of users
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@ -1276,10 +1276,13 @@ sbp* at ieee1394if? euihi ? euilo ? # SCSI over IEEE1394
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# SD/MMC/SDIO Controller and Device support
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# SD/MMC controller
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# PCI SD/MMC controller
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sdhc* at pci? # SD Host Controller
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sdmmc* at sdhc? # SD/MMC bus
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# CardBus SD/MMC controller
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sdhc* at cardbus? function ? # SD Host Controller
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sdmmc* at sdhc? # SD/MMC bus
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ld* at sdmmc?
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@ -1,4 +1,4 @@
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# $NetBSD: files.cardbus,v 1.35 2009/07/19 06:28:08 kiyohara Exp $
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# $NetBSD: files.cardbus,v 1.36 2010/03/27 03:04:51 nonaka Exp $
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#
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# files.cardbus
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#
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@ -137,3 +137,9 @@ file dev/cardbus/njata_cardbus.c njata_cardbus
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#
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attach siisata at cardbus with siisata_cardbus
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file dev/cardbus/siisata_cardbus.c siisata_cardbus
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#
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# SD Host Controller
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#
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attach sdhc at cardbus with sdhc_cardbus
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file dev/cardbus/sdhc_cardbus.c sdhc_cardbus
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@ -0,0 +1,207 @@
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/* $NetBSD: sdhc_cardbus.c,v 1.1 2010/03/27 03:04:51 nonaka Exp $ */
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/*
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* Copyright (c) 2010 NONAKA Kimihiro <nonaka@netbsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: sdhc_cardbus.c,v 1.1 2010/03/27 03:04:51 nonaka Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/pmf.h>
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#include <dev/cardbus/cardbusvar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/sdmmc/sdhcreg.h>
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#include <dev/sdmmc/sdhcvar.h>
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#include <dev/sdmmc/sdmmcvar.h>
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/* PCI interface classes */
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#define SDHC_PCI_INTERFACE_NO_DMA 0x00
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#define SDHC_PCI_INTERFACE_DMA 0x01
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#define SDHC_PCI_INTERFACE_VENDOR 0x02
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/*
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* 8-bit PCI configuration register that tells us how many slots there
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* are and which BAR entry corresponds to the first slot.
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*/
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#define SDHC_PCI_CONF_SLOT_INFO 0x40
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#define SDHC_PCI_NUM_SLOTS(info) ((((info) >> 4) & 0x7) + 1)
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#define SDHC_PCI_FIRST_BAR(info) ((info) & 0x7)
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struct sdhc_cardbus_softc {
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struct sdhc_softc sc;
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cardbus_chipset_tag_t sc_cc;
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cardbus_function_tag_t sc_cf;
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cardbus_devfunc_t sc_ct;
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pcitag_t sc_tag;
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bus_space_tag_t sc_iot; /* CardBus I/O space tag */
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bus_space_tag_t sc_memt; /* CardBus MEM space tag */
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rbus_tag_t sc_rbus_iot; /* CardBus i/o rbus tag */
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rbus_tag_t sc_rbus_memt; /* CardBus mem rbus tag */
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void *sc_ih;
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};
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static int sdhc_cardbus_match(device_t, cfdata_t, void *);
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static void sdhc_cardbus_attach(device_t, device_t, void *);
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static int sdhc_cardbus_detach(device_t, int);
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CFATTACH_DECL_NEW(sdhc_cardbus, sizeof(struct sdhc_cardbus_softc),
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sdhc_cardbus_match, sdhc_cardbus_attach, sdhc_cardbus_detach, NULL);
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#ifdef SDHC_DEBUG
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#define DPRINTF(s) printf s
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#else
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#define DPRINTF(s) /**/
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#endif
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static int
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sdhc_cardbus_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct cardbus_attach_args *ca = aux;
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if (PCI_CLASS(ca->ca_class) == PCI_CLASS_SYSTEM &&
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PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_SYSTEM_SDHC)
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return 3;
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return 0;
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}
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static void
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sdhc_cardbus_attach(device_t parent, device_t self, void *aux)
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{
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struct sdhc_cardbus_softc *sc = device_private(self);
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struct cardbus_attach_args *ca = aux;
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cardbus_devfunc_t ct = ca->ca_ct;
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cardbus_chipset_tag_t cc = ct->ct_cc;
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cardbus_function_tag_t cf = ct->ct_cf;
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pcireg_t csr;
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pcireg_t slotinfo;
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char devinfo[256];
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int nslots;
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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bus_size_t size;
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sc->sc.sc_dev = self;
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sc->sc.sc_dmat = ca->ca_dmat;
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sc->sc.sc_host = NULL;
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sc->sc_cc = cc;
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sc->sc_cf = cf;
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sc->sc_ct = ct;
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sc->sc_tag = ca->ca_tag;
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sc->sc_iot = ca->ca_iot;
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sc->sc_memt = ca->ca_memt;
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sc->sc_rbus_iot = ca->ca_rbus_iot;
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sc->sc_rbus_memt = ca->ca_rbus_memt;
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pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo));
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aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
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PCI_REVISION(ca->ca_class));
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aprint_naive("\n");
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/*
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* Map and attach all hosts supported by the host controller.
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*/
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slotinfo = Cardbus_conf_read(ct, ca->ca_tag, SDHC_PCI_CONF_SLOT_INFO);
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nslots = SDHC_PCI_NUM_SLOTS(slotinfo);
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KASSERT(nslots == 1);
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/* Allocate an array big enough to hold all the possible hosts */
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sc->sc.sc_host = malloc(sizeof(struct sdhc_host *) * nslots,
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M_DEVBUF, M_NOWAIT | M_ZERO);
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if (sc->sc.sc_host == NULL) {
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aprint_error_dev(self, "couldn't alloc memory\n");
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goto err;
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}
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/* Enable the device. */
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csr = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG);
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Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG,
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csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE);
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/* Establish the interrupt. */
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sc->sc_ih = Cardbus_intr_establish(ct, ca->ca_intrline, IPL_SDMMC,
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sdhc_intr, &sc->sc);
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if (sc->sc_ih == NULL) {
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aprint_error_dev(self, "couldn't establish interrupt\n");
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goto err;
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}
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/* Enable use of DMA if supported by the interface. */
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if ((PCI_INTERFACE(ca->ca_class) == SDHC_PCI_INTERFACE_DMA))
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SET(sc->sc.sc_flags, SDHC_FLAG_USE_DMA);
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if (Cardbus_mapreg_map(ct, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM, 0,
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&iot, &ioh, NULL, &size)) {
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aprint_error_dev(self, "couldn't map register\n");
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goto err;
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}
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if (sdhc_host_found(&sc->sc, iot, ioh, size) != 0) {
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aprint_error_dev(self, "couldn't initialize host\n");
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goto err;
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}
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if (!pmf_device_register1(self, sdhc_suspend, sdhc_resume,
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sdhc_shutdown)) {
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aprint_error_dev(self, "couldn't establish powerhook\n");
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}
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return;
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err:
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if (sc->sc_ih != NULL)
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Cardbus_intr_disestablish(ct, sc->sc_ih);
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if (sc->sc.sc_host != NULL)
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free(sc->sc.sc_host, M_DEVBUF);
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}
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static int
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sdhc_cardbus_detach(device_t self, int flags)
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{
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struct sdhc_cardbus_softc *sc = device_private(self);
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struct cardbus_devfunc *ct = sc->sc_ct;
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int rv;
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rv = sdhc_detach((device_t)sc->sc.sc_host[0], flags);
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if (rv)
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return rv;
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if (sc->sc_ih != NULL) {
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Cardbus_intr_disestablish(ct, sc->sc_ih);
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sc->sc_ih = NULL;
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}
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if (sc->sc.sc_host != NULL) {
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free(sc->sc.sc_host, M_DEVBUF);
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sc->sc.sc_host = NULL;
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}
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return 0;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: sdhc.c,v 1.6 2010/02/24 22:38:08 dyoung Exp $ */
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/* $NetBSD: sdhc.c,v 1.7 2010/03/27 03:04:52 nonaka Exp $ */
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/* $OpenBSD: sdhc.c,v 1.25 2009/01/13 19:44:20 grange Exp $ */
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/*
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@ -23,7 +23,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.6 2010/02/24 22:38:08 dyoung Exp $");
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__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.7 2010/03/27 03:04:52 nonaka Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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@ -121,6 +121,7 @@ static int sdhc_wait_state(struct sdhc_host *, uint32_t, uint32_t);
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static int sdhc_soft_reset(struct sdhc_host *, int);
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static int sdhc_wait_intr(struct sdhc_host *, int, int);
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static void sdhc_transfer_data(struct sdhc_host *, struct sdmmc_command *);
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static int sdhc_transfer_data_dma(struct sdhc_host *, struct sdmmc_command *);
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static int sdhc_transfer_data_pio(struct sdhc_host *, struct sdmmc_command *);
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static void sdhc_read_data_pio(struct sdhc_host *, uint8_t *, int);
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static void sdhc_write_data_pio(struct sdhc_host *, uint8_t *, int);
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@ -225,7 +226,7 @@ sdhc_host_found(struct sdhc_softc *sc, bus_space_tag_t iot,
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hp->clkbase = SDHC_BASE_FREQ_KHZ(caps);
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if (hp->clkbase == 0) {
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/* The attachment driver must tell us. */
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aprint_error_dev(sc->sc_dev,"unknown base clock frequency\n");
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aprint_error_dev(sc->sc_dev, "unknown base clock frequency\n");
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goto err;
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} else if (hp->clkbase < 10000 || hp->clkbase > 63000) {
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/* SDHC 1.0 supports only 10-63 MHz. */
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@ -294,7 +295,6 @@ sdhc_host_found(struct sdhc_softc *sc, bus_space_tag_t iot,
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if (ISSET(hp->flags, SHF_USE_DMA))
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saa.saa_caps |= SMC_CAPS_DMA;
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#endif
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hp->sdmmc = config_found(sc->sc_dev, &saa, NULL);
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return 0;
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@ -309,6 +309,25 @@ err1:
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return 1;
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}
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int
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sdhc_detach(device_t dev, int flags)
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{
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struct sdhc_host *hp = (struct sdhc_host *)dev;
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struct sdhc_softc *sc = hp->sc;
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int rv = 0;
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if (hp->sdmmc)
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rv = config_detach(hp->sdmmc, flags);
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cv_destroy(&hp->intr_cv);
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mutex_destroy(&hp->intr_mtx);
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mutex_destroy(&hp->host_mtx);
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free(hp, M_DEVBUF);
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sc->sc_host[--sc->sc_nhosts] = NULL;
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return rv;
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}
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bool
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sdhc_suspend(device_t dev, const pmf_qual_t *qual)
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{
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@ -759,10 +778,9 @@ sdhc_start_command(struct sdhc_host *hp, struct sdmmc_command *cmd)
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uint16_t command;
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int error;
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DPRINTF(1,("%s: start cmd %d arg=%08x data=%p dlen=%d flags=%08x "
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"proc=%p \"%s\"\n", HDEVNAME(hp), cmd->c_opcode, cmd->c_arg,
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cmd->c_data, cmd->c_datalen, cmd->c_flags, curproc,
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curproc ? curproc->p_comm : ""));
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DPRINTF(1,("%s: start cmd %d arg=%08x data=%p dlen=%d flags=%08x\n",
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HDEVNAME(hp), cmd->c_opcode, cmd->c_arg, cmd->c_data,
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cmd->c_datalen, cmd->c_flags));
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/*
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* The maximum block length for commands should be the minimum
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@ -799,10 +817,13 @@ sdhc_start_command(struct sdhc_host *hp, struct sdmmc_command *cmd)
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mode |= SDHC_AUTO_CMD12_ENABLE;
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}
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}
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#if notyet
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if (cmd->c_dmap != NULL && cmd->c_datalen > 0)
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mode |= SDHC_DMA_ENABLE;
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#endif
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if (cmd->c_dmamap != NULL && cmd->c_datalen > 0) {
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if (cmd->c_dmamap->dm_nsegs == 1) {
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mode |= SDHC_DMA_ENABLE;
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} else {
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cmd->c_dmamap = NULL;
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}
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}
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/*
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* Prepare command register value. (2.2.6)
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@ -839,6 +860,10 @@ sdhc_start_command(struct sdhc_host *hp, struct sdmmc_command *cmd)
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/* Alert the user not to remove the card. */
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HSET1(hp, SDHC_HOST_CTL, SDHC_LED_ON);
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/* Set DMA start address. */
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if (ISSET(mode, SDHC_DMA_ENABLE))
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HWRITE4(hp, SDHC_DMA_ADDR, cmd->c_dmamap->dm_segs[0].ds_addr);
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|
||||
/*
|
||||
* Start a CPU data transfer. Writing to the high order byte
|
||||
* of the SDHC_COMMAND register triggers the SD command. (1.5)
|
||||
|
|
@ -873,7 +898,10 @@ sdhc_transfer_data(struct sdhc_host *hp, struct sdmmc_command *cmd)
|
|||
}
|
||||
#endif
|
||||
|
||||
error = sdhc_transfer_data_pio(hp, cmd);
|
||||
if (cmd->c_dmamap != NULL)
|
||||
error = sdhc_transfer_data_dma(hp, cmd);
|
||||
else
|
||||
error = sdhc_transfer_data_pio(hp, cmd);
|
||||
if (error)
|
||||
cmd->c_error = error;
|
||||
SET(cmd->c_flags, SCF_ITSDONE);
|
||||
|
|
@ -882,6 +910,45 @@ sdhc_transfer_data(struct sdhc_host *hp, struct sdmmc_command *cmd)
|
|||
HDEVNAME(hp), cmd->c_error));
|
||||
}
|
||||
|
||||
static int
|
||||
sdhc_transfer_data_dma(struct sdhc_host *hp, struct sdmmc_command *cmd)
|
||||
{
|
||||
bus_dmamap_t dmap = cmd->c_dmamap;
|
||||
uint16_t blklen = cmd->c_blklen;
|
||||
uint16_t blkcnt = cmd->c_datalen / blklen;
|
||||
uint16_t remain;
|
||||
int error = 0;
|
||||
|
||||
for (;;) {
|
||||
if (!sdhc_wait_intr(hp,
|
||||
SDHC_DMA_INTERRUPT|SDHC_TRANSFER_COMPLETE,
|
||||
SDHC_DMA_TIMEOUT)) {
|
||||
error = ETIMEDOUT;
|
||||
break;
|
||||
}
|
||||
|
||||
/* single block mode */
|
||||
if (blkcnt == 1)
|
||||
break;
|
||||
|
||||
/* multi block mode */
|
||||
remain = HREAD2(hp, SDHC_BLOCK_COUNT);
|
||||
if (remain == 0)
|
||||
break;
|
||||
|
||||
HWRITE4(hp, SDHC_DMA_ADDR,
|
||||
dmap->dm_segs[0].ds_addr + (blkcnt - remain) * blklen);
|
||||
}
|
||||
|
||||
#if 0
|
||||
if (error == 0 && !sdhc_wait_intr(hp, SDHC_TRANSFER_COMPLETE,
|
||||
SDHC_TRANSFER_TIMEOUT))
|
||||
error = ETIMEDOUT;
|
||||
#endif
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
static int
|
||||
sdhc_transfer_data_pio(struct sdhc_host *hp, struct sdmmc_command *cmd)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: sdhcvar.h,v 1.3 2010/02/24 22:38:08 dyoung Exp $ */
|
||||
/* $NetBSD: sdhcvar.h,v 1.4 2010/03/27 03:04:52 nonaka Exp $ */
|
||||
/* $OpenBSD: sdhcvar.h,v 1.3 2007/09/06 08:01:01 jsg Exp $ */
|
||||
|
||||
/*
|
||||
|
|
@ -44,8 +44,9 @@ struct sdhc_softc {
|
|||
int sdhc_host_found(struct sdhc_softc *, bus_space_tag_t,
|
||||
bus_space_handle_t, bus_size_t);
|
||||
int sdhc_intr(void *);
|
||||
bool sdhc_suspend(device_t dev, const pmf_qual_t *qual);
|
||||
bool sdhc_resume(device_t dev, const pmf_qual_t *qual);
|
||||
bool sdhc_shutdown(device_t dev, int flags);
|
||||
int sdhc_detach(device_t, int);
|
||||
bool sdhc_suspend(device_t, const pmf_qual_t *);
|
||||
bool sdhc_resume(device_t, const pmf_qual_t *);
|
||||
bool sdhc_shutdown(device_t, int);
|
||||
|
||||
#endif /* _SDHCVAR_H_ */
|
||||
|
|
|
|||
Loading…
Reference in New Issue