NetBSD/sys/arch/i386/pci/pci_machdep.c

577 lines
14 KiB
C
Raw Normal View History

/* $NetBSD: pci_machdep.c,v 1.33 1998/08/15 03:02:40 mycroft Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
1994-10-27 07:14:23 +03:00
1994-08-09 04:47:46 +04:00
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
* Copyright (c) 1994 Charles M. Hannum. All rights reserved.
1994-08-09 04:47:46 +04:00
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Charles M. Hannum.
1994-08-09 04:47:46 +04:00
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Machine-specific functions for PCI autoconfiguration.
*
* On PCs, there are two methods of generating PCI configuration cycles.
* We try to detect the appropriate mechanism for this machine and set
* up a few function pointers to access the correct method directly.
*
* The configuration method can be hard-coded in the config file by
* using `options PCI_CONF_MODE=N', where `N' is the configuration mode
* as defined section 3.6.4.1, `Generating Configuration Cycles'.
*/
#include <sys/types.h>
#include <sys/param.h>
#include <sys/time.h>
#include <sys/systm.h>
#include <sys/errno.h>
#include <sys/device.h>
#include <vm/vm.h>
#include <vm/vm_kern.h>
#define _I386_BUS_DMA_PRIVATE
#include <machine/bus.h>
1994-08-09 04:47:46 +04:00
#include <machine/pio.h>
#include <i386/isa/icu.h>
#include <dev/isa/isavar.h>
1995-01-27 08:46:39 +03:00
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcidevs.h>
1994-08-09 04:47:46 +04:00
int pci_mode = -1;
#define PCI_MODE1_ENABLE 0x80000000UL
#define PCI_MODE1_ADDRESS_REG 0x0cf8
#define PCI_MODE1_DATA_REG 0x0cfc
#define PCI_MODE2_ENABLE_REG 0x0cf8
#define PCI_MODE2_FORWARD_REG 0x0cfa
#define _m1tag(b, d, f) \
(PCI_MODE1_ENABLE | ((b) << 16) | ((d) << 11) | ((f) << 8))
#define _id(v, p) \
(((v) << PCI_VENDOR_SHIFT) | ((p) << PCI_PRODUCT_SHIFT))
#define _qe(bus, dev, fcn, vend, prod) \
{_m1tag(bus, dev, fcn), _id(vend, prod)}
struct {
u_int32_t tag;
pcireg_t id;
} pcim1_quirk_tbl[] = {
_qe(0, 0, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX1),
/* XXX Triflex2 not tested */
_qe(0, 0, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX2),
_qe(0, 0, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX4),
/* Triton needed for Connectix Virtual PC */
_qe(0, 0, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82437FX),
{0, 0xffffffff} /* patchable */
};
#undef _m1tag
#undef _id
#undef _qe
/*
* PCI doesn't have any special needs; just use the generic versions
* of these functions.
*/
struct i386_bus_dma_tag pci_bus_dma_tag = {
0, /* _bounce_thresh */
_bus_dmamap_create,
_bus_dmamap_destroy,
_bus_dmamap_load,
_bus_dmamap_load_mbuf,
_bus_dmamap_load_uio,
_bus_dmamap_load_raw,
_bus_dmamap_unload,
NULL, /* _dmamap_sync */
_bus_dmamem_alloc,
_bus_dmamem_free,
_bus_dmamem_map,
_bus_dmamem_unmap,
_bus_dmamem_mmap,
};
void
pci_attach_hook(parent, self, pba)
struct device *parent, *self;
struct pcibus_attach_args *pba;
{
if (pba->pba_bus == 0)
1996-10-13 07:19:38 +04:00
printf(": configuration mode %d", pci_mode);
}
int
pci_bus_maxdevs(pc, busno)
pci_chipset_tag_t pc;
int busno;
{
/*
* Bus number is irrelevant. If Configuration Mechanism 2 is in
* use, can only have devices 0-15 on any bus. If Configuration
* Mechanism 1 is in use, can have devices 0-32 (i.e. the `normal'
* range).
*/
if (pci_mode == 2)
return (16);
else
return (32);
}
1994-08-09 04:47:46 +04:00
pcitag_t
pci_make_tag(pc, bus, device, function)
pci_chipset_tag_t pc;
1994-08-09 04:47:46 +04:00
int bus, device, function;
{
pcitag_t tag;
#ifndef PCI_CONF_MODE
switch (pci_mode) {
case 1:
goto mode1;
case 2:
goto mode2;
default:
panic("pci_make_tag: mode not configured");
}
#endif
#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1)
#ifndef PCI_CONF_MODE
1994-08-09 04:47:46 +04:00
mode1:
#endif
1994-08-09 04:47:46 +04:00
if (bus >= 256 || device >= 32 || function >= 8)
panic("pci_make_tag: bad request");
tag.mode1 = PCI_MODE1_ENABLE |
(bus << 16) | (device << 11) | (function << 8);
return tag;
#endif
#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2)
#ifndef PCI_CONF_MODE
1994-08-09 04:47:46 +04:00
mode2:
#endif
1994-08-09 04:47:46 +04:00
if (bus >= 256 || device >= 16 || function >= 8)
panic("pci_make_tag: bad request");
tag.mode2.port = 0xc000 | (device << 8);
tag.mode2.enable = 0xf0 | (function << 1);
1994-08-09 04:47:46 +04:00
tag.mode2.forward = bus;
return tag;
#endif
}
1996-12-17 04:55:56 +03:00
void
pci_decompose_tag(pc, tag, bp, dp, fp)
pci_chipset_tag_t pc;
pcitag_t tag;
int *bp, *dp, *fp;
{
#ifndef PCI_CONF_MODE
switch (pci_mode) {
case 1:
goto mode1;
case 2:
goto mode2;
default:
panic("pci_decompose_tag: mode not configured");
}
#endif
#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1)
#ifndef PCI_CONF_MODE
mode1:
#endif
if (bp != NULL)
*bp = (tag.mode1 >> 16) & 0xff;
if (dp != NULL)
*dp = (tag.mode1 >> 11) & 0x1f;
if (fp != NULL)
*fp = (tag.mode1 >> 8) & 0x7;
return;
#endif
#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2)
#ifndef PCI_CONF_MODE
mode2:
#endif
if (bp != NULL)
*bp = tag.mode2.forward & 0xff;
if (dp != NULL)
*dp = (tag.mode2.port >> 8) & 0xf;
if (fp != NULL)
*fp = (tag.mode2.enable >> 1) & 0x7;
#endif
}
1994-08-09 04:47:46 +04:00
pcireg_t
pci_conf_read(pc, tag, reg)
pci_chipset_tag_t pc;
1994-08-09 04:47:46 +04:00
pcitag_t tag;
int reg;
{
pcireg_t data;
#ifndef PCI_CONF_MODE
switch (pci_mode) {
case 1:
goto mode1;
case 2:
goto mode2;
default:
panic("pci_conf_read: mode not configured");
}
#endif
#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1)
#ifndef PCI_CONF_MODE
1994-08-09 04:47:46 +04:00
mode1:
#endif
1994-08-09 04:47:46 +04:00
outl(PCI_MODE1_ADDRESS_REG, tag.mode1 | reg);
data = inl(PCI_MODE1_DATA_REG);
outl(PCI_MODE1_ADDRESS_REG, 0);
return data;
#endif
#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2)
#ifndef PCI_CONF_MODE
1994-08-09 04:47:46 +04:00
mode2:
#endif
1994-08-09 04:47:46 +04:00
outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable);
outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward);
data = inl(tag.mode2.port | reg);
outb(PCI_MODE2_ENABLE_REG, 0);
return data;
#endif
}
void
pci_conf_write(pc, tag, reg, data)
pci_chipset_tag_t pc;
1994-08-09 04:47:46 +04:00
pcitag_t tag;
int reg;
pcireg_t data;
{
#ifndef PCI_CONF_MODE
switch (pci_mode) {
case 1:
goto mode1;
case 2:
goto mode2;
default:
panic("pci_conf_write: mode not configured");
}
#endif
#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1)
#ifndef PCI_CONF_MODE
1994-08-09 04:47:46 +04:00
mode1:
#endif
1994-08-09 04:47:46 +04:00
outl(PCI_MODE1_ADDRESS_REG, tag.mode1 | reg);
outl(PCI_MODE1_DATA_REG, data);
outl(PCI_MODE1_ADDRESS_REG, 0);
return;
1994-08-09 04:47:46 +04:00
#endif
#if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2)
#ifndef PCI_CONF_MODE
1994-08-09 04:47:46 +04:00
mode2:
#endif
1994-08-09 04:47:46 +04:00
outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable);
outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward);
outl(tag.mode2.port | reg, data);
outb(PCI_MODE2_ENABLE_REG, 0);
#endif
}
int
pci_mode_detect()
{
#ifdef PCI_CONF_MODE
#if (PCI_CONF_MODE == 1) || (PCI_CONF_MODE == 2)
return (pci_mode = PCI_CONF_MODE);
#else
#error Invalid PCI configuration mode.
#endif
#else
u_int32_t sav, val;
int i;
pcireg_t idreg;
1994-08-09 04:47:46 +04:00
if (pci_mode != -1)
return pci_mode;
/*
* We try to divine which configuration mode the host bridge wants.
*/
sav = inl(PCI_MODE1_ADDRESS_REG);
pci_mode = 1; /* assume this for now */
/*
* catch some known buggy implementations of mode 1
1994-08-09 04:47:46 +04:00
*/
for (i = 0; i < sizeof(pcim1_quirk_tbl) / sizeof(pcim1_quirk_tbl[0]);
i++) {
pcitag_t t;
if (!pcim1_quirk_tbl[i].tag)
break;
t.mode1 = pcim1_quirk_tbl[i].tag;
idreg = pci_conf_read(0, t, PCI_ID_REG); /* needs "pci_mode" */
if (idreg == pcim1_quirk_tbl[i].id) {
#ifdef DEBUG
printf("known mode 1 PCI chipset (%08x)\n",
idreg);
#endif
return (pci_mode);
}
}
/*
* Strong check for standard compliant mode 1:
* 1. bit 31 ("enable") can be set
* 2. byte/word access does not affect register
*/
outl(PCI_MODE1_ADDRESS_REG, PCI_MODE1_ENABLE);
outb(PCI_MODE1_ADDRESS_REG + 3, 0);
outw(PCI_MODE1_ADDRESS_REG + 2, 0);
val = inl(PCI_MODE1_ADDRESS_REG);
if ((val & 0x80fffffc) != PCI_MODE1_ENABLE) {
#ifdef DEBUG
printf("pci_mode_detect: mode 1 enable failed (%x)\n",
val);
#endif
goto not1;
}
outl(PCI_MODE1_ADDRESS_REG, 0);
val = inl(PCI_MODE1_ADDRESS_REG);
if ((val & 0x80fffffc) != 0)
goto not1;
return (pci_mode);
not1:
outl(PCI_MODE1_ADDRESS_REG, sav);
1994-08-09 04:47:46 +04:00
/*
* This mode 2 check is quite weak (and known to give false
* positives on some Compaq machines).
* However, this doesn't matter, because this is the
* last test, and simply no PCI devices will be found if
* this happens.
*/
1994-08-09 04:47:46 +04:00
outb(PCI_MODE2_ENABLE_REG, 0);
outb(PCI_MODE2_FORWARD_REG, 0);
if (inb(PCI_MODE2_ENABLE_REG) != 0 ||
inb(PCI_MODE2_FORWARD_REG) != 0)
goto not2;
return (pci_mode = 2);
not2:
return (pci_mode = 0);
#endif
}
int
pci_intr_map(pc, intrtag, pin, line, ihp)
pci_chipset_tag_t pc;
pcitag_t intrtag;
1994-08-09 04:47:46 +04:00
int pin, line;
pci_intr_handle_t *ihp;
{
1994-08-09 04:47:46 +04:00
if (pin == 0) {
/* No IRQ used. */
goto bad;
1994-08-09 04:47:46 +04:00
}
if (pin > 4) {
1996-10-13 07:19:38 +04:00
printf("pci_intr_map: bad interrupt pin %d\n", pin);
goto bad;
1994-08-09 04:47:46 +04:00
}
/*
* Section 6.2.4, `Miscellaneous Functions', says that 255 means
* `unknown' or `no connection' on a PC. We assume that a device with
* `no connection' either doesn't have an interrupt (in which case the
* pin number should be 0, and would have been noticed above), or
* wasn't configured by the BIOS (in which case we punt, since there's
* no real way we can know how the interrupt lines are mapped in the
* hardware).
1994-08-09 04:47:46 +04:00
*
* XXX
* Since IRQ 0 is only used by the clock, and we can't actually be sure
* that the BIOS did its job, we also recognize that as meaning that
* the BIOS has not configured the device.
1994-08-09 04:47:46 +04:00
*/
if (line == 0 || line == 255) {
1996-10-13 07:19:38 +04:00
printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
goto bad;
1994-08-09 04:47:46 +04:00
} else {
if (line >= ICU_LEN) {
1996-10-13 07:19:38 +04:00
printf("pci_intr_map: bad interrupt line %d\n", line);
goto bad;
1994-08-09 04:47:46 +04:00
}
if (line == 2) {
1996-10-13 07:19:38 +04:00
printf("pci_intr_map: changed line 2 to line 9\n");
1994-08-09 04:47:46 +04:00
line = 9;
}
}
*ihp = line;
return 0;
bad:
*ihp = -1;
return 1;
}
const char *
pci_intr_string(pc, ih)
pci_chipset_tag_t pc;
pci_intr_handle_t ih;
{
static char irqstr[8]; /* 4 + 2 + NULL + sanity */
if (ih == 0 || ih >= ICU_LEN || ih == 2)
panic("pci_intr_string: bogus handle 0x%x\n", ih);
1996-10-13 07:19:38 +04:00
sprintf(irqstr, "irq %d", ih);
return (irqstr);
}
void *
pci_intr_establish(pc, ih, level, func, arg)
pci_chipset_tag_t pc;
pci_intr_handle_t ih;
int level, (*func) __P((void *));
void *arg;
{
if (ih == 0 || ih >= ICU_LEN || ih == 2)
panic("pci_intr_establish: bogus handle 0x%x\n", ih);
return isa_intr_establish(NULL, ih, IST_LEVEL, level, func, arg);
}
void
pci_intr_disestablish(pc, cookie)
pci_chipset_tag_t pc;
void *cookie;
{
1994-08-09 04:47:46 +04:00
return isa_intr_disestablish(NULL, cookie);
1994-08-09 04:47:46 +04:00
}
/*
* Determine which flags should be passed to the primary PCI bus's
* autoconfiguration node. We use this to detect broken chipsets
* which cannot safely use memory-mapped device access.
*/
int
pci_bus_flags()
{
int rval = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
int device, maxndevs;
pcitag_t tag;
pcireg_t id;
maxndevs = pci_bus_maxdevs(NULL, 0);
for (device = 0; device < maxndevs; device++) {
tag = pci_make_tag(NULL, 0, device, 0);
id = pci_conf_read(NULL, tag, PCI_ID_REG);
/* Invalid vendor ID value? */
if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
continue;
/* XXX Not invalid, but we've done this ~forever. */
if (PCI_VENDOR(id) == 0)
continue;
switch (PCI_VENDOR(id)) {
case PCI_VENDOR_SIS:
switch (PCI_PRODUCT(id)) {
case PCI_PRODUCT_SIS_85C496:
goto disable_mem;
break;
}
break;
}
}
return (rval);
disable_mem:
printf("Warning: broken PCI-Host bridge detected; "
"disabling memory-mapped access\n");
rval &= ~PCI_FLAGS_MEM_ENABLED;
return (rval);
}