mirror of https://github.com/wolfSSL/wolfssl
Maths x86 asm: change asm snippets to get compiling
TFM: Use register or memory for c0, c1, c2 in SQRADD and SQRADD2. SP: Use register or memory for vl, vh, vo in SP_ASM_MUL_ADD, SP_ASM_MUL_ADD2 and SP_ASM_SQR_ADD.
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@ -698,33 +698,39 @@ __asm__( \
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#define SQRADD(i, j) \
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__asm__( \
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"movl %6,%%eax \n\t" \
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"movl %3,%%eax \n\t" \
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"mull %%eax \n\t" \
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"addl %%eax,%0 \n\t" \
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"adcl %%edx,%1 \n\t" \
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"adcl $0,%2 \n\t" \
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:"=r"(c0), "=r"(c1), "=r"(c2): "0"(c0), "1"(c1), "2"(c2), "m"(i) :"%eax","%edx","cc");
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:"+rm"(c0), "+rm"(c1), "+rm"(c2) \
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: "m"(i) \
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:"%eax","%edx","cc");
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#define SQRADD2(i, j) \
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__asm__( \
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"movl %6,%%eax \n\t" \
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"mull %7 \n\t" \
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"movl %3,%%eax \n\t" \
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"mull %4 \n\t" \
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"addl %%eax,%0 \n\t" \
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"adcl %%edx,%1 \n\t" \
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"adcl $0,%2 \n\t" \
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"addl %%eax,%0 \n\t" \
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"adcl %%edx,%1 \n\t" \
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"adcl $0,%2 \n\t" \
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:"=r"(c0), "=r"(c1), "=r"(c2): "0"(c0), "1"(c1), "2"(c2), "m"(i), "m"(j) :"%eax","%edx", "cc");
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:"+rm"(c0), "+rm"(c1), "+rm"(c2) \
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: "m"(i), "m"(j) \
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:"%eax","%edx", "cc");
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#define SQRADDSC(i, j) \
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__asm__( \
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__asm__( \
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"movl %3,%%eax \n\t" \
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"mull %4 \n\t" \
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"movl %%eax,%0 \n\t" \
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"movl %%edx,%1 \n\t" \
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"xorl %2,%2 \n\t" \
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:"=r"(sc0), "=r"(sc1), "=r"(sc2): "g"(i), "g"(j) :"%eax","%edx","cc");
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:"=r"(sc0), "=r"(sc1), "=r"(sc2) \
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: "g"(i), "g"(j) \
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:"%eax","%edx","cc");
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#define SQRADDAC(i, j) \
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__asm__( \
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@ -733,7 +739,9 @@ __asm__( \
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"addl %%eax,%0 \n\t" \
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"adcl %%edx,%1 \n\t" \
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"adcl $0,%2 \n\t" \
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:"=r"(sc0), "=r"(sc1), "=r"(sc2): "0"(sc0), "1"(sc1), "2"(sc2), "g"(i), "g"(j) :"%eax","%edx","cc");
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:"=r"(sc0), "=r"(sc1), "=r"(sc2) \
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: "0"(sc0), "1"(sc1), "2"(sc2), "g"(i), "g"(j) \
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:"%eax","%edx","cc");
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#define SQRADDDB \
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__asm__( \
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@ -743,7 +751,10 @@ __asm__( \
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"addl %6,%0 \n\t" \
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"adcl %7,%1 \n\t" \
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"adcl %8,%2 \n\t" \
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:"=r"(c0), "=r"(c1), "=r"(c2) : "0"(c0), "1"(c1), "2"(c2), "r"(sc0), "r"(sc1), "r"(sc2) : "cc");
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:"=r"(c0), "=r"(c1), "=r"(c2) \
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: "0"(c0), "1"(c1), "2"(c2), "r"(sc0), "r"(sc1), \
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"r"(sc2) \
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: "cc");
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#elif defined(TFM_X86_64)
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/* x86-64 optimized */
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@ -477,7 +477,7 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
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"addl %%eax, %[l] \n\t" \
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"adcl %%edx, %[h] \n\t" \
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"adcl $0 , %[o] \n\t" \
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: [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo) \
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: [l] "+rm" (vl), [h] "+rm" (vh), [o] "+rm" (vo) \
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: [a] "r" (va), [b] "r" (vb) \
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: "eax", "edx", "cc" \
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)
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@ -503,7 +503,7 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
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"addl %%eax, %[l] \n\t" \
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"adcl %%edx, %[h] \n\t" \
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"adcl $0 , %[o] \n\t" \
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: [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo) \
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: [l] "+rm" (vl), [h] "+rm" (vh), [o] "+rm" (vo) \
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: [a] "r" (va), [b] "r" (vb) \
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: "eax", "edx", "cc" \
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)
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@ -542,7 +542,7 @@ static WC_INLINE sp_int_digit sp_div_word(sp_int_digit hi, sp_int_digit lo,
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"addl %%eax, %[l] \n\t" \
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"adcl %%edx, %[h] \n\t" \
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"adcl $0 , %[o] \n\t" \
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: [l] "+r" (vl), [h] "+r" (vh), [o] "+r" (vo) \
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: [l] "+rm" (vl), [h] "+rm" (vh), [o] "+rm" (vo) \
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: [a] "m" (va) \
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: "eax", "edx", "cc" \
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)
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