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make up #2 for MDK-ARM

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takashikojo 2013-05-19 10:47:35 +09:00
parent b430a14032
commit d3ceb89fb0
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387
IDE/MDK-ARM/MDK-ARM/config/File_Config.c Normal file
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/*----------------------------------------------------------------------------
* RL-ARM - FlashFS
*----------------------------------------------------------------------------
* Name: FILE_CONFIG.C
* Purpose: Configuration of RL FlashFS by user
* Rev.: V4.50
*----------------------------------------------------------------------------
* This code is part of the RealView Run-Time Library.
* Copyright (c) 2004-2012 KEIL - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#include <File_Config.h>
//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
//
// <h>File System
// ==============
// <i> Define File System global parameters
// <o>Number of open files <4-16>
// <i>Define number of files that can be
// <i>opened at the same time.
// <i>Default: 8
#define N_FILES 6
// <o>CPU Clock Frequency [Hz]<0-1000000000>
// <i>Define the CPU Clock frequency used for
// <i>flash programming and erasing.
#define CPU_CLK 120000000
// </h>
// <e>Flash Drive
// ==============
// <i>Enable Embedded Flash Drive [F:]
#define FL0_EN 0
// <o>Base address <0x0-0xFFFFF000:0x1000>
// <i>Define the target device Base address
// <i>Default: 0x80000000
#define FL0_BADR 0x80000000
// <o>Device Size <0x4000-0xFFFFF000:0x4000>
// <i>Define the size of Flash device in bytes
// <i>Default: 0x100000 (1MB)
#define FL0_SIZE 0x0200000
// <o>Content of Erased Memory <0=>0x00 <0xFF=>0xFF
// <i>Define the initial value for erased Flash data
// <i>Default: 0xFF
#define FL0_INITV 0xFF
// <s.80>Device Description file
// <i>Specify a file name with a relative path
// <i>Default: FS_FlashDev.h
#define FL0_HFILE "FS_FlashDev.h"
// <q>Default Drive [F:]
// <i>Used when Drive letter not specified
#define FL0_DEF 1
// </e>
// <e>SPI Flash Drive
// ==================
// <i>Enable SPI Flash Drive [S:]
#define SF0_EN 0
// <o>Device Size <0x10000-0xFFFFF000:0x8000>
// <i>Define the size of SPI Flash device in bytes
// <i>Default: 0x100000 (1MB)
#define SF0_SIZE 0x0200000
// <o>Content of Erased Memory <0=>0x00 <0xFF=>0xFF
// <i>Define the initial value for erased Flash data
// <i>Default: 0xFF
#define SF0_INITV 0xFF
// <s.80>Device Description file
// <i>Specify a file name with a relative path
// <i>Default: FS_SPI_FlashDev.h
#define SF0_HFILE "FS_SPI_FlashDev.h"
// <q>Default Drive [S:]
// <i>Used when Drive letter not specified
#define SF0_DEF 0
// </e>
// <e>RAM Drive
// ============
// <i>Enable Embedded RAM Drive [R:]
#define RAM0_EN 0
// <o>Device Size <0x4000-0xFFFFF000:0x4000>
// <i>Define the size of RAM device in bytes
// <i>Default: 0x40000
#define RAM0_SIZE 0x004000
// <o>Number of Sectors <8=>8 <16=>16 <32=>32 <64=>64 <128=>128
// <i>Define number of virtual sectors for RAM device
// <i>Default: 32
#define RAM0_NSECT 64
// <e>Relocate Device Buffer
// <i>Locate RAM Device Buffer at a specific address.
// <i>If not enabled, the linker selects base address.
#define RAM0_RELOC 1
// <o>Base address <0x0-0xFFFFF000:0x1000>
// <i>Define the target device Base address.
// <i>Default: 0x81000000
#define RAM0_BADR 0x81010000
// </e>
// <q>Default Drive [R:]
// <i>Used when Drive letter not specified
#define RAM0_DEF 0
// </e>
// <e>Memory Card Drive 0
// ======================
// <i>Enable Memory Card Drive [M0:]
#define MC0_EN 1
// <o>Bus Mode <0=>SD-Native <1=>SPI
// <i>Define Memory Card bus interface mode.
// <i>SD-Native mode needs MCI peripheral.
// <i>SPI mode uses SD Card in SPI mode.
#define MC0_SPI 0
// <o>File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
// <8=>8 KB <16=>16 KB <32=>32 KB
// <i>Define System Cache buffer size for file IO.
// <i>Increase this number for faster r/w access.
// <i>Default: 4 kB
#define MC0_CASZ 16
// <e>Relocate Cache Buffer
// <i>Locate Cache Buffer at a specific address.
// <i>Some devices like NXP LPC23xx require a Cache buffer
// <i>for DMA transfer located at specific address.
#define MC0_RELOC 0
// <o>Base address <0x0000-0xFFFFFE00:0x200>
// <i>Define the Cache buffer base address.
// <i>For LPC23xx/24xx devices this is USB RAM
// <i>starting at 0x7FD00000.
#define MC0_CADR 0x7FD00000
// </e>
// <q>FAT Journal
// <i>Enable FAT Journal in order to guarantee
// <i>fail-safe FAT file system operation.
#define MC0_FSJ 0
// <q>Default Drive [M0:]
// <i>Used when Drive letter not specified
#define MC0_DEF 1
// </e>
// <e>Memory Card Drive 1
// ======================
// <i>Enable Memory Card Drive [M1:]
#define MC1_EN 0
// <o>Bus Mode <0=>SD-Native <1=>SPI
// <i>Define Memory Card bus interface mode.
// <i>SD-Native mode needs MCI peripheral.
// <i>SPI mode uses SD Card in SPI mode.
#define MC1_SPI 1
// <o>File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
// <8=>8 KB <16=>16 KB <32=>32 KB
// <i>Define System Cache buffer size for file IO.
// <i>Increase this number for faster r/w access.
// <i>Default: 4 kB
#define MC1_CASZ 0
// <e>Relocate Cache Buffer
// <i>Locate Cache Buffer at a specific address.
// <i>Some devices like NXP LPC23xx require a Cache buffer
// <i>for DMA transfer located at specific address.
#define MC1_RELOC 0
// <o>Base address <0x0000-0xFFFFFE00:0x200>
// <i>Define the Cache buffer base address.
// <i>For LPC23xx/24xx devices this is USB RAM
// <i>starting at 0x7FD00000.
#define MC1_CADR 0x7FD00000
// </e>
// <q>FAT Journal
// <i>Enable FAT Journal in order to guarantee
// <i>fail-safe FAT file system operation.
#define MC1_FSJ 0
// <q>Default Drive [M1:]
// <i>Used when Drive letter not specified
#define MC1_DEF 0
// </e>
// <e>USB Flash Drive 0
// ====================
// <i>Enable USB Flash Drive [U0:]
#define USB0_EN 0
// <o>File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
// <8=>8 KB <16=>16 KB <32=>32 KB
// <i>Define System Cache buffer size for file IO.
// <i>Increase this number for faster r/w access.
// <i>Default: 4 kB
#define USB0_CASZ 8
// <q>FAT Journal
// <i>Enable FAT Journal in order to guarantee
// <i>fail-safe FAT file system operation.
#define USB0_FSJ 0
// <q>Default Drive [U0:]
// <i>Used when Drive letter not specified
#define USB0_DEF 1
// </e>
// <e>USB Flash Drive 1
// ====================
// <i>Enable USB Flash Drive [U1:]
#define USB1_EN 0
// <o>File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
// <8=>8 KB <16=>16 KB <32=>32 KB
// <i>Define System Cache buffer size for file IO.
// <i>Increase this number for faster r/w access.
// <i>Default: 4 kB
#define USB1_CASZ 8
// <q>FAT Journal
// <i>Enable FAT Journal in order to guarantee
// <i>fail-safe FAT file system operation.
#define USB1_FSJ 0
// <q>Default Drive [U1:]
// <i>Used when Drive letter not specified
#define USB1_DEF 1
// </e>
// <e>NAND Flash Drive 0
// ===================
// <i>Enable NAND Flash Drive [N0:]
#define NAND0_EN 0
// <o>Page size <528=> 512 + 16 bytes
// <2112=>2048 + 64 bytes
// <4224=>4096 + 128 bytes
// <8448=>8192 + 256 bytes
// <i>Define program Page size in bytes (User + Spare area).
#define NAND0_PGSZ 2112
// <o>Block Size <8=>8 pages <16=>16 pages <32=>32 pages
// <64=>64 pages <128=>128 pages <256=>256 pages
// <i>Define number of pages in a block.
#define NAND0_PGCNT 64
// <o>Device Size [blocks] <512-32768>
// <i>Define number of blocks in NAND Flash device.
#define NAND0_BLCNT 4096
// <o>Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages
// <8=>8 pages <16=>16 pages <32=>32 pages
// <i>Define number of cached Pages.
// <i>Default: 4 pages
#define NAND0_CAPG 2
// <o>Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks
// <8=>8 blocks <16=>16 blocks <32=>32 blocks
// <64=>64 blocks <128=>128 blocks <256=>256 blocks
// <i>Define number of indexed Flash Blocks.
// <i>Increase this number for better performance.
// <i>Default: 16 blocks
#define NAND0_CABL 16
// <o>Software ECC <0=>None <1=>Hamming (SLC)
// <i>Enable software ECC calculation only,
// <i>if not supported by hardware.
#define NAND0_SWECC 1
// <o>File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
// <8=>8 KB <16=>16 KB <32=>32 KB
// <i>Define System Cache buffer size for file IO.
// <i>Increase this number for faster r/w access.
// <i>Default: 4 kB
#define NAND0_CASZ 4
// <e>Relocate Cache Buffers
// <i>Use this option to locate Cache buffers
// <i>at specific address in RAM or SDRAM.
#define NAND0_RELOC 0
// <o>Base address <0x0000-0xFFFFFE00:0x200>
// <i>Define base address for Cache Buffers.
#define NAND0_CADR 0x80000000
// </e>
// <q>FAT Journal
// <i>Enable FAT Journal in order to guarantee
// <i>fail-safe FAT file system operation.
#define NAND0_FSJ 0
// <q>Default Drive [N0:]
// <i>Used when Drive letter not specified
#define NAND0_DEF 0
// </e>
// <e>NAND Flash Drive 1
// ===================
// <i>Enable NAND Flash Drive [N1:]
#define NAND1_EN 0
// <o>Page size <528=> 512 + 16 bytes
// <2112=>2048 + 64 bytes
// <4224=>4096 + 128 bytes
// <8448=>8192 + 256 bytes
// <i>Define program Page size in bytes (User + Spare area).
#define NAND1_PGSZ 2112
// <o>Block Size <8=>8 pages <16=>16 pages <32=>32 pages
// <64=>64 pages <128=>128 pages <256=>256 pages
// <i>Define number of pages in a block.
#define NAND1_PGCNT 32
// <o>Device Size [blocks] <512-32768>
// <i>Define number of blocks in NAND Flash device.
#define NAND1_BLCNT 512
// <o>Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages
// <8=>8 pages <16=>16 pages <32=>32 pages
// <i>Define number of cached Pages.
// <i>Default: 4 pages
#define NAND1_CAPG 4
// <o>Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks
// <8=>8 blocks <16=>16 blocks <32=>32 blocks
// <64=>64 blocks <128=>128 blocks <256=>256 blocks
// <i>Define number of indexed Flash Blocks.
// <i>Increase this number for better performance.
// <i>Default: 16 blocks
#define NAND1_CABL 16
// <o>Software ECC <0=>None <1=>Hamming (SLC)
// <i>Enable software ECC calculation only,
// <i>if not supported by hardware.
#define NAND1_SWECC 0
// <o>File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
// <8=>8 KB <16=>16 KB <32=>32 KB
// <i>Define System Cache buffer size for file IO.
// <i>Increase this number for faster r/w access.
// <i>Default: 4 kB
#define NAND1_CASZ 4
// <e>Relocate Cache Buffers
// <i>Use this option to locate Cache buffers
// <i>at specific address in RAM or SDRAM.
#define NAND1_RELOC 0
// <o>Base address <0x0000-0xFFFFFE00:0x200>
// <i>Define base address for Cache Buffers.
#define NAND1_CADR 0x80000000
// </e>
// <q>FAT Journal
// <i>Enable FAT Journal in order to guarantee
// <i>fail-safe FAT file system operation.
#define NAND1_FSJ 0
// <q>Default Drive [N1:]
// <i>Used when Drive letter not specified
#define NAND1_DEF 0
// </e>
//------------- <<< end of configuration section >>> -----------------------
#ifndef __NO_FILE_LIB_C
#include <File_lib.c>
#endif
/*----------------------------------------------------------------------------
* end of file
*---------------------------------------------------------------------------*/

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IDE/MDK-ARM/MDK-ARM/config/Net_Config.c Normal file
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/*----------------------------------------------------------------------------
* RL-ARM - TCPnet
*----------------------------------------------------------------------------
* Name: NET_CONFIG.C
* Purpose: Configuration of RL TCPnet by user.
* Rev.: V4.60
*----------------------------------------------------------------------------
* This code is part of the RealView Run-Time Library.
* Copyright (c) 2004-2012 KEIL - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#include <Net_Config.h>
//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
//
// <h>System Definitions
// =====================
// <i> Global TCPnet System definitions
// <s.15>Local Host Name
// <i> This is the name under which embedded host can be
// <i> accessed on a local area network.
// <i> Default: "mcb2300"
#define LHOST_NAME "mcb2300"
// <o>Memory Pool size <1500-64000:4><#/4>
// <i> This is the size of a memory pool in bytes. Buffers for
// <i> TCPnet packets are allocated from this memory pool.
// <i> Default: 8000 bytes
#define MEM_SIZE 4000
// <o>Tick Timer interval <10=> 10 ms <20=> 20 ms <25=> 25 ms
// <40=> 40 ms <50=> 50 ms <100=> 100 ms
// <200=> 200 ms
// <i> System Tick Timer interval for software timers
// <i> Default: 100 ms
#define TICK_INTERVAL 10
// </h>
// <e>Ethernet Network Interface
// =============================
// <i> Enable or disable Ethernet Network Interface
#define ETH_ENABLE 1
// <h>MAC Address
// ==============
// <i> Local Ethernet MAC Address
// <i> Value FF:FF:FF:FF:FF:FF is not allowed.
// <i> It is an ethernet Broadcast MAC address.
// <o>Address byte 1 <0x00-0xff:2>
// <i> LSB is an ethernet Multicast bit.
// <i> Must be 0 for local MAC address.
// <i> Default: 0x00
#define _MAC1 0x30
// <o>Address byte 2 <0x00-0xff>
// <i> Default: 0x30
#define _MAC2 0x06
// <o>Address byte 3 <0x00-0xff>
// <i> Default: 0x6C
#define _MAC3 0x6C
// <o>Address byte 4 <0x00-0xff>
// <i> Default: 0x00
#define _MAC4 0x00
// <o>Address byte 5 <0x00-0xff>
// <i> Default: 0x00
#define _MAC5 0x00
// <o>Address byte 6 <0x00-0xff>
// <i> Default: 0x01
#define _MAC6 0x01
// </h>
// <h>IP Address
// =============
// <i> Local Static IP Address
// <i> Value 255.255.255.255 is not allowed.
// <i> It is a Broadcast IP address.
// <o>Address byte 1 <0-255>
// <i> Default: 192
#define _IP1 192
// <o>Address byte 2 <0-255>
// <i> Default: 168
#define _IP2 168
// <o>Address byte 3 <0-255>
// <i> Default: 0
#define _IP3 0
// <o>Address byte 4 <0-255>
// <i> Default: 100
#define _IP4 100
// </h>
// <h>Subnet mask
// ==============
// <i> Local Subnet mask
// <o>Mask byte 1 <0-255>
// <i> Default: 255
#define _MSK1 255
// <o>Mask byte 2 <0-255>
// <i> Default: 255
#define _MSK2 255
// <o>Mask byte 3 <0-255>
// <i> Default: 255
#define _MSK3 255
// <o>Mask byte 4 <0-255>
// <i> Default: 0
#define _MSK4 0
// </h>
// <h>Default Gateway
// ==================
// <i> Default Gateway IP Address
// <o>Address byte 1 <0-255>
// <i> Default: 192
#define _GW1 192
// <o>Address byte 2 <0-255>
// <i> Default: 168
#define _GW2 168
// <o>Address byte 3 <0-255>
// <i> Default: 0
#define _GW3 0
// <o>Address byte 4 <0-255>
// <i> Default: 254
#define _GW4 254
// </h>
// <h>Primary DNS Server
// =====================
// <i> Primary DNS Server IP Address
// <o>Address byte 1 <0-255>
// <i> Default: 194
#define _pDNS1 194
// <o>Address byte 2 <0-255>
// <i> Default: 25
#define _pDNS2 25
// <o>Address byte 3 <0-255>
// <i> Default: 2
#define _pDNS3 2
// <o>Address byte 4 <0-255>
// <i> Default: 129
#define _pDNS4 129
// </h>
// <h>Secondary DNS Server
// =======================
// <i> Secondary DNS Server IP Address
// <o>Address byte 1 <0-255>
// <i> Default: 194
#define _sDNS1 194
// <o>Address byte 2 <0-255>
// <i> Default: 25
#define _sDNS2 25
// <o>Address byte 3 <0-255>
// <i> Default: 2
#define _sDNS3 2
// <o>Address byte 4 <0-255>
// <i> Default: 130
#define _sDNS4 130
// </h>
// <h>ARP Definitions
// ==================
// <i> Address Resolution Protocol Definitions
// <o>Cache Table size <5-100>
// <i> Number of cached hardware/IP addresses
// <i> Default: 10
#define ARP_TABSIZE 10
// <o>Cache Timeout in seconds <5-255>
// <i> A timeout for a cached hardware/IP addresses
// <i> Default: 150
#define ARP_TIMEOUT 150
// <o>Number of Retries <0-20>
// <i> Number of Retries to resolve an IP address
// <i> before ARP module gives up
// <i> Default: 4
#define ARP_MAXRETRY 4
// <o>Resend Timeout in seconds <1-10>
// <i> A timeout to resend the ARP Request
// <i> Default: 2
#define ARP_RESEND 10
// <q>Send Notification on Address changes
// <i> When this option is enabled, the embedded host
// <i> will send a Gratuitous ARP notification at startup,
// <i> or when the device IP address has changed.
// <i> Default: Disabled
#define ARP_NOTIFY 1
// </h>
// <e>IGMP Group Management
// ========================
// <i> Enable or disable Internet Group Management Protocol
#define IGMP_ENABLE 0
// <o>Membership Table size <2-50>
// <i> Number of Groups this host can join
// <i> Default: 5
#define IGMP_TABSIZE 5
// </e>
// <q>NetBIOS Name Service
// =======================
// <i> When this option is enabled, the embedded host can be
// <i> accessed by his name on the local LAN using NBNS protocol.
// <i> You need to modify also the number of UDP Sockets,
// <i> because NBNS protocol uses one UDP socket to run.
#define NBNS_ENABLE 0
// <e>Dynamic Host Configuration
// =============================
// <i> When this option is enabled, local IP address, Net Mask
// <i> and Default Gateway are obtained automatically from
// <i> the DHCP Server on local LAN.
// <i> You need to modify also the number of UDP Sockets,
// <i> because DHCP protocol uses one UDP socket to run.
#define DHCP_ENABLE 1
// <s.40>Vendor Class Identifier
// <i> This value is optional. If specified, it is added
// <i> to DHCP request message, identifying vendor type.
// <i> Default: ""
#define DHCP_VCID ""
// <q>Bootfile Name
// <i> This value is optional. If enabled, the Bootfile Name
// <i> (option 67) is also requested from DHCP server.
// <i> Default: disabled
#define DHCP_BOOTF 1
// </e>
// </e>
// <e>PPP Network Interface
// ========================
// <i> Enable or disable PPP Network Interface
#define PPP_ENABLE 0
// <h>IP Address
// =============
// <i> Local Static IP Address
// <o>Address byte 1 <0-255>
// <i> Default: 192
#define _IP1P 192
// <o>Address byte 2 <0-255>
// <i> Default: 168
#define _IP2P 168
// <o>Address byte 3 <0-255>
// <i> Default: 125
#define _IP3P 125
// <o>Address byte 4 <0-255>
// <i> Default: 1
#define _IP4P 1
// </h>
// <h>Subnet mask
// ==============
// <i> Local Subnet mask
// <o>Mask byte 1 <0-255>
// <i> Default: 255
#define _MSK1P 255
// <o>Mask byte 2 <0-255>
// <i> Default: 255
#define _MSK2P 255
// <o>Mask byte 3 <0-255>
// <i> Default: 255
#define _MSK3P 255
// <o>Mask byte 4 <0-255>
// <i> Default: 0
#define _MSK4P 0
// </h>
// <h>Primary DNS Server
// =====================
// <i> Primary DNS Server IP Address
// <o>Address byte 1 <0-255>
// <i> Default: 194
#define _pDNS1P 194
// <o>Address byte 2 <0-255>
// <i> Default: 25
#define _pDNS2P 25
// <o>Address byte 3 <0-255>
// <i> Default: 2
#define _pDNS3P 2
// <o>Address byte 4 <0-255>
// <i> Default: 129
#define _pDNS4P 129
// </h>
// <h>Secondary DNS Server
// =======================
// <i> Secondary DNS Server IP Address
// <o>Address byte 1 <0-255>
// <i> Default: 194
#define _sDNS1P 194
// <o>Address byte 2 <0-255>
// <i> Default: 25
#define _sDNS2P 25
// <o>Address byte 3 <0-255>
// <i> Default: 2
#define _sDNS3P 2
// <o>Address byte 4 <0-255>
// <i> Default: 130
#define _sDNS4P 130
// </h>
// <e>Logon Authentication
// =======================
// <i> Enable or disable user authentication
#define PPP_AUTHEN 1
// <q>Unsecured password (PAP)
// <i>Allow or use Password Authentication Protocol.
#define PPP_PAPEN 1
// <q>Secured password (CHAP-MD5)
// <i>Request or use Challenge Handshake Authentication
// <i>Protocol with MD5 digest algorithm.
#define PPP_CHAPEN 1
// </e>
// <q>Obtain Client IP address automatically
// =========================================
// <i> This option only applies when PPP Dial-up is used to dial
// <i> to remote PPP Server. If checked, network connection
// <i> dynamically obtains an IP address from remote PPP Server.
#define PPP_GETIP 1
// <q>Use Default Gateway on remote Network
// ========================================
// <i> This option only applies when both Ethernet and PPP Dial-up
// <i> are used. If checked, data that cannot be sent to local LAN
// <i> is forwarded to Dial-up network instead.
#define PPP_DEFGW 1
// <o>Async Control Character Map <0x0-0xffffffff>
// <i> A bit-map of control characters 0-31, which are
// <i> transmitted escaped as a 2 byte sequence.
// <i> For XON/XOFF set this value to: 0x000A 0000
// <i> Default: 0x00000000
#define PPP_ACCM 0x00000000
// <o>LCP Echo Interval in seconds <0-3600>
// <i> If no frames are received within this interval, PPP sends an
// <i> Echo Request and expects an Echo Response from the peer.
// <i> If the response is not received, the link is terminated.
// <i> A value of 0 disables the LCP Echo test.
// <i> Default: 30
#define PPP_ECHOTOUT 30
// <o>Number of Retries <0-20>
// <i> How many times PPP will try to retransmit data
// <i> before giving up. Increase this value for links
// <i> with low baud rates or high latency.
// <i> Default: 3
#define PPP_MAXRETRY 3
// <o>Retry Timeout in seconds <1-10>
// <i> If no response received within this time frame,
// <i> PPP module will try to resend the data again.
// <i> Default: 2
#define PPP_RETRYTOUT 2
// </e>
// <e>SLIP Network Interface
// ========================
// <i> Enable or disable SLIP Network Interface
#define SLIP_ENABLE 0
// <h>IP Address
// =============
// <i> Local Static IP Address
// <o>Address byte 1 <0-255>
// <i> Default: 192
#define _IP1S 192
// <o>Address byte 2 <0-255>
// <i> Default: 168
#define _IP2S 168
// <o>Address byte 3 <0-255>
// <i> Default: 225
#define _IP3S 225
// <o>Address byte 4 <0-255>
// <i> Default: 1
#define _IP4S 1
// </h>
// <h>Subnet mask
// ==============
// <i> Local Subnet mask
// <o>Mask byte 1 <0-255>
// <i> Default: 255
#define _MSK1S 255
// <o>Mask byte 2 <0-255>
// <i> Default: 255
#define _MSK2S 255
// <o>Mask byte 3 <0-255>
// <i> Default: 255
#define _MSK3S 255
// <o>Mask byte 4 <0-255>
// <i> Default: 0
#define _MSK4S 0
// </h>
// <h>Primary DNS Server
// =====================
// <i> Primary DNS Server IP Address
// <o>Address byte 1 <0-255>
// <i> Default: 194
#define _pDNS1S 194
// <o>Address byte 2 <0-255>
// <i> Default: 25
#define _pDNS2S 25
// <o>Address byte 3 <0-255>
// <i> Default: 2
#define _pDNS3S 2
// <o>Address byte 4 <0-255>
// <i> Default: 129
#define _pDNS4S 129
// </h>
// <h>Secondary DNS Server
// =======================
// <i> Secondary DNS Server IP Address
// <o>Address byte 1 <0-255>
// <i> Default: 194
#define _sDNS1S 194
// <o>Address byte 2 <0-255>
// <i> Default: 25
#define _sDNS2S 25
// <o>Address byte 3 <0-255>
// <i> Default: 2
#define _sDNS3S 2
// <o>Address byte 4 <0-255>
// <i> Default: 130
#define _sDNS4S 130
// </h>
// <q>Use Default Gateway on remote Network
// ========================================
// <i> This option only applies when both Ethernet and SLIP Dial-up
// <i> are used. If checked, data that cannot be sent to local LAN
// <i> is forwarded to Dial-up network instead.
#define SLIP_DEFGW 1
// </e>
// <e>UDP Sockets
// ==============
// <i> Enable or disable UDP Sockets
#define UDP_ENABLE 1
// <o>Number of UDP Sockets <1-20>
// <i> Number of available UDP sockets
// <i> Default: 5
#define UDP_NUMSOCKS 20
// </e>
// <e>TCP Sockets
// ==============
// <i> Enable or disable TCP Sockets
#define TCP_ENABLE 1
// <o>Number of TCP Sockets <1-20>
// <i> Number of available TCP sockets
// <i> Default: 5
#define TCP_NUMSOCKS 10
// <o>Number of Retries <0-20>
// <i> How many times TCP module will try to retransmit data
// <i> before giving up. Increase this value for high-latency
// <i> and low_throughput networks.
// <i> Default: 5
#define TCP_MAXRETRY 20
// <o>Retry Timeout in seconds <1-10>
// <i> If data frame not acknowledged within this time frame,
// <i> TCP module will try to resend the data again.
// <i> Default: 4
#define TCP_RETRYTOUT 4
// <o>Default Connect Timeout in seconds <1-600>
// <i> Default TCP Socket Keep Alive timeout. When it expires
// <i> with no TCP data frame send, TCP Connection is closed.
// <i> Default: 120
#define TCP_DEFTOUT 120
// <o>Maximum Segment Size <536-1460>
// <i> The Maximum Segment Size specifies the maximum
// <i> number of bytes in the TCP segment's Data field.
// <i> Default: 1460
#define TCP_MAXSEGSZ 1460
/* TCP fixed timeouts */
#define TCP_INIT_RETRY_TOUT 1 /* TCP initial Retransmit period in sec. */
#define TCP_SYN_RETRY_TOUT 2 /* TCP SYN frame retransmit period in sec. */
#define TCP_CONRETRY 7 /* Number of retries to establish a conn. */
// </e>
// <e>HTTP Server
// ==============
// <i> Enable or disable HTTP Server
#define HTTP_ENABLE 0
// <o>Number of HTTP Sessions <1-10>
// <i> Number of simultaneously active HTTP Sessions.
// <i> Default: 3
#define HTTP_NUMSESS 3
// <o>Port Number <1-65535>
// <i> Listening port number.
// <i> Default: 80
#define HTTP_PORTNUM 80
// <s.50>Server-Id header
// <i> This value is optional. If specified, it overrides
// <i> the default HTTP Server header from the library.
// <i> Default: ""
#define HTTP_SRVID ""
// <e>Enable User Authentication
// <i> When enabled, the user will have to authenticate
// <i> himself by username and password before accessing
// <i> any page on this Embedded WEB server.
#define HTTP_ENAUTH 1
// <s.20>Authentication Realm
// <i> Default: "Embedded WEB Server"
#define HTTP_AUTHREALM "Embedded WEB Server"
// <s.15>Authentication Username
// <i> Default: "admin"
#define HTTP_AUTHUSER "admin"
// <s.15>Authentication Password
// <i> Default: ""
#define HTTP_AUTHPASSW ""
// </e>
// </e>
// <e>Telnet Server
// ================
// <i> Enable or disable Telnet Server
#define TNET_ENABLE 0
// <o>Number of Telnet Connections <1-10>
// <i> Number of simultaneously active Telnet Connections.
// <i> Default: 1
#define TNET_NUMSESS 1
// <o>Port Number <1-65535>
// <i> Listening port number.
// <i> Default: 23
#define TNET_PORTNUM 23
// <o>Idle Connection Timeout in seconds <0-3600>
// <i> When timeout expires, the connection is closed.
// <i> A value of 0 disables disconnection on timeout.
// <i> Default: 120
#define TNET_IDLETOUT 120
// <q>Disable Echo
// <i> When disabled, the server will not echo
// <i> characters it receives.
// <i> Default: Not disabled
#define TNET_NOECHO 0
// <e>Enable User Authentication
// <i> When enabled, the user will have to authenticate
// <i> himself by username and password before access
// <i> to the system is allowed.
#define TNET_ENAUTH 1
// <s.15>Authentication Username
// <i> Default: "admin"
#define TNET_AUTHUSER "admin"
// <s.15>Authentication Password
// <i> Default: ""
#define TNET_AUTHPASSW ""
// </e>
// </e>
// <e>TFTP Server
// ==============
// <i> Enable or disable TFTP Server
#define TFTP_ENABLE 0
// <o>Number of TFTP Sessions <1-10>
// <i> Number of simultaneously active TFTP Sessions
// <i> Default: 1
#define TFTP_NUMSESS 1
// <o>Port Number <1-65535>
// <i> Listening port number.
// <i> Default: 69
#define TFTP_PORTNUM 69
// <q>Enable Firewall Support
// <i> Use the same Port Number to receive
// <i> requests and send answers to clients.
// <i> Default: Not Enabled
#define TFTP_ENFWALL 0
// <o>Inactive Session Timeout in seconds <5-120>
// <i> When timeout expires TFTP Session is closed.
// <i> Default: 15
#define TFTP_DEFTOUT 15
// <o>Number of Retries <1-10>
// <i> How many times TFTP Server will try to
// <i> retransmit the data before giving up.
// <i> Default: 4
#define TFTP_MAXRETRY 4
// </e>
// <e>TFTP Client
// ==============
// <i> Enable or disable TFTP Client
#define TFTPC_ENABLE 0
// <o>Block Size <128=>128 <256=>256 <512=>512
// <1024=>1024 <1428=>1428
// <i> Size of transfer block in bytes.
// <i> Default: 512
#define TFTPC_BLOCKSZ 512
// <o>Number of Retries <1-10>
// <i> How many times TFTP Client will try to
// <i> retransmit the data before giving up.
// <i> Default: 4
#define TFTPC_MAXRETRY 4
// <o>Retry Timeout <2=>200 ms <5=>500 ms <10=>1 sec
// <20=>2 sec <50=>5 sec <100=>10 sec
// <i> If data frame not acknowledged within this time frame,
// <i> TFTP Client will try to resend the data again.
// <i> Default: 500 ms
#define TFTPC_RETRYTO 5
// </e>
// <e>FTP Server
// ==============
// <i> Enable or disable FTP Server
#define FTP_ENABLE 0
// <o>Number of FTP Sessions <1-10>
// <i> Number of simultaneously active FTP Sessions
// <i> Default: 1
#define FTP_NUMSESS 1
// <o>Port Number <1-65535>
// <i> Listening port number.
// <i> Default: 21
#define FTP_PORTNUM 21
// <s.50>Welcome Message
// <i> This value is optional. If specified,
// <i> it overrides the default welcome message.
// <i> Default: ""
#define FTP_WELMSG ""
// <o>Idle Session Timeout in seconds <0-3600>
// <i> When timeout expires, the connection is closed.
// <i> A value of 0 disables disconnection on timeout.
// <i> Default: 120
#define FTP_IDLETOUT 120
// <e>Enable User Authentication
// <i> When enabled, the user will have to authenticate
// <i> himself by username and password before access
// <i> to the system is allowed.
#define FTP_ENAUTH 1
// <s.15>Authentication Username
// <i> Default: "admin"
#define FTP_AUTHUSER "admin"
// <s.15>Authentication Password
// <i> Default: ""
#define FTP_AUTHPASSW ""
// </e>
// </e>
// <e>FTP Client
// =============
// <i> Enable or disable FTP Client
#define FTPC_ENABLE 0
// <o>Response Timeout in seconds <1-120>
// <i> This is a time for FTP Client to wait for a response from
// <i> the Server. If timeout expires, Client aborts operation.
// <i> Default: 10
#define FTPC_DEFTOUT 10
// <q>Passive mode (PASV)
// <i> The client initiates a data connection to the server.
// <i> Default: Not passive (Active)
#define FTPC_PASVMODE 0
// </e>
// <e>DNS Client
// =============
// <i> Enable or disable DNS Client
#define DNS_ENABLE 1
// <o>Cache Table size <5-100>
// <i> Number of cached DNS host names/IP addresses
// <i> Default: 20
#define DNS_TABSIZE 20
// </e>
// <e>SMTP Client
// ==============
// <i> Enable or disable SMTP Client
#define SMTP_ENABLE 0
// <o>Response Timeout in seconds <5-120>
// <i> This is a time for SMTP Client to wait for a response from
// <i> SMTP Server. If timeout expires, Client aborts operation.
// <i> Default: 20
#define SMTP_DEFTOUT 20
// </e>
// <e>SNMP Agent
// =============
// <i> Enable or disable SNMP Agent
#define SNMP_ENABLE 0
// <s.15>Community Name
// <i> Defines where an SNMP message is destined for.
// <i> Default: "public"
#define SNMP_COMMUNITY "public"
// <o>Port Number <1-65535>
// <i> Listening port number.
// <i> Default: 161
#define SNMP_PORTNUM 161
// <o>Trap Port Number <1-65535>
// <i> Port number for Trap operations.
// <i> Default: 162
#define SNMP_TRAPPORT 162
// <h>Trap Server
// ==============
// <i> Trap Server IP Address
// <o>Address byte 1 <0-255>
// <i> Default: 192
#define SNMP_TRAPIP1 192
// <o>Address byte 2 <0-255>
// <i> Default: 168
#define SNMP_TRAPIP2 168
// <o>Address byte 3 <0-255>
// <i> Default: 0
#define SNMP_TRAPIP3 0
// <o>Address byte 4 <0-255>
// <i> Default: 100
#define SNMP_TRAPIP4 100
// </h>
// </e>
// <e>BSD Socket Interface
// =======================
// <i> Enable or disable Berkeley Socket Programming Interface
#define BSD_ENABLE 1
// <o>Number of BSD Sockets <1-20>
// <i> Number of available Berkeley Sockets
// <i> Default: 2
#define BSD_NUMSOCKS 10
// <o>Number of Streaming Server Sockets <0-20>
// <i> Defines a number of Streaming (TCP) Server sockets,
// <i> that listen for an incoming connection from the client.
// <i> Default: 1
#define BSD_SRVSOCKS 2
// <o>Receive Timeout in seconds <0-600>
// <i> A timeout for socket receive in blocking mode.
// <i> Timeout value of 0 means indefinite timeout.
// <i> Default: 20
#define BSD_RCVTOUT 20
// <q>Hostname Resolver
// <i> Enable or disable Berkeley style hostname resolver.
#define BSD_GETHOSTEN 1
// </e>
//------------- <<< end of configuration section >>> -----------------------
/*----------------------------------------------------------------------------
* Fatal Error Handler
*---------------------------------------------------------------------------*/
void sys_error (ERROR_CODE code) {
/* This function is called when a fatal error is encountered. The normal */
/* program execution is not possible anymore. Add your crytical error .*/
/* handler code here. */
switch (code) {
case ERR_MEM_ALLOC:
/* Out of memory. */
break;
case ERR_MEM_FREE:
/* Trying to release non existing memory block. */
break;
case ERR_MEM_CORRUPT:
/* Memory Link pointer is Corrupted. */
/* More data written than the size of allocated mem block. */
break;
case ERR_MEM_LOCK:
/* Locked Memory management function (alloc/free) re-entered. */
/* RTX multithread protection malfunctioning, not implemented */
/* or interrupt disable is not functioning correctly. */
break;
case ERR_UDP_ALLOC:
/* Out of UDP Sockets. */
break;
case ERR_TCP_ALLOC:
/* Out of TCP Sockets. */
break;
case ERR_TCP_STATE:
/* TCP State machine in undefined state. */
break;
}
/* End-less loop */
while (1);
}
/*----------------------------------------------------------------------------
* TCPnet Config Functions
*---------------------------------------------------------------------------*/
#define __NET_CONFIG__
#include <Net_lib.c>
/*----------------------------------------------------------------------------
* end of file
*---------------------------------------------------------------------------*/

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/*----------------------------------------------------------------------------
* RL-ARM - TCPnet
*----------------------------------------------------------------------------
* Name: NET_DEBUG.C
* Purpose: Debug Module
* Rev.: V4.60
*----------------------------------------------------------------------------
* This code is part of the RealView Run-Time Library.
* Copyright (c) 2004-2012 KEIL - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#include <Net_Config.h>
//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
// <q>Print Time Stamp
// ===================
// <i> Enable printing the time-info in debug messages
#define DBG_TIME 1
// <h>TCPnet Debug Definitions
// ===========================
// <o>Memory Management Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off Dynamic Memory debug messages
#define DBG_MEM 1
// <o>Ethernet Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off Ethernet debug messages
#define DBG_ETH 1
// <o>PPP Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off PPP debug messages
#define DBG_PPP 0
// <o>SLIP Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off SLIP debug messages
#define DBG_SLIP 0
// <o>ARP Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off ARP debug messages
#define DBG_ARP 1
// <o>IP Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off IP debug messages
#define DBG_IP 1
// <o>ICMP Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off ICMP debug messages
#define DBG_ICMP 1
// <o>IGMP Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off IGMP debug messages
#define DBG_IGMP 1
// <o>UDP Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off UDP debug messages
#define DBG_UDP 1
// <o>TCP Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off TCP debug messages
#define DBG_TCP 2
// <o>NBNS Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off NetBIOS Name Service debug messages
#define DBG_NBNS 1
// <o>DHCP Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off Dynamic Host Configuration debug messages
#define DBG_DHCP 2
// <o>DNS Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off Domain Name Service debug messages
#define DBG_DNS 1
// <o>SNMP Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off Simple Network Management debug messages
#define DBG_SNMP 1
// <o>BSD Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off BSD Interface debug messages
#define DBG_BSD 2
// </h>
// <h>Application Debug Definitions
// ================================
// <o>HTTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off Web Server debug messages
#define DBG_HTTP 1
// <o>FTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off FTP Server debug messages
#define DBG_FTP 1
// <o>FTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off FTP Client debug messages
#define DBG_FTPC 1
// <o>Telnet Server Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off Telnet Server debug messages
#define DBG_TNET 1
// <o>TFTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off TFTP Server debug messages
#define DBG_TFTP 1
// <o>TFTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off TFTP Client debug messages
#define DBG_TFTPC 1
// <o>SMTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
// <i> Turn On/Off SMTP Client debug messages
#define DBG_SMTP 1
// </h>
//------------- <<< end of configuration section >>> -----------------------
/*--------------------------- init_debug ------------------------------------*/
void init_debug (void) {
/* Add your code to initialize the Debug output. This is usually the */
/* serial interface. The function is called at TCPnet system startup. */
/* You may need to customize also the 'putchar()' function. */
}
/*----------------------------------------------------------------------------
* TCPnet Debug Functions
*---------------------------------------------------------------------------*/
#define __NET_DEBUG__
#include <Net_lib.c>
/*----------------------------------------------------------------------------
* end of file
*---------------------------------------------------------------------------*/

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/*----------------------------------------------------------------------------
* RL-ARM - RTX
*----------------------------------------------------------------------------
* Name: RTX_CONFIG.C
* Purpose: Configuration of RTX Kernel for Cortex-M
* Rev.: V4.60
*----------------------------------------------------------------------------
* This code is part of the RealView Run-Time Library.
* Copyright (c) 2004-2012 KEIL - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#include <RTL.h>
/*----------------------------------------------------------------------------
* RTX User configuration part BEGIN
*---------------------------------------------------------------------------*/
//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
//
// <h>Task Configuration
// =====================
//
// <o>Number of concurrent running tasks <0-250>
// <i> Define max. number of tasks that will run at the same time.
// <i> Default: 6
#ifndef OS_TASKCNT
#define OS_TASKCNT 6
#endif
// <o>Number of tasks with user-provided stack <0-250>
// <i> Define the number of tasks that will use a bigger stack.
// <i> The memory space for the stack is provided by the user.
// <i> Default: 0
#ifndef OS_PRIVCNT
#define OS_PRIVCNT 2
#endif
// <o>Task stack size [bytes] <20-4096:8><#/4>
// <i> Set the stack size for tasks which is assigned by the system.
// <i> Default: 512
#ifndef OS_STKSIZE
#define OS_STKSIZE 250
#endif
// <q>Check for the stack overflow
// ===============================
// <i> Include the stack checking code for a stack overflow.
// <i> Note that additional code reduces the Kernel performance.
#ifndef OS_STKCHECK
#define OS_STKCHECK 1
#endif
// <q>Run in privileged mode
// =========================
// <i> Run all Tasks in privileged mode.
// <i> Default: Unprivileged
#ifndef OS_RUNPRIV
#define OS_RUNPRIV 1
#endif
// </h>
// <h>Tick Timer Configuration
// =============================
// <o>Hardware timer <0=> Core SysTick <1=> Peripheral Timer
// <i> Define the on-chip timer used as a time-base for RTX.
// <i> Default: Core SysTick
#ifndef OS_TIMER
#define OS_TIMER 0
#endif
// <o>Timer clock value [Hz] <1-1000000000>
// <i> Set the timer clock value for selected timer.
// <i> Default: 6000000 (6MHz)
#ifndef OS_CLOCK
#define OS_CLOCK 120000000
#endif
// <o>Timer tick value [us] <1-1000000>
// <i> Set the timer tick value for selected timer.
// <i> Default: 10000 (10ms)
#ifndef OS_TICK
#define OS_TICK 1000
#endif
// </h>
// <h>System Configuration
// =======================
// <e>Round-Robin Task switching
// =============================
// <i> Enable Round-Robin Task switching.
#ifndef OS_ROBIN
#define OS_ROBIN 1
#endif
// <o>Round-Robin Timeout [ticks] <1-1000>
// <i> Define how long a task will execute before a task switch.
// <i> Default: 5
#ifndef OS_ROBINTOUT
#define OS_ROBINTOUT 5
#endif
// </e>
// <o>Number of user timers <0-250>
// <i> Define max. number of user timers that will run at the same time.
// <i> Default: 0 (User timers disabled)
#ifndef OS_TIMERCNT
#define OS_TIMERCNT 1
#endif
// <o>ISR FIFO Queue size<4=> 4 entries <8=> 8 entries
// <12=> 12 entries <16=> 16 entries
// <24=> 24 entries <32=> 32 entries
// <48=> 48 entries <64=> 64 entries
// <96=> 96 entries
// <i> ISR functions store requests to this buffer,
// <i> when they are called from the iterrupt handler.
// <i> Default: 16 entries
#ifndef OS_FIFOSZ
#define OS_FIFOSZ 16
#endif
// </h>
//------------- <<< end of configuration section >>> -----------------------
// Standard library system mutexes
// ===============================
// Define max. number system mutexes that are used to protect
// the arm standard runtime library. For microlib they are not used.
#ifndef OS_MUTEXCNT
#define OS_MUTEXCNT 8
#endif
/*----------------------------------------------------------------------------
* RTX User configuration part END
*---------------------------------------------------------------------------*/
#define OS_TRV ((U32)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1)
/*----------------------------------------------------------------------------
* Global Functions
*---------------------------------------------------------------------------*/
/*--------------------------- os_idle_demon ---------------------------------*/
__task void os_idle_demon (void) {
/* The idle demon is a system task, running when no other task is ready */
/* to run. The 'os_xxx' function calls are not allowed from this task. */
for (;;) {
/* HERE: include optional user code to be executed when no task runs.*/
}
}
/*--------------------------- os_tick_init ----------------------------------*/
#if (OS_TIMER != 0)
int os_tick_init (void) {
/* Initialize hardware timer as system tick timer. */
/* ... */
return (-1); /* Return IRQ number of timer (0..239) */
}
#endif
/*--------------------------- os_tick_irqack --------------------------------*/
#if (OS_TIMER != 0)
void os_tick_irqack (void) {
/* Acknowledge timer interrupt. */
/* ... */
}
#endif
/*--------------------------- os_tmr_call -----------------------------------*/
void os_tmr_call (U16 info) {
/* This function is called when the user timer has expired. Parameter */
/* 'info' holds the value, defined when the timer was created. */
/* HERE: include optional user code to be executed on timeout. */
}
/*--------------------------- os_error --------------------------------------*/
void os_error (U32 err_code) {
/* This function is called when a runtime error is detected. Parameter */
/* 'err_code' holds the runtime error code (defined in RTL.H). */
/* HERE: include optional code to be executed on runtime error. */
for (;;);
}
/*----------------------------------------------------------------------------
* RTX Configuration Functions
*---------------------------------------------------------------------------*/
#include <RTX_lib.c>
/*----------------------------------------------------------------------------
* end of file
*---------------------------------------------------------------------------*/

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/******************************************************************************/
/* STM32_SWO.ini: STM32 Debugger Initialization File */
/******************************************************************************/
// <<< Use Configuration Wizard in Context Menu >>> //
/******************************************************************************/
/* This file is part of the uVision/ARM development tools. */
/* Copyright (c) 2005-2009 Keil Software. All rights reserved. */
/* This software may only be used under the terms of a valid, current, */
/* end user licence from KEIL for a compatible version of KEIL software */
/* development tools. Nothing else gives you the right to use this software. */
/******************************************************************************/
FUNC void DebugSetup (void) {
// <h> Debug MCU Configuration
// <o1.0> DBG_SLEEP <i> Debug Sleep Mode
// <o1.1> DBG_STOP <i> Debug Stop Mode
// <o1.2> DBG_STANDBY <i> Debug Standby Mode
// <o1.5> TRACE_IOEN <i> Trace I/O Enable
// <o1.6..7> TRACE_MODE <i> Trace Mode
// <0=> Asynchronous
// <1=> Synchronous: TRACEDATA Size 1
// <2=> Synchronous: TRACEDATA Size 2
// <3=> Synchronous: TRACEDATA Size 4
// <o1.8> DBG_IWDG_STOP <i> Independant Watchdog Stopped when Core is halted
// <o1.9> DBG_WWDG_STOP <i> Window Watchdog Stopped when Core is halted
// <o1.10> DBG_TIM1_STOP <i> Timer 1 Stopped when Core is halted
// <o1.11> DBG_TIM2_STOP <i> Timer 2 Stopped when Core is halted
// <o1.12> DBG_TIM3_STOP <i> Timer 3 Stopped when Core is halted
// <o1.13> DBG_TIM4_STOP <i> Timer 4 Stopped when Core is halted
// <o1.14> DBG_CAN_STOP <i> CAN Stopped when Core is halted
// </h>
_WDWORD(0xE0042004, 0x00000027); // DBGMCU_CR
}
DebugSetup(); // Debugger Setup

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;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f2xx.s
;* Author : MCD Application Team
;* Version : V1.0.0
;* Date : 18-April-2011
;* Description : STM32F2xx devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00001000
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00009000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window WatchDog
DCD PVD_IRQHandler ; PVD through EXTI Line detection
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line0
DCD EXTI1_IRQHandler ; EXTI Line1
DCD EXTI2_IRQHandler ; EXTI Line2
DCD EXTI3_IRQHandler ; EXTI Line3
DCD EXTI4_IRQHandler ; EXTI Line4
DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
DCD CAN1_TX_IRQHandler ; CAN1 TX
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; External Line[15:10]s
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
DCD FSMC_IRQHandler ; FSMC
DCD SDIO_IRQHandler ; SDIO
DCD TIM5_IRQHandler ; TIM5
DCD SPI3_IRQHandler ; SPI3
DCD UART4_IRQHandler ; UART4
DCD UART5_IRQHandler ; UART5
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
DCD TIM7_IRQHandler ; TIM7
DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
DCD ETH_IRQHandler ; Ethernet
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
DCD CAN2_TX_IRQHandler ; CAN2 TX
DCD CAN2_RX0_IRQHandler ; CAN2 RX0
DCD CAN2_RX1_IRQHandler ; CAN2 RX1
DCD CAN2_SCE_IRQHandler ; CAN2 SCE
DCD OTG_FS_IRQHandler ; USB OTG FS
DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
DCD USART6_IRQHandler ; USART6
DCD I2C3_EV_IRQHandler ; I2C3 event
DCD I2C3_ER_IRQHandler ; I2C3 error
DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
DCD OTG_HS_IRQHandler ; USB OTG HS
DCD DCMI_IRQHandler ; DCMI
DCD CRYP_IRQHandler ; CRYP crypto
DCD HASH_RNG_IRQHandler ; Hash and Rng
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMP_STAMP_IRQHandler [WEAK]
EXPORT RTC_WKUP_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Stream0_IRQHandler [WEAK]
EXPORT DMA1_Stream1_IRQHandler [WEAK]
EXPORT DMA1_Stream2_IRQHandler [WEAK]
EXPORT DMA1_Stream3_IRQHandler [WEAK]
EXPORT DMA1_Stream4_IRQHandler [WEAK]
EXPORT DMA1_Stream5_IRQHandler [WEAK]
EXPORT DMA1_Stream6_IRQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT CAN1_TX_IRQHandler [WEAK]
EXPORT CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTC_Alarm_IRQHandler [WEAK]
EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
EXPORT TIM8_CC_IRQHandler [WEAK]
EXPORT DMA1_Stream7_IRQHandler [WEAK]
EXPORT FSMC_IRQHandler [WEAK]
EXPORT SDIO_IRQHandler [WEAK]
EXPORT TIM5_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT UART5_IRQHandler [WEAK]
EXPORT TIM6_DAC_IRQHandler [WEAK]
EXPORT TIM7_IRQHandler [WEAK]
EXPORT DMA2_Stream0_IRQHandler [WEAK]
EXPORT DMA2_Stream1_IRQHandler [WEAK]
EXPORT DMA2_Stream2_IRQHandler [WEAK]
EXPORT DMA2_Stream3_IRQHandler [WEAK]
EXPORT DMA2_Stream4_IRQHandler [WEAK]
EXPORT ETH_IRQHandler [WEAK]
EXPORT ETH_WKUP_IRQHandler [WEAK]
EXPORT CAN2_TX_IRQHandler [WEAK]
EXPORT CAN2_RX0_IRQHandler [WEAK]
EXPORT CAN2_RX1_IRQHandler [WEAK]
EXPORT CAN2_SCE_IRQHandler [WEAK]
EXPORT OTG_FS_IRQHandler [WEAK]
EXPORT DMA2_Stream5_IRQHandler [WEAK]
EXPORT DMA2_Stream6_IRQHandler [WEAK]
EXPORT DMA2_Stream7_IRQHandler [WEAK]
EXPORT USART6_IRQHandler [WEAK]
EXPORT I2C3_EV_IRQHandler [WEAK]
EXPORT I2C3_ER_IRQHandler [WEAK]
EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
EXPORT OTG_HS_IRQHandler [WEAK]
EXPORT DCMI_IRQHandler [WEAK]
EXPORT CRYP_IRQHandler [WEAK]
EXPORT HASH_RNG_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMP_STAMP_IRQHandler
RTC_WKUP_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Stream0_IRQHandler
DMA1_Stream1_IRQHandler
DMA1_Stream2_IRQHandler
DMA1_Stream3_IRQHandler
DMA1_Stream4_IRQHandler
DMA1_Stream5_IRQHandler
DMA1_Stream6_IRQHandler
ADC_IRQHandler
CAN1_TX_IRQHandler
CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_TIM9_IRQHandler
TIM1_UP_TIM10_IRQHandler
TIM1_TRG_COM_TIM11_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTC_Alarm_IRQHandler
OTG_FS_WKUP_IRQHandler
TIM8_BRK_TIM12_IRQHandler
TIM8_UP_TIM13_IRQHandler
TIM8_TRG_COM_TIM14_IRQHandler
TIM8_CC_IRQHandler
DMA1_Stream7_IRQHandler
FSMC_IRQHandler
SDIO_IRQHandler
TIM5_IRQHandler
SPI3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
TIM6_DAC_IRQHandler
TIM7_IRQHandler
DMA2_Stream0_IRQHandler
DMA2_Stream1_IRQHandler
DMA2_Stream2_IRQHandler
DMA2_Stream3_IRQHandler
DMA2_Stream4_IRQHandler
ETH_IRQHandler
ETH_WKUP_IRQHandler
CAN2_TX_IRQHandler
CAN2_RX0_IRQHandler
CAN2_RX1_IRQHandler
CAN2_SCE_IRQHandler
OTG_FS_IRQHandler
DMA2_Stream5_IRQHandler
DMA2_Stream6_IRQHandler
DMA2_Stream7_IRQHandler
USART6_IRQHandler
I2C3_EV_IRQHandler
I2C3_ER_IRQHandler
OTG_HS_EP1_OUT_IRQHandler
OTG_HS_EP1_IN_IRQHandler
OTG_HS_WKUP_IRQHandler
OTG_HS_IRQHandler
DCMI_IRQHandler
CRYP_IRQHandler
HASH_RNG_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****