mirror of https://github.com/wolfSSL/wolfssl
Improve benchmark for Espressif devices
This commit is contained in:
gojimmypi
parent
925fbf3bf7
commit
cd6bea852b
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@ -322,6 +322,11 @@
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#error "Nano newlib formatting must not be enabled for benchmark"
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#endif
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#endif
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#if ESP_IDF_VERSION_MAJOR >= 5
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#define TFMT "%lu"
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#else
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#define TFMT "%d"
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#endif
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#ifdef configTICK_RATE_HZ
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/* Define CPU clock cycles per tick of FreeRTOS clock
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@ -337,6 +342,27 @@
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#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ configCPU_CLOCK_HZ
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#endif
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#endif
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#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
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/* This section is for pre-v5 ESP-IDF */
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#if defined(CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ)
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#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ \
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CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ
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#elif defined(CONFIG_ESP32C2_DEFAULT_CPU_FREQ_MHZ)
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#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ \
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CONFIG_ESP32C2_DEFAULT_CPU_FREQ_MHZ
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#elif defined(CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ)
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#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ \
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CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ
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#elif defined(CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ)
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#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ \
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CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ
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#elif defined(CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ)
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#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ \
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CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ
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#else
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/* TODO unsupported */
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#endif /* older CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ */
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#endif
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#define CPU_TICK_CYCLES ( \
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(CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ * MILLION_VALUE) \
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/ configTICK_RATE_HZ \
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@ -354,9 +380,12 @@
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#elif defined(CONFIG_IDF_TARGET_ESP32C3) || \
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defined(CONFIG_IDF_TARGET_ESP32C6)
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#include <esp_cpu.h>
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#include "driver/gptimer.h"
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#if ESP_IDF_VERSION_MAJOR >= 5
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#include <driver/gptimer.h>
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#endif
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#ifdef WOLFSSL_BENCHMARK_TIMER_DEBUG
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#define RESOLUTION_SCALE 100
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/* CONFIG_XTAL_FREQ = 40, CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ = 160 */
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static gptimer_handle_t esp_gptimer = NULL;
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static gptimer_config_t esp_timer_config = {
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.clk_src = GPTIMER_CLK_SRC_DEFAULT,
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@ -375,6 +404,9 @@
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#elif defined(CONFIG_IDF_TARGET_ESP8266)
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/* no CPU HAL for ESP8266, we'll use RTOS tick calc estimates */
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#include <FreeRTOS.h>
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#include <esp_system.h>
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#include <esp_timer.h>
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#include <xtensa/hal.h>
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#elif defined(CONFIG_IDF_TARGET_ESP32H2)
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/* TODO add ESP32-H2 benchmark support */
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#else
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@ -1446,10 +1478,16 @@ static const char* bench_result_words3[][5] = {
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thisTimerVal = thisTimerVal * RESOLUTION_SCALE;
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#endif /* WOLFSSL_BENCHMARK_TIMER_DEBUG */
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thisVal = esp_cpu_get_cycle_count();
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#if ESP_IDF_VERSION_MAJOR >= 5
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thisVal = esp_cpu_get_cycle_count();
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#else
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thisVal = cpu_hal_get_cycle_count();
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#endif
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#elif defined(CONFIG_IDF_TARGET_ESP32H2)
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thisVal = esp_cpu_get_cycle_count();
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#elif defined(CONFIG_IDF_TARGET_ESP8266)
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thisVal = esp_timer_get_time();
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#else
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/* TODO: Why doesn't esp_cpu_get_cycle_count work for Xtensa?
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* Calling current_time(1) to reset time causes thisVal overflow,
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@ -1478,7 +1516,7 @@ static const char* bench_result_words3[][5] = {
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expected_diff = CPU_TICK_CYCLES * tickDiff; /* CPU expected count */
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ESP_LOGV(TAG, "CPU_TICK_CYCLES = %d", (int)CPU_TICK_CYCLES);
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ESP_LOGV(TAG, "tickCount = %llu", tickCount);
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ESP_LOGV(TAG, "last_tickCount = %u", last_tickCount);
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ESP_LOGV(TAG, "last_tickCount = " TFMT, last_tickCount);
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ESP_LOGV(TAG, "tickDiff = %llu", tickDiff);
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ESP_LOGV(TAG, "expected_diff1 = %llu", expected_diff);
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}
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@ -1514,9 +1552,16 @@ static const char* bench_result_words3[][5] = {
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/* double check expected diff calc */
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#ifdef DEBUG_WOLFSSL_BENCHMARK_TIMING
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expected_diff = (CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ * MILLION_VALUE)
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* tickDiff / configTICK_RATE_HZ;
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ESP_LOGI(TAG, "expected_diff2 = %llu", expected_diff);
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#if defined(CONFIG_IDF_TARGET_ESP8266)
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expected_diff = (CONFIG_ESP8266_DEFAULT_CPU_FREQ_MHZ
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* MILLION_VALUE)
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* tickDiff / configTICK_RATE_HZ;
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#else
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expected_diff = (CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ * MILLION_VALUE)
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* tickDiff / configTICK_RATE_HZ;
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#endif
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ESP_LOGI(TAG, "expected_diff2 = %llu", expected_diff);
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#endif
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if (expected_diff > UINT_MAX) {
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/* The number of cycles expected from FreeRTOS ticks is
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@ -1540,7 +1585,7 @@ static const char* bench_result_words3[][5] = {
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ESP_LOGI(TAG, "expected_diff = %llu", expected_diff);
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ESP_LOGI(TAG, "tickBeginDiff = %llu", tickBeginDiff);
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ESP_LOGW(TAG, WOLFSSL_ESPIDF_BLANKLINE_MESSAGE);
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ESP_LOGW(TAG, WOLFSSL_ESPIDF_BLANKLINE_MESSAGE);
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}
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#endif
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}
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@ -1593,7 +1638,13 @@ static const char* bench_result_words3[][5] = {
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ESP_LOGI(TAG, "diffDiff = %llu", diffDiff);
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ESP_LOGI(TAG, "_xthal_get_ccount_exDiff = %llu", _xthal_get_ccount_exDiff);
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#endif /* WOLFSSL_BENCHMARK_TIMER_DEBUG */
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_esp_cpu_count_last = esp_cpu_get_cycle_count();
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#if ESP_IDF_VERSION_MAJOR >= 5
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_esp_cpu_count_last = esp_cpu_get_cycle_count();
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#else
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_esp_cpu_count_last = cpu_hal_get_cycle_count();
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#endif
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ESP_LOGV(TAG, "_xthal_get_ccount_last = %llu", _esp_cpu_count_last);
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}
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#elif defined(CONFIG_IDF_TARGET_ESP32H2)
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@ -2243,8 +2294,9 @@ static WC_INLINE void bench_stats_start(int* count, double* start)
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#ifdef WOLFSSL_ESPIDF
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#ifdef DEBUG_WOLFSSL_BENCHMARK_TIMING
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ESP_LOGI(TAG, "bench_stats_start total_cycles = %llu, start=" FLT_FMT,
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total_cycles, FLT_FMT_ARGS(*start) );
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ESP_LOGI(TAG, "bench_stats_start total_cycles = %llu"
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", start=" FLT_FMT,
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total_cycles, FLT_FMT_ARGS(*start) );
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#endif
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BEGIN_ESP_CYCLES
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#else
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@ -2264,12 +2316,14 @@ static WC_INLINE void bench_stats_start(int* count, double* start)
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static WC_INLINE int bench_stats_check(double start)
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{
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int ret = 0;
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double this_current_time;
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double this_current_time = 0.0;
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this_current_time = current_time(0); /* get the timestamp, no reset */
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#if defined(DEBUG_WOLFSSL_BENCHMARK_TIMING) && defined(WOLFSSL_ESPIDF)
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ESP_LOGV(TAG, "bench_stats_check: Current time %f, start %f",
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this_current_time, start );
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#if defined(WOLFSSL_ESPIDF)
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ESP_LOGI(TAG, "bench_stats_check Current time = %f, start = %f",
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this_current_time, start );
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#endif
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#endif
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ret = ((this_current_time - start) < BENCH_MIN_RUNTIME_SEC
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@ -14179,8 +14233,13 @@ void bench_sphincsKeySign(byte level, byte optim)
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#ifdef __XTENSA__
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_esp_cpu_count_last = xthal_get_ccount();
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#else
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esp_cpu_set_cycle_count((esp_cpu_cycle_count_t)0);
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_esp_cpu_count_last = esp_cpu_get_cycle_count();
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#if ESP_IDF_VERSION_MAJOR >= 5
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esp_cpu_set_cycle_count((esp_cpu_cycle_count_t)0);
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_esp_cpu_count_last = esp_cpu_get_cycle_count();
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#else
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cpu_hal_set_cycle_count((uint32_t)0);
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_esp_cpu_count_last = cpu_hal_get_cycle_count();
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#endif
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#endif
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}
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#endif
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@ -14191,9 +14250,9 @@ void bench_sphincsKeySign(byte level, byte optim)
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typiclly in app_startup.c */
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#ifdef DEBUG_WOLFSSL_BENCHMARK_TIMING
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ESP_LOGV(TAG, "tickCount = %d", tickCount);
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ESP_LOGV(TAG, "tickCount = " TFMT, tickCount);
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if (tickCount == last_tickCount) {
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ESP_LOGW(TAG, "last_tickCount unchanged? %d", tickCount);
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ESP_LOGW(TAG, "last_tickCount unchanged?" TFMT, tickCount);
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}
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if (tickCount < last_tickCount) {
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@ -14203,13 +14262,13 @@ void bench_sphincsKeySign(byte level, byte optim)
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if (reset) {
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#ifdef DEBUG_WOLFSSL_BENCHMARK_TIMING
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ESP_LOGW(TAG, "Assign last_tickCount = %d", tickCount);
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ESP_LOGW(TAG, "Assign last_tickCount = " TFMT, tickCount);
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#endif
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last_tickCount = tickCount;
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}
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else {
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#ifdef DEBUG_WOLFSSL_BENCHMARK_TIMING
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ESP_LOGV(TAG, "No Reset last_tickCount = %d", tickCount);
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ESP_LOGV(TAG, "No Reset last_tickCount = " TFMT, tickCount);
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#endif
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}
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