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Merge pull request #7535 from gojimmypi/PR-fix-sha512-endianness

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Fix Espressif SHA512 SW fallback endianness
This commit is contained in:
David Garske 2024-05-15 09:04:07 -07:00 committed by GitHub
commit c73e4333bf
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GPG Key ID: B5690EEEBB952194
2 changed files with 34 additions and 7 deletions
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27
IDE/Espressif/ESP-IDF/examples/wolfssl_test/components/wolfssl/include/user_settings.h
View File

@ -131,8 +131,8 @@
#elif defined(CONFIG_IDF_TARGET_ESP32) || \
defined(CONFIG_IDF_TARGET_ESP32S2) || \
defined(CONFIG_IDF_TARGET_ESP32S3)
/* TODO: SRP Not enabled, known to fail on this target
* See https://github.com/wolfSSL/wolfssl/issues/7210 */
#define WOLFCRYPT_HAVE_SRP
#define FP_MAX_BITS (8192 * 2)
#elif defined(CONFIG_IDF_TARGET_ESP32C3) || \
defined(CONFIG_IDF_TARGET_ESP32H2)
/* SRP Known to be working on this target::*/
@ -750,3 +750,26 @@ Turn on timer debugging (used when CPU cycles not available)
#error "Must define USE_CERT_BUFFERS_2048 or USE_CERT_BUFFERS_1024"
#endif
#endif /* Conditional key and cert constant names */
/******************************************************************************
** Sanity Checks
******************************************************************************/
#if defined(CONFIG_ESP_MAIN_TASK_STACK_SIZE)
#if defined(WOLFCRYPT_HAVE_SRP)
#if defined(FP_MAX_BITS)
#if FP_MAX_BITS < (8192 * 2)
#define ESP_SRP_MINIMUM_STACK_8K (24 * 1024)
#else
#define ESP_SRP_MINIMUM_STACK_8K (28 * 1024)
#endif
#else
#error "Please define FP_MAX_BITS when using WOLFCRYPT_HAVE_SRP."
#endif
#if (CONFIG_ESP_MAIN_TASK_STACK_SIZE < ESP_SRP_MINIMUM_STACK)
#warning "WOLFCRYPT_HAVE_SRP enabled with small stack size"
#endif
#endif
#else
#warning "CONFIG_ESP_MAIN_TASK_STACK_SIZE not defined!"
#endif

14
wolfcrypt/src/sha512.c
View File

@ -990,15 +990,17 @@ static WC_INLINE int Sha512Update(wc_Sha512* sha512, const byte* data, word32 le
defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA512)
ret = Transform_Sha512(sha512);
#else
if(sha512->ctx.mode == ESP32_SHA_INIT) {
if (sha512->ctx.mode == ESP32_SHA_INIT) {
esp_sha_try_hw_lock(&sha512->ctx);
}
ret = esp_sha512_process(sha512);
if(ret == 0 && sha512->ctx.mode == ESP32_SHA_SW){
if (sha512->ctx.mode == ESP32_SHA_SW) {
ByteReverseWords64(sha512->buffer, sha512->buffer,
WC_SHA512_BLOCK_SIZE);
ret = Transform_Sha512(sha512);
}
else {
ret = esp_sha512_process(sha512);
}
#endif
if (ret == 0)
sha512->buffLen = 0;
@ -1884,7 +1886,8 @@ int wc_Sha512Copy(wc_Sha512* src, wc_Sha512* dst)
ret = wolfAsync_DevCopy(&src->asyncDev, &dst->asyncDev);
#endif
#if defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW)
#if defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA512)
#if defined(CONFIG_IDF_TARGET_ESP32)
if (ret == 0) {
ret = esp_sha512_ctx_copy(src, dst);
@ -2169,7 +2172,8 @@ int wc_Sha384Copy(wc_Sha384* src, wc_Sha384* dst)
ret = wolfAsync_DevCopy(&src->asyncDev, &dst->asyncDev);
#endif
#if defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW)
#if defined(WOLFSSL_USE_ESP32_CRYPT_HASH_HW) && \
!defined(NO_WOLFSSL_ESP32_CRYPT_HASH_SHA384)
#if defined(CONFIG_IDF_TARGET_ESP32)
esp_sha384_ctx_copy(src, dst);
#elif defined(CONFIG_IDF_TARGET_ESP32C2) || \