add 2019.2 Xilinx example and update README

fix to remove xml extension

add missing project file

update project

update dist include

rm prj files
This commit is contained in:
Jacob Barthelmeh 2020-04-30 15:56:50 -06:00
parent 7e267546cb
commit 3b6b59cea0
10 changed files with 1789 additions and 61 deletions

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@ -0,0 +1,849 @@
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<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/sp_x86_64.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/srp.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/srp.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/tfm.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/tfm.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/wc_dsp.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/wc_dsp.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/wc_encrypt.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/wc_encrypt.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/wc_pkcs11.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/wc_pkcs11.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/wc_port.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/wc_port.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/wolfevent.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/wolfevent.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/wolfmath.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/wolfmath.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/test/README.md</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/test/README.md</locationURI>
</link>
<link>
<name>src/wolfcrypt/test/include.am</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/test/include.am</locationURI>
</link>
<link>
<name>src/wolfcrypt/test/test.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/test/test.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/test/test.h</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/test/test.h</locationURI>
</link>
<link>
<name>src/wolfcrypt/test/test.sln</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/test/test.sln</locationURI>
</link>
<link>
<name>src/wolfcrypt/test/test.vcproj</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/test/test.vcproj</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/arm</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/nrf51.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/nrf51.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/xilinx</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/arm/armv8-32-curve25519.S</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/armv8-32-curve25519.S</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/arm/armv8-32-curve25519.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/armv8-32-curve25519.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/arm/armv8-32-sha512-asm.S</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/armv8-32-sha512-asm.S</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/arm/armv8-32-sha512-asm.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/armv8-32-sha512-asm.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/arm/armv8-aes.c</name>
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<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/armv8-aes.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/arm/armv8-chacha.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/armv8-chacha.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/arm/armv8-curve25519.S</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/armv8-curve25519.S</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/arm/armv8-curve25519.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/armv8-curve25519.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/arm/armv8-poly1305.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/armv8-poly1305.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/arm/armv8-sha256.c</name>
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<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/armv8-sha256.c</locationURI>
</link>
<link>
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<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/armv8-sha512-asm.S</locationURI>
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<link>
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<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/armv8-sha512-asm.c</locationURI>
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<link>
<name>src/wolfcrypt/src/port/arm/armv8-sha512.c</name>
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<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/armv8-sha512.c</locationURI>
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<link>
<name>src/wolfcrypt/src/port/arm/cryptoCell.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/cryptoCell.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/arm/cryptoCellHash.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/arm/cryptoCellHash.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/xilinx/xil-aesgcm.c</name>
<type>1</type>
<locationURI>PARENT-4-PROJECT_LOC/wolfcrypt/src/port/xilinx/xil-aesgcm.c</locationURI>
</link>
<link>
<name>src/wolfcrypt/src/port/xilinx/xil-sha3.c</name>
<type>1</type>
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</linkedResources>
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View File

@ -0,0 +1,309 @@
/* Linker Script for Zynq MP */
/* Stack and Heap increased to 64KB */
_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x10000;
_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x10000;
_EL0_STACK_SIZE = DEFINED(_EL0_STACK_SIZE) ? _EL0_STACK_SIZE : 1024;
_EL1_STACK_SIZE = DEFINED(_EL1_STACK_SIZE) ? _EL1_STACK_SIZE : 2048;
_EL2_STACK_SIZE = DEFINED(_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024;
/* Define Memories in the system */
MEMORY
{
ddr4_ctrl_C0_DDR4_ADDRESS_BLOCK : ORIGIN = 0x500000000, LENGTH = 0x20000000
psu_ddr_0_MEM_0 : ORIGIN = 0x0, LENGTH = 0x7FF00000
psu_ddr_1_MEM_0 : ORIGIN = 0x800000000, LENGTH = 0x80000000
psu_ocm_ram_0_MEM_0 : ORIGIN = 0xFFFC0000, LENGTH = 0x40000
psu_qspi_linear_0_MEM_0 : ORIGIN = 0xC0000000, LENGTH = 0x20000000
}
/* Specify the default entry point to the program */
ENTRY(_vector_table)
/* Define the sections, and where they are mapped in memory */
SECTIONS
{
.text : {
KEEP (*(.vectors))
*(.boot)
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
*(.plt)
*(.gnu_warning)
*(.gcc_execpt_table)
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*(.glue_7t)
*(.ARM.extab)
*(.gnu.linkonce.armextab.*)
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.init (ALIGN(64)) : {
KEEP (*(.init))
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.fini (ALIGN(64)) : {
KEEP (*(.fini))
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.interp : {
KEEP (*(.interp))
} > psu_ddr_0_MEM_0
.note-ABI-tag : {
KEEP (*(.note-ABI-tag))
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.rodata : {
. = ALIGN(64);
__rodata_start = .;
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
__rodata_end = .;
} > psu_ddr_0_MEM_0
.rodata1 : {
. = ALIGN(64);
__rodata1_start = .;
*(.rodata1)
*(.rodata1.*)
__rodata1_end = .;
} > psu_ddr_0_MEM_0
.sdata2 : {
. = ALIGN(64);
__sdata2_start = .;
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
__sdata2_end = .;
} > psu_ddr_0_MEM_0
.sbss2 : {
. = ALIGN(64);
__sbss2_start = .;
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
__sbss2_end = .;
} > psu_ddr_0_MEM_0
.data : {
. = ALIGN(64);
__data_start = .;
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.jcr)
*(.got)
*(.got.plt)
__data_end = .;
} > psu_ddr_0_MEM_0
.data1 : {
. = ALIGN(64);
__data1_start = .;
*(.data1)
*(.data1.*)
__data1_end = .;
} > psu_ddr_0_MEM_0
.got : {
*(.got)
} > psu_ddr_0_MEM_0
.got1 : {
*(.got1)
} > psu_ddr_0_MEM_0
.got2 : {
*(.got2)
} > psu_ddr_0_MEM_0
.ctors : {
. = ALIGN(64);
__CTOR_LIST__ = .;
___CTORS_LIST___ = .;
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
___CTORS_END___ = .;
} > psu_ddr_0_MEM_0
.dtors : {
. = ALIGN(64);
__DTOR_LIST__ = .;
___DTORS_LIST___ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
__DTOR_END__ = .;
___DTORS_END___ = .;
} > psu_ddr_0_MEM_0
.fixup : {
__fixup_start = .;
*(.fixup)
__fixup_end = .;
} > psu_ddr_0_MEM_0
.eh_frame : {
*(.eh_frame)
} > psu_ddr_0_MEM_0
.eh_framehdr : {
__eh_framehdr_start = .;
*(.eh_framehdr)
__eh_framehdr_end = .;
} > psu_ddr_0_MEM_0
.gcc_except_table : {
*(.gcc_except_table)
} > psu_ddr_0_MEM_0
.mmu_tbl0 (ALIGN(4096)) : {
__mmu_tbl0_start = .;
*(.mmu_tbl0)
__mmu_tbl0_end = .;
} > psu_ddr_0_MEM_0
.mmu_tbl1 (ALIGN(4096)) : {
__mmu_tbl1_start = .;
*(.mmu_tbl1)
__mmu_tbl1_end = .;
} > psu_ddr_0_MEM_0
.mmu_tbl2 (ALIGN(4096)) : {
__mmu_tbl2_start = .;
*(.mmu_tbl2)
__mmu_tbl2_end = .;
} > psu_ddr_0_MEM_0
.ARM.exidx : {
__exidx_start = .;
*(.ARM.exidx*)
*(.gnu.linkonce.armexidix.*.*)
__exidx_end = .;
} > psu_ddr_0_MEM_0
.preinit_array : {
. = ALIGN(64);
__preinit_array_start = .;
KEEP (*(SORT(.preinit_array.*)))
KEEP (*(.preinit_array))
__preinit_array_end = .;
} > psu_ddr_0_MEM_0
.init_array : {
. = ALIGN(64);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
} > psu_ddr_0_MEM_0
.fini_array : {
. = ALIGN(64);
__fini_array_start = .;
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array))
__fini_array_end = .;
} > psu_ddr_0_MEM_0
.ARM.attributes : {
__ARM.attributes_start = .;
*(.ARM.attributes)
__ARM.attributes_end = .;
} > psu_ddr_0_MEM_0
.sdata : {
. = ALIGN(64);
__sdata_start = .;
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
__sdata_end = .;
} > psu_ddr_0_MEM_0
.sbss (NOLOAD) : {
. = ALIGN(64);
__sbss_start = .;
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
. = ALIGN(64);
__sbss_end = .;
} > psu_ddr_0_MEM_0
.tdata : {
. = ALIGN(64);
__tdata_start = .;
*(.tdata)
*(.tdata.*)
*(.gnu.linkonce.td.*)
__tdata_end = .;
} > psu_ddr_0_MEM_0
.tbss : {
. = ALIGN(64);
__tbss_start = .;
*(.tbss)
*(.tbss.*)
*(.gnu.linkonce.tb.*)
__tbss_end = .;
} > psu_ddr_0_MEM_0
.bss (NOLOAD) : {
. = ALIGN(64);
__bss_start__ = .;
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(64);
__bss_end__ = .;
} > psu_ddr_0_MEM_0
_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );
_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 );
/* Generate Stack and Heap definitions */
.heap (NOLOAD) : {
. = ALIGN(64);
_heap = .;
HeapBase = .;
_heap_start = .;
. += _HEAP_SIZE;
_heap_end = .;
HeapLimit = .;
} > psu_ddr_0_MEM_0
.stack (NOLOAD) : {
. = ALIGN(64);
_el3_stack_end = .;
. += _STACK_SIZE;
__el3_stack = .;
_el2_stack_end = .;
. += _EL2_STACK_SIZE;
. = ALIGN(64);
__el2_stack = .;
_el1_stack_end = .;
. += _EL1_STACK_SIZE;
. = ALIGN(64);
__el1_stack = .;
_el0_stack_end = .;
. += _EL0_STACK_SIZE;
. = ALIGN(64);
__el0_stack = .;
} > psu_ddr_0_MEM_0
_end = .;
}

View File

@ -0,0 +1,106 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
<storageModule moduleId="org.eclipse.cdt.core.settings">
<cconfiguration id="com.xilinx.sdx.system.managedbuilder.debugConfiguration.1747591511">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.xilinx.sdx.system.managedbuilder.debugConfiguration.1747591511" moduleId="org.eclipse.cdt.core.settings" name="Debug">
<externalSettings/>
<extensions>
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
</extensions>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<configuration artifactName="${ProjName}" buildProperties="" description="" id="com.xilinx.sdx.system.managedbuilder.debugConfiguration.1747591511" name="Debug" parent="com.xilinx.sdx.system.managedbuilder.debugConfiguration">
<folderInfo id="com.xilinx.sdx.system.managedbuilder.debugConfiguration.1747591511." name="/" resourcePath="">
<toolChain id="com.xilinx.sdx.system.managedbuilder.debug.toolChain.2130101163" name="System Toolchain" superClass="com.xilinx.sdx.system.managedbuilder.debug.toolChain">
<targetPlatform id="com.xilinx.sdx.system.managedbuilder.debugConfiguration.1747591511..2039133948" name=""/>
<builder buildPath="${workspace_loc:/wolfCrypt_example_system}/Debug" enableAutoBuild="true" id="com.xilinx.sdx.system.managedbuilder.systemBuilder.659457512" managedBuildOn="true" name="System Project Builder.Debug" superClass="com.xilinx.sdx.system.managedbuilder.systemBuilder"/>
<tool id="com.xilinx.sdx.system.managedbuilder.toolchain.cfjoinTool.2119034169" name="System Builder" superClass="com.xilinx.sdx.system.managedbuilder.toolchain.cfjoinTool"/>
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</configuration>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
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<cconfiguration id="com.xilinx.sdx.system.managedbuilder.releaseConfiguration.315007310">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.xilinx.sdx.system.managedbuilder.releaseConfiguration.315007310" moduleId="org.eclipse.cdt.core.settings" name="Release">
<externalSettings/>
<extensions>
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
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</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<configuration artifactName="${ProjName}" buildProperties="" description="" id="com.xilinx.sdx.system.managedbuilder.releaseConfiguration.315007310" name="Release" parent="com.xilinx.sdx.system.managedbuilder.releaseConfiguration">
<folderInfo id="com.xilinx.sdx.system.managedbuilder.releaseConfiguration.315007310." name="/" resourcePath="">
<toolChain id="com.xilinx.sdx.system.managedbuilder.release.toolChain.1320610434" name="System Toolchain" superClass="com.xilinx.sdx.system.managedbuilder.release.toolChain">
<targetPlatform id="com.xilinx.sdx.system.managedbuilder.releaseConfiguration.315007310..1838809633" name=""/>
<builder buildPath="${workspace_loc:/wolfCrypt_example_system}/Release" enableAutoBuild="true" id="com.xilinx.sdx.system.managedbuilder.systemBuilder.1303178964" managedBuildOn="true" name="System Project Builder.Release" superClass="com.xilinx.sdx.system.managedbuilder.systemBuilder"/>
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<storageModule moduleId="scannerConfiguration">
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</storageModule>
</cproject>

View File

@ -0,0 +1,28 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>wolfCrypt_example_system</name>
<comment></comment>
<projects>
<project>wolfCrypt_example</project>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
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</natures>
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View File

@ -1,11 +1,64 @@
# Xilinx SDK wolfCrypt Project # Common Gotcha's
- If compiling all code togther (ie no sperate wolfssl library) than the -fPIC compiler flag should be used. Without using -fPIC in this build setup there could be unexpected failures.
- If building with ARMv8 crypto extensions then the compiler flags "-mstrict-align -mcpu=generic+crypto" must be used.
- Check that enough stack and heap memory is set for the operations if a crash or stall happens.
# Xilinx SDK wolfCrypt Vitis 2018.2 Project
To use this example project: To use this example project:
1. Start a new workspace 1. Start a new workspace
2. Create a new BSP called `standalone_bsp_0`. 2. Create a new BSP called `standalone_bsp_0`.
3. Copy `.cproject` and `.project` into the wolfSSL root. 3. Copy `.cproject` and `.project` from IDE/XilinxSDK/2018_2 into the wolfSSL root.
4. From the Xilinx SDK Import wolfBoot using "Import" -> "Existing Projects into Workspace". 4. From the Xilinx SDK Import wolfBoot using "Import" -> "Existing Projects into Workspace".
# Detailed Instructions For Example Use With Vitis 2019.2
1. Create a new workspace located in the directory wolfssl/IDE/XilinxSDK/2019_2
2. Create a new BSP, by selecting;
- File->New->Platform Project
- Setting "Project name" to standalone_bsp_0, then click "Next"
- Select the "Create from hardware specification" radius and click "Next"
- "Browse..." to the desired XSA file for the hardare
- (optional) change Processor to R5 now
- click "Finish"
3. (optional) If building for TLS support than expand the standalone_bsp_0 project, double click on platform_spr, Expand the cpu (i.e psu_cortexa53_0), click on Board Support Package, select the "Modify BSP Settings..." box and click on lwip211. Note that the api_mode should be changed from RAW API to SOCKET API.
4. Right click on the standalone_bsp_0 project and click on "Build Project"
5. Import the wolfcrypt example project "File->Import->Eclipse workspace or zip file"
6. Uncheck "Copy projects into workspace"
7. Select the root directory of wolfssl/IDE/XilinxSDK/2019_2, and select wolfCrypt_example and wolfCrypt_example_system. Then click "Finish"
# Steps For Creating Project From Scratch
1. Create a new workspace
2. Create a new BSP, by selecting;
- File->New->Platform Project
- Setting "Project name" to standalone_bsp_0, then click "Next"
- Select the "Create from hardware specification" radius and click "Next"
- "Browse..." to the desired XSA file for the hardare
- (optional) change Processor to R5 now
- click "Finish"
3. (optional) If building for TLS support than expand the standalone_bsp_0 project, double click on platform_spr, Expand the cpu (i.e psu_cortexa53_0), click on Board Support Package, select the "Modify BSP Settings..." box and click on lwip211. Note that the api_mode should be changed from RAW API to SOCKET API.
4. Right click on the standalone_bsp_0 project and click on "Build Project"
5. Create wolfssl project File->New->Application Project
6. Name the project wolfCrypt_example, select "Next"
7. For the platform select standalone_bsp_0 and click next, then next once more on Domain.
8. Select "Empty Application" and click "Finish"
9. Expand the wolfCrypt_example project and right click on the folder "src".
10. Select "Import Sources" and set the "From directory" to be the wolfssl root directory.
11. Select the folders to import as ./src, ./IDE/XilinxSDK, ./wolfcrypt/benchmark, ./wolfcrypt/test, ./wolfcrypt/src
12. (optional) Expand the Advanced tabe and select "Create links in workspace"
13. Click on "Finish"
14. Expand the wolfcrypt/src directory and exlude all .S files from the build
15. Right click on the wolfCrypt_example project and got to Properties. Set the macro WOLFSSL_USER_SETTINGS in C/C++ Build->Settings->ARM v8 gcc compiler->Symbols
16. Set the include path for finding user_settings.h by going to the Properties and setting it in C/C++ Build->Settings->ARM v8 gcc compiler->Directories. This is to the directory wolfssl/IDE/XilinxSDK
17. Set the include path for finding wolfSSL headers. To the root directory wolfssl
18. Add compiler flags "-fPIC -mstrict-align -mcpu=generic+crypto" to the project properties. C/C++ Build->Settings->ARM v8 gcc compiler->Miscellaneous
19. Right click on wolfCrypt_example and "Build Project"
## Platform ## Platform
Tested on the Zynq UltraScale+ MPSoC (ZUC102). Tested on the Zynq UltraScale+ MPSoC (ZUC102).

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@ -5,6 +5,11 @@
EXTRA_DIST+= IDE/XilinxSDK/README.md EXTRA_DIST+= IDE/XilinxSDK/README.md
EXTRA_DIST+= IDE/XilinxSDK/user_settings.h EXTRA_DIST+= IDE/XilinxSDK/user_settings.h
EXTRA_DIST+= IDE/XilinxSDK/wolfssl_example.c EXTRA_DIST+= IDE/XilinxSDK/wolfssl_example.c
EXTRA_DIST+= IDE/XilinxSDK/lscript.ld EXTRA_DIST+= IDE/XilinxSDK/2018_2/lscript.ld
EXTRA_DIST+= IDE/XilinxSDK/.cproject EXTRA_DIST+= IDE/XilinxSDK/2018_2/.cproject
EXTRA_DIST+= IDE/XilinxSDK/.project EXTRA_DIST+= IDE/XilinxSDK/2018_2/.project
EXTRA_DIST+= IDE/XilinxSDK/2019_2/wolfCrypt_example/.cproject
EXTRA_DIST+= IDE/XilinxSDK/2019_2/wolfCrypt_example/.project
EXTRA_DIST+= IDE/XilinxSDK/2019_2/wolfCrypt_example/src/lscript.ld
EXTRA_DIST+= IDE/XilinxSDK/2019_2/wolfCrypt_example_system/.cproject
EXTRA_DIST+= IDE/XilinxSDK/2019_2/wolfCrypt_example_system/.project