separate STM32F2 hardware hash support, disable by default
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@ -37,7 +37,7 @@
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#endif
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#ifdef STM32F2_CRYPTO
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#ifdef STM32F2_HASH
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/*
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* STM32F2 hardware MD5 support through the STM32F2 standard peripheral
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* library. Documentation located in STM32F2xx Standard Peripheral Library
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@ -342,6 +342,6 @@ void Md5Final(Md5* md5, byte* hash)
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InitMd5(md5); /* reset state */
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}
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#endif /* STM32F2_CRYPTO */
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#endif /* STM32F2_HASH */
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#endif /* NO_MD5 */
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@ -36,7 +36,7 @@
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#endif
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#ifdef STM32F2_CRYPTO
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#ifdef STM32F2_HASH
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/*
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* STM32F2 hardware SHA1 support through the STM32F2 standard peripheral
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* library. Documentation located in STM32F2xx Standard Peripheral Library
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@ -348,6 +348,6 @@ void ShaFinal(Sha* sha, byte* hash)
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InitSha(sha); /* reset state */
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}
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#endif /* STM32F2_CRYPTO */
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#endif /* STM32F2_HASH */
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#endif /* NO_SHA */
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@ -33,7 +33,7 @@
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/* in bytes */
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enum {
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#ifdef STM32F2_CRYPTO
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#ifdef STM32F2_HASH
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MD5_REG_SIZE = 4, /* STM32 register size, bytes */
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#endif
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MD5 = 0, /* hash type unique */
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@ -34,7 +34,7 @@
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/* in bytes */
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enum {
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#ifdef STM32F2_CRYPTO
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#ifdef STM32F2_HASH
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SHA_REG_SIZE = 4, /* STM32 register size, bytes */
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#endif
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SHA = 1, /* hash type unique */
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