83 lines
2.8 KiB
C
83 lines
2.8 KiB
C
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/* time-STM32F2.c
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*
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* Copyright (C) 2006-2013 wolfSSL Inc.
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*
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* This file is part of CyaSSL.
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*
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* CyaSSL is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* CyaSSL is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CONFIG_H
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#include <config.h>
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#endif
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#include "time.h"
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#define PERIPH_BASE ((uint32_t)0x40000000)
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/*-----------------------------------------------------------------------------
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* initialize RTC
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*----------------------------------------------------------------------------*/
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#include "stm32f2xx.h"
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#define assert_param(a)
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#if 0
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#define RTC_RSF_MASK ((uint32_t)0xFFFFFF5F)
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#define SYNCHRO_TIMEOUT ((uint32_t) 0x00008000)
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#define Bcd2ToByte(v) \
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((((uint8_t)(v & (uint8_t)0xF0) >> (uint8_t)0x4) * 10) + (v & (uint8_t)0x0F))
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#define RTC_TR_RESERVED_MASK ((uint32_t)0x007F7F7F)
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#define RTC_TR_MNT ((uint32_t)0x00007000)
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#define RTC_TR_MNU ((uint32_t)0x00000F00)
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#define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
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#define CR_OFFSET (PWR_OFFSET + 0x00)
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#define DBP_BitNumber 0x08
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#define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
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#define RTC_INIT_MASK ((uint32_t)0xFFFFFFFF)
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#define INITMODE_TIMEOUT ((uint32_t) 0x00010000)
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#endif
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/*-----------------------------------------------------------------------------
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* initialize TIM
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*----------------------------------------------------------------------------*/
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#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
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void init_time(void)
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{
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uint16_t tmpcr1 = 0;
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((uint32_t *)RCC)[0x10] |= RCC_APB1Periph_TIM2 ;
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tmpcr1 = TIM2->CR1 ;
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tmpcr1 &= (uint16_t) (~(((uint16_t)0x0010) | ((uint16_t)0x0060) ));
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/* CR1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS) */
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tmpcr1 |= (uint16_t)0x0000 ; /* CR1 |= TIM_CounterMode_Up */
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TIM2->CR1= tmpcr1 ;
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TIM2->ARR = 0xffffffff ; /* ARR= TIM_Period */
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TIM2->PSC = 60 ; /* PSC = TIM_Prescaler */
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TIM2->EGR = ((uint16_t)0x0001) ; /* EGR = TIM_PSCReloadMode_Immediate */
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*(uint16_t *)(PERIPH_BASE+0x0) |=((uint16_t)0x0001) ;
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/* TIM_Cmd(TIM2, ENABLE) ; */
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}
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double current_time()
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{
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return ((double)TIM2->CNT/1000000.0) ;
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}
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