In IVI, there are several displays connected to a SoC. These displays
are just driven by differential pairs (LVDS, FPD-Link, GMSL) and powered
centrally. To reduce power comsumption when user inactivity timeout
happended on the display, there is a need to cut down pixel clock from
SoC. Then, if any input events happend on the display, it should become
active again.
Currently, controlling the compositor outputs doesn't happen independently
but rather globally, and outputs repaints are based on the compositor state
This is necessary to have an API that can force the power state of an
output to off via DPMS mode while all other compositor outputs remain
unaffected.
Signed-off-by: Rajendraprasad K J <KarammelJayakumar.Rajendraprasad@in.bosch.com>
Signed-off-by: Vinh Nguyen Trong <Vinh.NguyenTrong@vn.bosch.com>
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