Add raw modeline support.
This allows specifying a modeline in the config for the 'mode' key in the output section, such as one you would get from cvt.
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parent
4f238a590d
commit
8f37e0bc1e
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@ -53,13 +53,15 @@ enum output_config {
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OUTPUT_CONFIG_OFF,
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OUTPUT_CONFIG_PREFERRED,
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OUTPUT_CONFIG_CURRENT,
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OUTPUT_CONFIG_MODE
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OUTPUT_CONFIG_MODE,
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OUTPUT_CONFIG_MODELINE
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};
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struct drm_configured_output {
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char *name;
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char *mode;
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int32_t width, height;
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drmModeModeInfo crtc_mode;
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enum output_config config;
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struct wl_list link;
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};
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@ -1397,7 +1399,8 @@ create_output_for_connector(struct drm_compositor *ec,
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wl_list_for_each(drm_mode, &output->base.mode_list, base.link) {
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if (o && o->width == drm_mode->base.width &&
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o->height == drm_mode->base.height)
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o->height == drm_mode->base.height &&
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o->config == OUTPUT_CONFIG_MODE)
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configured = &drm_mode->base;
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if (!memcmp(&crtc_mode, &drm_mode->mode_info, sizeof crtc_mode))
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current = &drm_mode->base;
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@ -1405,6 +1408,15 @@ create_output_for_connector(struct drm_compositor *ec,
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preferred = &drm_mode->base;
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}
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if (o && o->config == OUTPUT_CONFIG_MODELINE) {
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ret = drm_output_add_mode(output, &o->crtc_mode);
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if (ret)
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goto err_free;
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configured = container_of(output->base.mode_list.prev,
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struct weston_mode, link);
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current = configured;
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}
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if (current == NULL && crtc_mode.clock != 0) {
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ret = drm_output_add_mode(output, &crtc_mode);
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if (ret)
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@ -2043,6 +2055,65 @@ err_base:
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return NULL;
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}
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static int
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set_sync_flags(drmModeModeInfo *mode, char *hsync, char *vsync)
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{
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mode->flags = 0;
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if (strcmp(hsync, "+hsync") == 0)
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mode->flags |= DRM_MODE_FLAG_PHSYNC;
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else if (strcmp(hsync, "-hsync") == 0)
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mode->flags |= DRM_MODE_FLAG_NHSYNC;
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else
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return -1;
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if (strcmp(vsync, "+vsync") == 0)
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mode->flags |= DRM_MODE_FLAG_PVSYNC;
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else if (strcmp(vsync, "-vsync") == 0)
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mode->flags |= DRM_MODE_FLAG_NVSYNC;
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else
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return -1;
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return 0;
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}
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static int
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check_for_modeline(struct drm_configured_output *output)
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{
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drmModeModeInfo mode;
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char hsync[16];
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char vsync[16];
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char mode_name[16];
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float fclock;
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mode.type = DRM_MODE_TYPE_USERDEF;
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mode.hskew = 0;
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mode.vscan = 0;
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mode.vrefresh = 0;
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if (sscanf(output_mode, "%f %hd %hd %hd %hd %hd %hd %hd %hd %s %s",
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&fclock, &mode.hdisplay,
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&mode.hsync_start,
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&mode.hsync_end, &mode.htotal,
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&mode.vdisplay,
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&mode.vsync_start,
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&mode.vsync_end, &mode.vtotal,
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hsync, vsync) == 11) {
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if (set_sync_flags(&mode, hsync, vsync))
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return -1;
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sprintf(mode_name, "%dx%d", mode.hdisplay, mode.vdisplay);
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strcpy(mode.name, mode_name);
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mode.clock = fclock * 1000;
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} else
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return -1;
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output->crtc_mode = mode;
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return 0;
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}
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static void
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output_section_done(void *data)
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{
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@ -2070,6 +2141,8 @@ output_section_done(void *data)
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output->config = OUTPUT_CONFIG_CURRENT;
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else if (sscanf(output_mode, "%dx%d", &output->width, &output->height) == 2)
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output->config = OUTPUT_CONFIG_MODE;
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else if (check_for_modeline(output) == 0)
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output->config = OUTPUT_CONFIG_MODELINE;
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if (output->config != OUTPUT_CONFIG_INVALID)
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wl_list_insert(&configured_output_list, &output->link);
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@ -36,8 +36,8 @@ duration=600
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#[output]
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#name=LVDS1
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#mode=off
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#mode=1680x1050
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#[output]
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#name=VGA1
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#mode=1280x1024
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#mode=173.00 1920 2048 2248 2576 1080 1083 1088 1120 -hsync +vsync
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