609 lines
19 KiB
C
609 lines
19 KiB
C
/*
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* emulator main execution loop
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "hw/core/cpu.h"
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#include "exec/exec-all.h"
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#include "tcg/tcg.h"
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#include "qemu/atomic.h"
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#include "qemu/timer.h"
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#include "exec/tb-hash.h"
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#include "exec/tb-lookup.h"
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#include "sysemu/cpus.h"
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#include "uc_priv.h"
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/* -icount align implementation. */
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typedef struct SyncClocks {
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int64_t diff_clk;
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int64_t last_cpu_icount;
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int64_t realtime_clock;
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} SyncClocks;
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/* Allow the guest to have a max 3ms advance.
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* The difference between the 2 clocks could therefore
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* oscillate around 0.
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*/
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#define VM_CLOCK_ADVANCE 3000000
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#define THRESHOLD_REDUCE 1.5
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#define MAX_DELAY_PRINT_RATE 2000000000LL
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#define MAX_NB_PRINTS 100
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/* Execute a TB, and fix up the CPU state afterwards if necessary */
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static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
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{
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CPUArchState *env = cpu->env_ptr;
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uintptr_t ret;
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TranslationBlock *last_tb;
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int tb_exit;
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uint8_t *tb_ptr = itb->tc.ptr;
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tb_exec_lock(cpu->uc->tcg_ctx);
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ret = tcg_qemu_tb_exec(env, tb_ptr);
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tb_exec_unlock(cpu->uc->tcg_ctx);
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cpu->can_do_io = 1;
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last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
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tb_exit = ret & TB_EXIT_MASK;
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// trace_exec_tb_exit(last_tb, tb_exit);
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if (tb_exit > TB_EXIT_IDX1) {
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/* We didn't start executing this TB (eg because the instruction
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* counter hit zero); we must restore the guest PC to the address
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* of the start of the TB.
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*/
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CPUClass *cc = CPU_GET_CLASS(cpu);
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if (!HOOK_EXISTS(env->uc, UC_HOOK_CODE) && !env->uc->timeout) {
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// We should sync pc for R/W error.
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switch (env->uc->invalid_error) {
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case UC_ERR_WRITE_PROT:
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case UC_ERR_READ_PROT:
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case UC_ERR_FETCH_PROT:
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case UC_ERR_WRITE_UNMAPPED:
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case UC_ERR_READ_UNMAPPED:
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case UC_ERR_FETCH_UNMAPPED:
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case UC_ERR_WRITE_UNALIGNED:
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case UC_ERR_READ_UNALIGNED:
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case UC_ERR_FETCH_UNALIGNED:
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break;
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default:
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if (cc->synchronize_from_tb) {
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// avoid sync twice when helper_uc_tracecode() already did this.
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if (env->uc->emu_counter <= env->uc->emu_count &&
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!env->uc->stop_request && !env->uc->quit_request)
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cc->synchronize_from_tb(cpu, last_tb);
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} else {
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assert(cc->set_pc);
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cc->set_pc(cpu, last_tb->pc);
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}
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}
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}
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cpu->tcg_exit_req = 0;
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}
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return ret;
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}
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/* Execute the code without caching the generated code. An interpreter
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could be used if available. */
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static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
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TranslationBlock *orig_tb, bool ignore_icount)
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{
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TranslationBlock *tb;
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uint32_t cflags = curr_cflags() | CF_NOCACHE;
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if (ignore_icount) {
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cflags &= ~CF_USE_ICOUNT;
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}
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/* Should never happen.
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We only end up here when an existing TB is too long. */
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cflags |= MIN(max_cycles, CF_COUNT_MASK);
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mmap_lock();
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tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base,
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orig_tb->flags, cflags);
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tb->orig_tb = orig_tb;
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mmap_unlock();
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/* execute the generated code */
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cpu_tb_exec(cpu, tb);
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mmap_lock();
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tb_phys_invalidate(cpu->uc->tcg_ctx, tb, -1);
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mmap_unlock();
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tcg_tb_remove(cpu->uc->tcg_ctx, tb);
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}
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struct tb_desc {
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target_ulong pc;
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target_ulong cs_base;
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CPUArchState *env;
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tb_page_addr_t phys_page1;
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uint32_t flags;
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uint32_t cf_mask;
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uint32_t trace_vcpu_dstate;
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};
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static bool tb_lookup_cmp(struct uc_struct *uc, const void *p, const void *d)
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{
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const TranslationBlock *tb = p;
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const struct tb_desc *desc = d;
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if (tb->pc == desc->pc &&
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tb->page_addr[0] == desc->phys_page1 &&
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tb->cs_base == desc->cs_base &&
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tb->flags == desc->flags &&
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tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
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(tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == desc->cf_mask) {
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/* check next page if needed */
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if (tb->page_addr[1] == -1) {
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return true;
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} else {
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tb_page_addr_t phys_page2;
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target_ulong virt_page2;
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virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
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phys_page2 = get_page_addr_code(desc->env, virt_page2);
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if (tb->page_addr[1] == phys_page2) {
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return true;
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}
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}
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}
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return false;
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}
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TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
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target_ulong cs_base, uint32_t flags,
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uint32_t cf_mask)
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{
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struct uc_struct *uc = cpu->uc;
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tb_page_addr_t phys_pc;
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struct tb_desc desc;
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uint32_t h;
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desc.env = (CPUArchState *)cpu->env_ptr;
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desc.cs_base = cs_base;
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desc.flags = flags;
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desc.cf_mask = cf_mask;
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desc.trace_vcpu_dstate = *cpu->trace_dstate;
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desc.pc = pc;
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phys_pc = get_page_addr_code(desc.env, pc);
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if (phys_pc == -1) {
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return NULL;
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}
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desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
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h = tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate);
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return qht_lookup_custom(uc, &cpu->uc->tcg_ctx->tb_ctx.htable, &desc, h, tb_lookup_cmp);
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}
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void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr)
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{
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if (TCG_TARGET_HAS_direct_jump) {
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uintptr_t offset = tb->jmp_target_arg[n];
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uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr;
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tb_target_set_jmp_target(tc_ptr, tc_ptr + offset, addr);
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} else {
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tb->jmp_target_arg[n] = addr;
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}
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}
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static inline void tb_add_jump(TranslationBlock *tb, int n,
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TranslationBlock *tb_next)
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{
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uintptr_t old;
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assert(n < ARRAY_SIZE(tb->jmp_list_next));
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/* make sure the destination TB is valid */
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if (tb_next->cflags & CF_INVALID) {
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goto out_unlock_next;
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}
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/* Atomically claim the jump destination slot only if it was NULL */
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#ifdef _MSC_VER
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old = atomic_cmpxchg((long *)&tb->jmp_dest[n], (uintptr_t)NULL, (uintptr_t)tb_next);
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#else
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old = atomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL, (uintptr_t)tb_next);
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#endif
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if (old) {
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goto out_unlock_next;
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}
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/* patch the native jump address */
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tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr);
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/* add in TB jmp list */
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tb->jmp_list_next[n] = tb_next->jmp_list_head;
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tb_next->jmp_list_head = (uintptr_t)tb | n;
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return;
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out_unlock_next:
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return;
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}
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static inline TranslationBlock *tb_find(CPUState *cpu,
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TranslationBlock *last_tb,
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int tb_exit, uint32_t cf_mask)
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{
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TranslationBlock *tb;
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target_ulong cs_base, pc;
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uint32_t flags;
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uc_tb cur_tb, prev_tb;
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uc_engine *uc = cpu->uc;
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struct list_item *cur;
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struct hook *hook;
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tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
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if (tb == NULL) {
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mmap_lock();
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tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask);
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mmap_unlock();
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/* We add the TB in the virtual pc hash table for the fast lookup */
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cpu->tb_jmp_cache[tb_jmp_cache_hash_func(cpu->uc, pc)] = tb;
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if (uc->last_tb) {
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UC_TB_COPY(&cur_tb, tb);
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UC_TB_COPY(&prev_tb, uc->last_tb);
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for (cur = uc->hook[UC_HOOK_EDGE_GENERATED_IDX].head;
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cur != NULL && (hook = (struct hook *)cur->data); cur = cur->next) {
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if (hook->to_delete) {
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continue;
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}
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if (HOOK_BOUND_CHECK(hook, (uint64_t)tb->pc)) {
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((uc_hook_edge_gen_t)hook->callback)(uc, &cur_tb, &prev_tb, hook->user_data);
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}
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}
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}
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}
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/* We don't take care of direct jumps when address mapping changes in
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* system emulation. So it's not safe to make a direct jump to a TB
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* spanning two pages because the mapping for the second page can change.
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*/
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if (tb->page_addr[1] != -1) {
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last_tb = NULL;
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}
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/* See if we can patch the calling TB. */
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if (last_tb) {
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tb_add_jump(last_tb, tb_exit, tb);
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}
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return tb;
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}
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static inline bool cpu_handle_halt(CPUState *cpu)
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{
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if (cpu->halted) {
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#if 0
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#if defined(TARGET_I386)
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if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
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&& replay_interrupt()) {
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X86CPU *x86_cpu = X86_CPU(cpu);
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apic_poll_irq(x86_cpu->apic_state);
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cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
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}
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#endif
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#endif
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if (!cpu_has_work(cpu)) {
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return true;
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}
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cpu->halted = 0;
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}
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return false;
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}
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static inline void cpu_handle_debug_exception(CPUState *cpu)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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CPUWatchpoint *wp;
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if (!cpu->watchpoint_hit) {
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QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
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wp->flags &= ~BP_WATCHPOINT_HIT;
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}
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}
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cc->debug_excp_handler(cpu);
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}
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static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
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{
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bool catched = false;
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struct uc_struct *uc = cpu->uc;
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struct hook *hook;
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// printf(">> exception index = %u\n", cpu->exception_index); qq
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if (cpu->uc->stop_interrupt && cpu->uc->stop_interrupt(cpu->uc, cpu->exception_index)) {
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// Unicorn: call registered invalid instruction callbacks
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catched = false;
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HOOK_FOREACH_VAR_DECLARE;
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HOOK_FOREACH(uc, hook, UC_HOOK_INSN_INVALID) {
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if (hook->to_delete) {
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continue;
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}
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catched = ((uc_cb_hookinsn_invalid_t)hook->callback)(uc, hook->user_data);
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if (catched) {
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break;
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}
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}
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if (!catched) {
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uc->invalid_error = UC_ERR_INSN_INVALID;
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}
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// we want to stop emulation
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*ret = EXCP_HLT;
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return true;
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}
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if (cpu->exception_index < 0) {
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return false;
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}
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if (cpu->exception_index >= EXCP_INTERRUPT) {
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/* exit request from the cpu execution loop */
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*ret = cpu->exception_index;
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if (*ret == EXCP_DEBUG) {
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cpu_handle_debug_exception(cpu);
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}
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cpu->exception_index = -1;
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return true;
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} else {
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#if defined(TARGET_X86_64)
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CPUArchState *env = cpu->env_ptr;
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if (env->exception_is_int) {
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// point EIP to the next instruction after INT
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env->eip = env->exception_next_eip;
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}
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#endif
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#if defined(TARGET_MIPS) || defined(TARGET_MIPS64)
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// Unicorn: Imported from https://github.com/unicorn-engine/unicorn/pull/1098
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CPUMIPSState *env = &(MIPS_CPU(cpu)->env);
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env->active_tc.PC = uc->next_pc;
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#endif
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#if defined(TARGET_RISCV)
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CPURISCVState *env = &(RISCV_CPU(uc->cpu)->env);
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env->pc += 4;
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#endif
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// Unicorn: call registered interrupt callbacks
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catched = false;
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HOOK_FOREACH_VAR_DECLARE;
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HOOK_FOREACH(uc, hook, UC_HOOK_INTR) {
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if (hook->to_delete) {
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continue;
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}
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((uc_cb_hookintr_t)hook->callback)(uc, cpu->exception_index, hook->user_data);
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catched = true;
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}
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// Unicorn: If un-catched interrupt, stop executions.
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if (!catched) {
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// printf("AAAAAAAAAAAA\n"); qq
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uc->invalid_error = UC_ERR_EXCEPTION;
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cpu->halted = 1;
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*ret = EXCP_HLT;
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return true;
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}
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cpu->exception_index = -1;
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}
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*ret = EXCP_INTERRUPT;
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return false;
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}
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static inline bool cpu_handle_interrupt(CPUState *cpu,
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TranslationBlock **last_tb)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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/* Clear the interrupt flag now since we're processing
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* cpu->interrupt_request and cpu->exit_request.
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* Ensure zeroing happens before reading cpu->exit_request or
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* cpu->interrupt_request (see also smp_wmb in cpu_exit())
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*/
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cpu_neg(cpu)->icount_decr.u16.high = 0;
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if (unlikely(cpu->interrupt_request)) {
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int interrupt_request;
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interrupt_request = cpu->interrupt_request;
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if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
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/* Mask out external interrupts for this step. */
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interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
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}
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if (interrupt_request & CPU_INTERRUPT_DEBUG) {
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cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
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cpu->exception_index = EXCP_DEBUG;
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return true;
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}
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#if defined(TARGET_I386)
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else if (interrupt_request & CPU_INTERRUPT_INIT) {
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X86CPU *x86_cpu = X86_CPU(cpu);
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CPUArchState *env = &x86_cpu->env;
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//replay_interrupt();
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cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
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do_cpu_init(x86_cpu);
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cpu->exception_index = EXCP_HALTED;
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return true;
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}
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#else
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else if (interrupt_request & CPU_INTERRUPT_RESET) {
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//replay_interrupt();
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cpu_reset(cpu);
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return true;
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}
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#endif
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/* The target hook has 3 exit conditions:
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False when the interrupt isn't processed,
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True when it is, and we should restart on a new TB,
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and via longjmp via cpu_loop_exit. */
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else {
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if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
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//replay_interrupt();
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cpu->exception_index = -1;
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*last_tb = NULL;
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}
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/* The target hook may have updated the 'cpu->interrupt_request';
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* reload the 'interrupt_request' value */
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interrupt_request = cpu->interrupt_request;
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}
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if (interrupt_request & CPU_INTERRUPT_EXITTB) {
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cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
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/* ensure that no TB jump will be modified as
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the program flow was changed */
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*last_tb = NULL;
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}
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}
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/* Finally, check if we need to exit to the main loop. */
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if (unlikely(cpu->exit_request)) {
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cpu->exit_request = 0;
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if (cpu->exception_index == -1) {
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cpu->exception_index = EXCP_INTERRUPT;
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}
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return true;
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}
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return false;
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}
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static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
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TranslationBlock **last_tb, int *tb_exit)
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{
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uintptr_t ret;
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int32_t insns_left;
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// trace_exec_tb(tb, tb->pc);
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ret = cpu_tb_exec(cpu, tb);
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cpu->uc->last_tb = tb; // Trace the last tb we executed.
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tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
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*tb_exit = ret & TB_EXIT_MASK;
|
|
if (*tb_exit != TB_EXIT_REQUESTED) {
|
|
*last_tb = tb;
|
|
return;
|
|
}
|
|
|
|
*last_tb = NULL;
|
|
insns_left = cpu_neg(cpu)->icount_decr.u32;
|
|
if (insns_left < 0) {
|
|
/* Something asked us to stop executing chained TBs; just
|
|
* continue round the main loop. Whatever requested the exit
|
|
* will also have set something else (eg exit_request or
|
|
* interrupt_request) which will be handled by
|
|
* cpu_handle_interrupt. cpu_handle_interrupt will also
|
|
* clear cpu->icount_decr.u16.high.
|
|
*/
|
|
return;
|
|
}
|
|
|
|
/* Instruction counter expired. */
|
|
/* Refill decrementer and continue execution. */
|
|
insns_left = MIN(0xffff, cpu->icount_budget);
|
|
cpu_neg(cpu)->icount_decr.u16.low = insns_left;
|
|
cpu->icount_extra = cpu->icount_budget - insns_left;
|
|
if (!cpu->icount_extra) {
|
|
/* Execute any remaining instructions, then let the main loop
|
|
* handle the next event.
|
|
*/
|
|
if (insns_left > 0) {
|
|
cpu_exec_nocache(cpu, insns_left, tb, false);
|
|
}
|
|
}
|
|
}
|
|
|
|
/* main execution loop */
|
|
int cpu_exec(struct uc_struct *uc, CPUState *cpu)
|
|
{
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
|
int ret;
|
|
// SyncClocks sc = { 0 };
|
|
|
|
if (cpu_handle_halt(cpu)) {
|
|
return EXCP_HALTED;
|
|
}
|
|
|
|
// rcu_read_lock();
|
|
|
|
cc->cpu_exec_enter(cpu);
|
|
|
|
/* Calculate difference between guest clock and host clock.
|
|
* This delay includes the delay of the last cycle, so
|
|
* what we have to do is sleep until it is 0. As for the
|
|
* advance/delay we gain here, we try to fix it next time.
|
|
*/
|
|
// init_delay_params(&sc, cpu);
|
|
|
|
// Unicorn: We would like to support nested uc_emu_start calls.
|
|
/* prepare setjmp context for exception handling */
|
|
// if (sigsetjmp(cpu->jmp_env, 0) != 0) {
|
|
if (sigsetjmp(uc->jmp_bufs[uc->nested_level - 1], 0) != 0) {
|
|
#if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
|
|
/* Some compilers wrongly smash all local variables after
|
|
* siglongjmp. There were bug reports for gcc 4.5.0 and clang.
|
|
* Reload essential local variables here for those compilers.
|
|
* Newer versions of gcc would complain about this code (-Wclobbered). */
|
|
cc = CPU_GET_CLASS(cpu);
|
|
#else /* buggy compiler */
|
|
/* Assert that the compiler does not smash local variables. */
|
|
// g_assert(cpu == current_cpu);
|
|
g_assert(cc == CPU_GET_CLASS(cpu));
|
|
#endif /* buggy compiler */
|
|
|
|
assert_no_pages_locked();
|
|
}
|
|
|
|
/* if an exception is pending, we execute it here */
|
|
while (!cpu_handle_exception(cpu, &ret)) {
|
|
TranslationBlock *last_tb = NULL;
|
|
int tb_exit = 0;
|
|
|
|
while (!cpu_handle_interrupt(cpu, &last_tb)) {
|
|
uint32_t cflags = cpu->cflags_next_tb;
|
|
TranslationBlock *tb;
|
|
|
|
/* When requested, use an exact setting for cflags for the next
|
|
execution. This is used for icount, precise smc, and stop-
|
|
after-access watchpoints. Since this request should never
|
|
have CF_INVALID set, -1 is a convenient invalid value that
|
|
does not require tcg headers for cpu_common_reset. */
|
|
if (cflags == -1) {
|
|
cflags = curr_cflags();
|
|
} else {
|
|
cpu->cflags_next_tb = -1;
|
|
}
|
|
|
|
tb = tb_find(cpu, last_tb, tb_exit, cflags);
|
|
cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit);
|
|
/* Try to align the host and virtual clocks
|
|
if the guest is in advance */
|
|
// align_clocks(&sc, cpu);
|
|
}
|
|
}
|
|
|
|
// Unicorn: Clear any TCG exit flag that might have been left set by exit requests
|
|
uc->cpu->tcg_exit_req = 0;
|
|
|
|
cc->cpu_exec_exit(cpu);
|
|
// rcu_read_unlock();
|
|
|
|
return ret;
|
|
}
|