548 lines
16 KiB
C
548 lines
16 KiB
C
#include "acutest.h"
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#include "unicorn/unicorn.h"
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#include "unicorn_test.h"
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#include <stdbool.h>
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#include <stdint.h>
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#include <stdio.h>
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const uint64_t code_start = 0x1000;
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const uint64_t code_len = 0x4000;
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static void uc_common_setup(uc_engine **uc, uc_arch arch, uc_mode mode,
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const char *code, uint64_t size, uc_cpu_arm64 cpu)
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{
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OK(uc_open(arch, mode, uc));
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OK(uc_ctl_set_cpu_model(*uc, cpu));
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OK(uc_mem_map(*uc, code_start, code_len, UC_PROT_ALL));
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OK(uc_mem_write(*uc, code_start, code, size));
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}
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static void test_arm64_until(void)
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{
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uc_engine *uc;
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char code[] = "\x30\x00\x80\xd2\x11\x04\x80\xd2\x9c\x23\x00\x91";
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/*
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mov x16, #1
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mov x17, #0x20
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add x28, x28, 8
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*/
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uint64_t r_x16 = 0x12341234;
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uint64_t r_x17 = 0x78907890;
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uint64_t r_pc = 0x00000000;
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uint64_t r_x28 = 0x12341234;
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uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1,
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UC_CPU_ARM64_A72);
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// initialize machine registers
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OK(uc_reg_write(uc, UC_ARM64_REG_X16, &r_x16));
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OK(uc_reg_write(uc, UC_ARM64_REG_X17, &r_x17));
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OK(uc_reg_write(uc, UC_ARM64_REG_X28, &r_x28));
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// emulate the three instructions
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 3));
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OK(uc_reg_read(uc, UC_ARM64_REG_X16, &r_x16));
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OK(uc_reg_read(uc, UC_ARM64_REG_X17, &r_x17));
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OK(uc_reg_read(uc, UC_ARM64_REG_X28, &r_x28));
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OK(uc_reg_read(uc, UC_ARM64_REG_PC, &r_pc));
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TEST_CHECK(r_x16 == 0x1);
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TEST_CHECK(r_x17 == 0x20);
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TEST_CHECK(r_x28 == 0x1234123c);
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TEST_CHECK(r_pc == (code_start + sizeof(code) - 1));
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OK(uc_close(uc));
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}
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static void test_arm64_code_patching(void)
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{
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uc_engine *uc;
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char code[] = "\x00\x04\x00\x11"; // add w0, w0, 0x1
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uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1,
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UC_CPU_ARM64_A72);
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// zero out x0
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uint64_t r_x0 = 0x0;
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OK(uc_reg_write(uc, UC_ARM64_REG_X0, &r_x0));
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// emulate the instruction
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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// check value
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OK(uc_reg_read(uc, UC_ARM64_REG_X0, &r_x0));
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TEST_CHECK(r_x0 == 0x1);
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// patch instruction
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char patch_code[] = "\x00\xfc\x1f\x11"; // add w0, w0, 0x7FF
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OK(uc_mem_write(uc, code_start, patch_code, sizeof(patch_code) - 1));
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// zero out x0
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r_x0 = 0x0;
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OK(uc_reg_write(uc, UC_ARM64_REG_X0, &r_x0));
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OK(uc_emu_start(uc, code_start, code_start + sizeof(patch_code) - 1, 0, 0));
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// check value
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OK(uc_reg_read(uc, UC_ARM64_REG_X0, &r_x0));
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TEST_CHECK(r_x0 != 0x1);
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TEST_CHECK(r_x0 == 0x7ff);
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OK(uc_close(uc));
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}
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// Need to flush the cache before running the emulation after patching
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static void test_arm64_code_patching_count(void)
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{
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uc_engine *uc;
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char code[] = "\x00\x04\x00\x11"; // add w0, w0, 0x1
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uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1,
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UC_CPU_ARM64_A72);
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// zero out x0
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uint64_t r_x0 = 0x0;
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OK(uc_reg_write(uc, UC_ARM64_REG_X0, &r_x0));
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// emulate the instruction
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OK(uc_emu_start(uc, code_start, -1, 0, 1));
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// check value
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OK(uc_reg_read(uc, UC_ARM64_REG_X0, &r_x0));
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TEST_CHECK(r_x0 == 0x1);
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// patch instruction
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char patch_code[] = "\x00\xfc\x1f\x11"; // add w0, w0, 0x7FF
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OK(uc_mem_write(uc, code_start, patch_code, sizeof(patch_code) - 1));
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OK(uc_ctl_remove_cache(uc, code_start,
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code_start + sizeof(patch_code) - 1));
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// zero out x0
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r_x0 = 0x0;
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OK(uc_reg_write(uc, UC_ARM64_REG_X0, &r_x0));
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OK(uc_emu_start(uc, code_start, -1, 0, 1));
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// check value
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OK(uc_reg_read(uc, UC_ARM64_REG_X0, &r_x0));
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TEST_CHECK(r_x0 != 0x1);
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TEST_CHECK(r_x0 == 0x7ff);
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OK(uc_close(uc));
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}
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static void test_arm64_v8_pac(void)
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{
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uc_engine *uc;
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char code[] = "\x28\xfd\xea\xc8"; // casal x10, x8, [x9]
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uint64_t r_x9, r_x8, mem;
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uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1,
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UC_CPU_ARM64_MAX);
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OK(uc_mem_map(uc, 0x40000, 0x1000, UC_PROT_ALL));
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OK(uc_mem_write(uc, 0x40000, "\x00\x00\x00\x00\x00\x00\x00\x00", 8));
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r_x9 = 0x40000;
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OK(uc_reg_write(uc, UC_ARM64_REG_X9, &r_x9));
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r_x8 = 0xdeadbeafdeadbeaf;
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OK(uc_reg_write(uc, UC_ARM64_REG_X8, &r_x8));
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_mem_read(uc, 0x40000, (void *)&mem, 8));
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TEST_CHECK(LEINT64(mem) == r_x8);
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OK(uc_close(uc));
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}
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static void test_arm64_read_sctlr(void)
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{
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uc_engine *uc;
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uc_arm64_cp_reg reg;
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OK(uc_open(UC_ARCH_ARM64, UC_MODE_LITTLE_ENDIAN | UC_MODE_ARM, &uc));
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// SCTLR_EL1. See arm reference.
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reg.crn = 1;
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reg.crm = 0;
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reg.op0 = 0b11;
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reg.op1 = 0;
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reg.op2 = 0;
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OK(uc_reg_read(uc, UC_ARM64_REG_CP_REG, ®));
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TEST_CHECK((reg.val >> 58) == 0);
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OK(uc_close(uc));
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}
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static uint32_t test_arm64_mrs_hook_cb(uc_engine *uc, uc_arm64_reg reg,
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const uc_arm64_cp_reg *cp_reg)
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{
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uint64_t r_x2 = 0x114514;
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OK(uc_reg_write(uc, reg, &r_x2));
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// Skip
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return 1;
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}
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static void test_arm64_mrs_hook(void)
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{
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uc_engine *uc;
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uc_hook hk;
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uint64_t r_x2;
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// mrs x2, tpidrro_el0
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char code[] = "\x62\xd0\x3b\xd5";
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uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_LITTLE_ENDIAN | UC_MODE_ARM,
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code, sizeof(code) - 1, UC_CPU_ARM64_A72);
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OK(uc_hook_add(uc, &hk, UC_HOOK_INSN, (void *)test_arm64_mrs_hook_cb, NULL,
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1, 0, UC_ARM64_INS_MRS));
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_reg_read(uc, UC_ARM64_REG_X2, &r_x2));
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TEST_CHECK(r_x2 == 0x114514);
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OK(uc_hook_del(uc, hk));
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OK(uc_close(uc));
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}
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static bool test_arm64_correct_address_in_small_jump_hook_callback(
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uc_engine *uc, int type, uint64_t address, int size, int64_t value,
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void *user_data)
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{
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// Check registers
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uint64_t r_x0 = 0x0;
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uint64_t r_pc = 0x0;
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OK(uc_reg_read(uc, UC_ARM64_REG_X0, &r_x0));
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OK(uc_reg_read(uc, UC_ARM64_REG_PC, &r_pc));
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TEST_CHECK(r_x0 == 0x7F00);
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TEST_CHECK(r_pc == 0x7F00);
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// Check address
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// printf("%lx\n", address);
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TEST_CHECK(address == 0x7F00);
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return false;
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}
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static void test_arm64_correct_address_in_small_jump_hook(void)
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{
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uc_engine *uc;
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// mov x0, 0x7F00;
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// br x0
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char code[] = "\x00\xe0\x8f\xd2\x00\x00\x1f\xd6";
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uint64_t r_x0 = 0x0;
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uint64_t r_pc = 0x0;
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uc_hook hook;
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uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1,
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UC_CPU_ARM64_A72);
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OK(uc_hook_add(uc, &hook, UC_HOOK_MEM_UNMAPPED,
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test_arm64_correct_address_in_small_jump_hook_callback, NULL,
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1, 0));
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uc_assert_err(
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UC_ERR_FETCH_UNMAPPED,
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uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_reg_read(uc, UC_ARM64_REG_X0, &r_x0));
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OK(uc_reg_read(uc, UC_ARM64_REG_PC, &r_pc));
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TEST_CHECK(r_x0 == 0x7F00);
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TEST_CHECK(r_pc == 0x7F00);
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OK(uc_close(uc));
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}
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static bool test_arm64_correct_address_in_long_jump_hook_callback(
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uc_engine *uc, int type, uint64_t address, int size, int64_t value,
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void *user_data)
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{
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// Check registers
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uint64_t r_x0 = 0x0;
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uint64_t r_pc = 0x0;
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OK(uc_reg_read(uc, UC_ARM64_REG_X0, &r_x0));
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OK(uc_reg_read(uc, UC_ARM64_REG_PC, &r_pc));
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TEST_CHECK(r_x0 == 0x7FFFFFFFFFFFFF00);
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TEST_CHECK(r_pc == 0x7FFFFFFFFFFFFF00);
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// Check address
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// printf("%lx\n", address);
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TEST_CHECK(address == 0x7FFFFFFFFFFFFF00);
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return false;
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}
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static void test_arm64_correct_address_in_long_jump_hook(void)
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{
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uc_engine *uc;
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// mov x0, 0x7FFFFFFFFFFFFF00;
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// br x0
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char code[] = "\xe0\xdb\x78\xb2\x00\x00\x1f\xd6";
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uint64_t r_x0 = 0x0;
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uint64_t r_pc = 0x0;
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uc_hook hook;
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uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1,
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UC_CPU_ARM64_A72);
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OK(uc_hook_add(uc, &hook, UC_HOOK_MEM_UNMAPPED,
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test_arm64_correct_address_in_long_jump_hook_callback, NULL,
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1, 0));
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uc_assert_err(
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UC_ERR_FETCH_UNMAPPED,
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uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_reg_read(uc, UC_ARM64_REG_X0, &r_x0));
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OK(uc_reg_read(uc, UC_ARM64_REG_PC, &r_pc));
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TEST_CHECK(r_x0 == 0x7FFFFFFFFFFFFF00);
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TEST_CHECK(r_pc == 0x7FFFFFFFFFFFFF00);
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OK(uc_close(uc));
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}
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static void test_arm64_block_sync_pc_cb(uc_engine *uc, uint64_t addr,
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uint32_t size, void *data)
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{
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uint64_t val = code_start;
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bool first = *(bool *)data;
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if (first) {
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OK(uc_reg_write(uc, UC_ARM64_REG_PC, (void *)&val));
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*(bool *)data = false;
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}
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}
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static void test_arm64_block_sync_pc(void)
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{
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uc_engine *uc;
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// add x0, x0, #1234;bl t;t:mov x1, #5678;
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const char code[] = "\x00\x48\x13\x91\x01\x00\x00\x94\xc1\xc5\x82\xd2";
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uc_hook hk;
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uint64_t x0;
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bool data = true;
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uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1,
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UC_CPU_ARM64_A72);
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OK(uc_hook_add(uc, &hk, UC_HOOK_BLOCK, test_arm64_block_sync_pc_cb,
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(void *)&data, code_start + 8, code_start + 12));
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x0 = 0;
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OK(uc_reg_write(uc, UC_ARM64_REG_X0, (void *)&x0));
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_reg_read(uc, UC_ARM64_REG_X0, (void *)&x0));
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TEST_CHECK(x0 == (1234 * 2));
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OK(uc_hook_del(uc, hk));
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OK(uc_close(uc));
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}
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static bool
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test_arm64_block_invalid_mem_read_write_sync_cb(uc_engine *uc, int type,
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uint64_t address, int size,
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int64_t value, void *user_data)
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{
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return 0;
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}
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static void test_arm64_block_invalid_mem_read_write_sync(void)
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{
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uc_engine *uc;
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// mov x0, #1
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// mov x1, #2
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// ldr x0, [x1]
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const char code[] = "\x20\x00\x80\xd2\x41\x00\x80\xd2\x20\x00\x40\xf9";
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uint64_t r_pc, r_x0, r_x1;
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uc_hook hk;
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uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1,
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UC_CPU_ARM64_A72);
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OK(uc_hook_add(uc, &hk, UC_HOOK_MEM_READ,
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test_arm64_block_invalid_mem_read_write_sync_cb, NULL, 1,
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0));
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uc_assert_err(
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UC_ERR_READ_UNMAPPED,
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uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_reg_read(uc, UC_ARM64_REG_PC, &r_pc));
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OK(uc_reg_read(uc, UC_ARM64_REG_X0, &r_x0));
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OK(uc_reg_read(uc, UC_ARM64_REG_X1, &r_x1));
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TEST_CHECK(r_pc == code_start + 8);
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TEST_CHECK(r_x0 == 1);
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TEST_CHECK(r_x1 == 2);
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OK(uc_close(uc));
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}
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static void test_arm64_mmu(void)
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{
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uc_engine *uc;
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char *data;
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char tlbe[8];
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uint64_t x0, x1, x2;
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/*
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* Not exact the binary, but aarch64-linux-gnu-as generate this code and
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reference sometimes data after ttb0_base.
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* // Read data from physical address
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* ldr X0, =0x40000000
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* ldr X1, [X0]
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* // Initialize translation table control registers
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* ldr X0, =0x180803F20
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* msr TCR_EL1, X0
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* ldr X0, =0xFFFFFFFF
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* msr MAIR_EL1, X0
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* // Set translation table
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* adr X0, ttb0_base
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* msr TTBR0_EL1, X0
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* // Enable caches and the MMU
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* mrs X0, SCTLR_EL1
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* orr X0, X0, #(0x1 << 2) // The C bit (data cache).
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* orr X0, X0, #(0x1 << 12) // The I bit (instruction cache)
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* orr X0, X0, #0x1 // The M bit (MMU).
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* msr SCTLR_EL1, X0
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* dsb SY
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* isb
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* // Read the same memory area through virtual address
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* ldr X0, =0x80000000
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* ldr X2, [X0]
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*
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* // Stop
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* b .
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*/
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char code[] = "\x00\x81\x00\x58\x01\x00\x40\xf9\x00\x81\x00\x58\x40\x20\x18"
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"\xd5\x00\x81\x00\x58\x00\xa2\x18\xd5\x40\x7f\x00\x10\x00\x20"
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"\x18\xd5\x00\x10\x38\xd5\x00\x00\x7e\xb2\x00\x00\x74\xb2\x00"
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"\x00\x40\xb2\x00\x10\x18\xd5\x9f\x3f\x03\xd5\xdf\x3f\x03\xd5"
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"\xe0\x7f\x00\x58\x02\x00\x40\xf9\x00\x00\x00\x14\x1f\x20\x03"
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"\xd5\x1f\x20\x03\xd5\x1F\x20\x03\xD5\x1F\x20\x03\xD5";
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data = malloc(0x1000);
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TEST_CHECK(data != NULL);
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OK(uc_open(UC_ARCH_ARM64, UC_MODE_ARM, &uc));
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OK(uc_ctl_tlb_mode(uc, UC_TLB_CPU));
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OK(uc_mem_map(uc, 0, 0x2000, UC_PROT_ALL));
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OK(uc_mem_write(uc, 0, code, sizeof(code) - 1));
|
|
|
|
// generate tlb entries
|
|
tlbe[0] = 0x41;
|
|
tlbe[1] = 0x07;
|
|
tlbe[2] = 0;
|
|
tlbe[3] = 0;
|
|
tlbe[4] = 0;
|
|
tlbe[5] = 0;
|
|
tlbe[6] = 0;
|
|
tlbe[7] = 0;
|
|
OK(uc_mem_write(uc, 0x1000, tlbe, sizeof(tlbe)));
|
|
tlbe[3] = 0x40;
|
|
OK(uc_mem_write(uc, 0x1008, tlbe, sizeof(tlbe)));
|
|
OK(uc_mem_write(uc, 0x1010, tlbe, sizeof(tlbe)));
|
|
OK(uc_mem_write(uc, 0x1018, tlbe, sizeof(tlbe)));
|
|
|
|
// mentioned data referenced by the asm generated my aarch64-linux-gnu-as
|
|
tlbe[0] = 0;
|
|
tlbe[1] = 0;
|
|
OK(uc_mem_write(uc, 0x1020, tlbe, sizeof(tlbe)));
|
|
tlbe[0] = 0x20;
|
|
tlbe[1] = 0x3f;
|
|
tlbe[2] = 0x80;
|
|
tlbe[3] = 0x80;
|
|
tlbe[4] = 0x1;
|
|
OK(uc_mem_write(uc, 0x1028, tlbe, sizeof(tlbe)));
|
|
tlbe[0] = 0xff;
|
|
tlbe[1] = 0xff;
|
|
tlbe[2] = 0xff;
|
|
tlbe[3] = 0xff;
|
|
tlbe[4] = 0x00;
|
|
OK(uc_mem_write(uc, 0x1030, tlbe, sizeof(tlbe)));
|
|
tlbe[0] = 0x00;
|
|
tlbe[1] = 0x00;
|
|
tlbe[2] = 0x00;
|
|
tlbe[3] = 0x80;
|
|
OK(uc_mem_write(uc, 0x1038, tlbe, sizeof(tlbe)));
|
|
|
|
for (size_t i = 0; i < 0x1000; i++) {
|
|
data[i] = 0x44;
|
|
}
|
|
OK(uc_mem_map_ptr(uc, 0x40000000, 0x1000, UC_PROT_READ, data));
|
|
|
|
OK(uc_emu_start(uc, 0, 0x44, 0, 0));
|
|
OK(uc_reg_read(uc, UC_ARM64_REG_X0, &x0));
|
|
OK(uc_reg_read(uc, UC_ARM64_REG_X1, &x1));
|
|
OK(uc_reg_read(uc, UC_ARM64_REG_X2, &x2));
|
|
|
|
TEST_CHECK(x0 == 0x80000000);
|
|
TEST_CHECK(x1 == 0x4444444444444444);
|
|
TEST_CHECK(x2 == 0x4444444444444444);
|
|
free(data);
|
|
}
|
|
|
|
static void test_arm64_pc_wrap(void)
|
|
{
|
|
uc_engine *uc;
|
|
// add x1 x2
|
|
char add_x1_x2[] = "\x20\x00\x02\x8b";
|
|
// add x1 x3
|
|
char add_x1_x3[] = "\x20\x00\x03\x8b";
|
|
uint64_t x0, x1, x2, x3;
|
|
uint64_t pc = 0xFFFFFFFFFFFFFFFCULL;
|
|
uint64_t page = 0xFFFFFFFFFFFFF000ULL;
|
|
|
|
OK(uc_open(UC_ARCH_ARM64, UC_MODE_ARM, &uc));
|
|
OK(uc_mem_map(uc, page, 4096, UC_PROT_READ | UC_PROT_EXEC));
|
|
OK(uc_mem_write(uc, pc, add_x1_x2, sizeof(add_x1_x2) - 1));
|
|
|
|
x1 = 1;
|
|
x2 = 2;
|
|
OK(uc_reg_write(uc, UC_ARM64_REG_X1, &x1));
|
|
OK(uc_reg_write(uc, UC_ARM64_REG_X2, &x2));
|
|
|
|
OK(uc_emu_start(uc, pc, pc + 4, 0, 1));
|
|
|
|
OK(uc_mem_unmap(uc, page, 4096));
|
|
|
|
OK(uc_reg_read(uc, UC_ARM64_REG_X0, &x0));
|
|
|
|
TEST_CHECK((x0 == 1 + 2));
|
|
|
|
OK(uc_mem_map(uc, page, 4096, UC_PROT_READ | UC_PROT_EXEC));
|
|
OK(uc_mem_write(uc, pc, add_x1_x3, sizeof(add_x1_x3) - 1));
|
|
|
|
x1 = 5;
|
|
x2 = 0;
|
|
x3 = 5;
|
|
OK(uc_reg_write(uc, UC_ARM64_REG_X1, &x1));
|
|
OK(uc_reg_write(uc, UC_ARM64_REG_X2, &x2));
|
|
OK(uc_reg_write(uc, UC_ARM64_REG_X3, &x3));
|
|
|
|
OK(uc_emu_start(uc, pc, pc + 4, 0, 1));
|
|
|
|
OK(uc_mem_unmap(uc, page, 4096));
|
|
|
|
OK(uc_reg_read(uc, UC_ARM64_REG_X0, &x0));
|
|
|
|
TEST_CHECK((x0 == 5 + 5));
|
|
|
|
OK(uc_close(uc));
|
|
}
|
|
|
|
TEST_LIST = {{"test_arm64_until", test_arm64_until},
|
|
{"test_arm64_code_patching", test_arm64_code_patching},
|
|
{"test_arm64_code_patching_count", test_arm64_code_patching_count},
|
|
{"test_arm64_v8_pac", test_arm64_v8_pac},
|
|
{"test_arm64_read_sctlr", test_arm64_read_sctlr},
|
|
{"test_arm64_mrs_hook", test_arm64_mrs_hook},
|
|
{"test_arm64_correct_address_in_small_jump_hook",
|
|
test_arm64_correct_address_in_small_jump_hook},
|
|
{"test_arm64_correct_address_in_long_jump_hook",
|
|
test_arm64_correct_address_in_long_jump_hook},
|
|
{"test_arm64_block_sync_pc", test_arm64_block_sync_pc},
|
|
{"test_arm64_block_invalid_mem_read_write_sync",
|
|
test_arm64_block_invalid_mem_read_write_sync},
|
|
{"test_arm64_mmu", test_arm64_mmu},
|
|
{"test_arm64_pc_wrap", test_arm64_pc_wrap},
|
|
{NULL, NULL}};
|