3018 lines
152 KiB
C
3018 lines
152 KiB
C
/* This file is autogenerated by scripts/decodetree.py. */
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typedef struct {
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int cond;
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int imm;
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} arg_ci;
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typedef struct {
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int rd;
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int sysm;
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} arg_disas_t3227;
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typedef struct {
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int mask;
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int rn;
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int sysm;
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} arg_disas_t3228;
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typedef struct {
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int A;
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int T;
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int rd;
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int rn;
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} arg_disas_t3230;
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typedef struct {
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int imm;
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int p;
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int rn;
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int rt;
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int rt2;
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int u;
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int w;
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} arg_ldst_ri2;
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typedef struct {
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int rm;
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int rn;
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} arg_tbranch;
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#ifdef CONFIG_PRAGMA_DIAGNOSTIC_AVAILABLE
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# pragma GCC diagnostic push
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# pragma GCC diagnostic ignored "-Wredundant-decls"
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# ifdef __clang__
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# pragma GCC diagnostic ignored "-Wtypedef-redefinition"
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# endif
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#endif
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typedef arg_s_rrr_shi arg_TST_xrri;
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static bool trans_TST_xrri(DisasContext *ctx, arg_TST_xrri *a);
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typedef arg_s_rrr_shi arg_AND_rrri;
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static bool trans_AND_rrri(DisasContext *ctx, arg_AND_rrri *a);
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typedef arg_s_rrr_shi arg_BIC_rrri;
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static bool trans_BIC_rrri(DisasContext *ctx, arg_BIC_rrri *a);
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typedef arg_s_rrr_shi arg_MOV_rxri;
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static bool trans_MOV_rxri(DisasContext *ctx, arg_MOV_rxri *a);
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typedef arg_s_rrr_shi arg_ORR_rrri;
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static bool trans_ORR_rrri(DisasContext *ctx, arg_ORR_rrri *a);
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typedef arg_s_rrr_shi arg_MVN_rxri;
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static bool trans_MVN_rxri(DisasContext *ctx, arg_MVN_rxri *a);
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typedef arg_s_rrr_shi arg_ORN_rrri;
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static bool trans_ORN_rrri(DisasContext *ctx, arg_ORN_rrri *a);
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typedef arg_s_rrr_shi arg_TEQ_xrri;
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static bool trans_TEQ_xrri(DisasContext *ctx, arg_TEQ_xrri *a);
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typedef arg_s_rrr_shi arg_EOR_rrri;
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static bool trans_EOR_rrri(DisasContext *ctx, arg_EOR_rrri *a);
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typedef arg_pkh arg_PKH;
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static bool trans_PKH(DisasContext *ctx, arg_PKH *a);
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typedef arg_s_rrr_shi arg_CMN_xrri;
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static bool trans_CMN_xrri(DisasContext *ctx, arg_CMN_xrri *a);
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typedef arg_s_rrr_shi arg_ADD_rrri;
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static bool trans_ADD_rrri(DisasContext *ctx, arg_ADD_rrri *a);
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typedef arg_s_rrr_shi arg_ADC_rrri;
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static bool trans_ADC_rrri(DisasContext *ctx, arg_ADC_rrri *a);
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typedef arg_s_rrr_shi arg_SBC_rrri;
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static bool trans_SBC_rrri(DisasContext *ctx, arg_SBC_rrri *a);
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typedef arg_s_rrr_shi arg_CMP_xrri;
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static bool trans_CMP_xrri(DisasContext *ctx, arg_CMP_xrri *a);
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typedef arg_s_rrr_shi arg_SUB_rrri;
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static bool trans_SUB_rrri(DisasContext *ctx, arg_SUB_rrri *a);
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typedef arg_s_rrr_shi arg_RSB_rrri;
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static bool trans_RSB_rrri(DisasContext *ctx, arg_RSB_rrri *a);
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typedef arg_s_rrr_shr arg_MOV_rxrr;
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static bool trans_MOV_rxrr(DisasContext *ctx, arg_MOV_rxrr *a);
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typedef arg_s_rri_rot arg_TST_xri;
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static bool trans_TST_xri(DisasContext *ctx, arg_TST_xri *a);
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typedef arg_s_rri_rot arg_AND_rri;
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static bool trans_AND_rri(DisasContext *ctx, arg_AND_rri *a);
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typedef arg_s_rri_rot arg_BIC_rri;
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static bool trans_BIC_rri(DisasContext *ctx, arg_BIC_rri *a);
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typedef arg_s_rri_rot arg_MOV_rxi;
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static bool trans_MOV_rxi(DisasContext *ctx, arg_MOV_rxi *a);
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typedef arg_s_rri_rot arg_ORR_rri;
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static bool trans_ORR_rri(DisasContext *ctx, arg_ORR_rri *a);
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typedef arg_s_rri_rot arg_MVN_rxi;
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static bool trans_MVN_rxi(DisasContext *ctx, arg_MVN_rxi *a);
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typedef arg_s_rri_rot arg_ORN_rri;
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static bool trans_ORN_rri(DisasContext *ctx, arg_ORN_rri *a);
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typedef arg_s_rri_rot arg_TEQ_xri;
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static bool trans_TEQ_xri(DisasContext *ctx, arg_TEQ_xri *a);
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typedef arg_s_rri_rot arg_EOR_rri;
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static bool trans_EOR_rri(DisasContext *ctx, arg_EOR_rri *a);
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typedef arg_s_rri_rot arg_CMN_xri;
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static bool trans_CMN_xri(DisasContext *ctx, arg_CMN_xri *a);
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typedef arg_s_rri_rot arg_ADD_rri;
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static bool trans_ADD_rri(DisasContext *ctx, arg_ADD_rri *a);
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typedef arg_s_rri_rot arg_ADC_rri;
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static bool trans_ADC_rri(DisasContext *ctx, arg_ADC_rri *a);
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typedef arg_s_rri_rot arg_SBC_rri;
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static bool trans_SBC_rri(DisasContext *ctx, arg_SBC_rri *a);
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typedef arg_s_rri_rot arg_CMP_xri;
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static bool trans_CMP_xri(DisasContext *ctx, arg_CMP_xri *a);
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typedef arg_s_rri_rot arg_SUB_rri;
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static bool trans_SUB_rri(DisasContext *ctx, arg_SUB_rri *a);
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typedef arg_s_rri_rot arg_RSB_rri;
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static bool trans_RSB_rri(DisasContext *ctx, arg_RSB_rri *a);
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typedef arg_ri arg_ADR;
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static bool trans_ADR(DisasContext *ctx, arg_ADR *a);
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typedef arg_ri arg_MOVW;
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static bool trans_MOVW(DisasContext *ctx, arg_MOVW *a);
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typedef arg_ri arg_MOVT;
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static bool trans_MOVT(DisasContext *ctx, arg_MOVT *a);
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typedef arg_sat arg_SSAT16;
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static bool trans_SSAT16(DisasContext *ctx, arg_SSAT16 *a);
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typedef arg_sat arg_SSAT;
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static bool trans_SSAT(DisasContext *ctx, arg_SSAT *a);
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typedef arg_sat arg_USAT16;
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static bool trans_USAT16(DisasContext *ctx, arg_USAT16 *a);
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typedef arg_sat arg_USAT;
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static bool trans_USAT(DisasContext *ctx, arg_USAT *a);
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typedef arg_bfx arg_SBFX;
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static bool trans_SBFX(DisasContext *ctx, arg_SBFX *a);
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typedef arg_bfx arg_UBFX;
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static bool trans_UBFX(DisasContext *ctx, arg_UBFX *a);
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typedef arg_bfi arg_BFCI;
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static bool trans_BFCI(DisasContext *ctx, arg_BFCI *a);
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typedef arg_s_rrrr arg_MUL;
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static bool trans_MUL(DisasContext *ctx, arg_MUL *a);
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typedef arg_s_rrrr arg_MLA;
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static bool trans_MLA(DisasContext *ctx, arg_MLA *a);
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typedef arg_rrrr arg_MLS;
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static bool trans_MLS(DisasContext *ctx, arg_MLS *a);
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typedef arg_s_rrrr arg_SMULL;
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static bool trans_SMULL(DisasContext *ctx, arg_SMULL *a);
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typedef arg_s_rrrr arg_UMULL;
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static bool trans_UMULL(DisasContext *ctx, arg_UMULL *a);
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typedef arg_s_rrrr arg_SMLAL;
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static bool trans_SMLAL(DisasContext *ctx, arg_SMLAL *a);
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typedef arg_s_rrrr arg_UMLAL;
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static bool trans_UMLAL(DisasContext *ctx, arg_UMLAL *a);
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typedef arg_rrrr arg_UMAAL;
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static bool trans_UMAAL(DisasContext *ctx, arg_UMAAL *a);
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typedef arg_rrrr arg_SMULWB;
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static bool trans_SMULWB(DisasContext *ctx, arg_SMULWB *a);
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typedef arg_rrrr arg_SMLAWB;
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static bool trans_SMLAWB(DisasContext *ctx, arg_SMLAWB *a);
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typedef arg_rrrr arg_SMULWT;
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static bool trans_SMULWT(DisasContext *ctx, arg_SMULWT *a);
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typedef arg_rrrr arg_SMLAWT;
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static bool trans_SMLAWT(DisasContext *ctx, arg_SMLAWT *a);
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typedef arg_rrrr arg_SMULBB;
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static bool trans_SMULBB(DisasContext *ctx, arg_SMULBB *a);
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typedef arg_rrrr arg_SMLABB;
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static bool trans_SMLABB(DisasContext *ctx, arg_SMLABB *a);
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typedef arg_rrrr arg_SMULBT;
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static bool trans_SMULBT(DisasContext *ctx, arg_SMULBT *a);
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typedef arg_rrrr arg_SMLABT;
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static bool trans_SMLABT(DisasContext *ctx, arg_SMLABT *a);
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typedef arg_rrrr arg_SMULTB;
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static bool trans_SMULTB(DisasContext *ctx, arg_SMULTB *a);
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typedef arg_rrrr arg_SMLATB;
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static bool trans_SMLATB(DisasContext *ctx, arg_SMLATB *a);
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typedef arg_rrrr arg_SMULTT;
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static bool trans_SMULTT(DisasContext *ctx, arg_SMULTT *a);
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typedef arg_rrrr arg_SMLATT;
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static bool trans_SMLATT(DisasContext *ctx, arg_SMLATT *a);
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typedef arg_rrrr arg_SMLALBB;
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static bool trans_SMLALBB(DisasContext *ctx, arg_SMLALBB *a);
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typedef arg_rrrr arg_SMLALBT;
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static bool trans_SMLALBT(DisasContext *ctx, arg_SMLALBT *a);
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typedef arg_rrrr arg_SMLALTB;
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static bool trans_SMLALTB(DisasContext *ctx, arg_SMLALTB *a);
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typedef arg_rrrr arg_SMLALTT;
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static bool trans_SMLALTT(DisasContext *ctx, arg_SMLALTT *a);
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typedef arg_rrrr arg_USADA8;
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static bool trans_USADA8(DisasContext *ctx, arg_USADA8 *a);
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typedef arg_rrrr arg_SMLAD;
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static bool trans_SMLAD(DisasContext *ctx, arg_SMLAD *a);
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typedef arg_rrrr arg_SMLADX;
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static bool trans_SMLADX(DisasContext *ctx, arg_SMLADX *a);
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typedef arg_rrrr arg_SMLSD;
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static bool trans_SMLSD(DisasContext *ctx, arg_SMLSD *a);
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typedef arg_rrrr arg_SMLSDX;
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static bool trans_SMLSDX(DisasContext *ctx, arg_SMLSDX *a);
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typedef arg_rrrr arg_SMLALD;
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static bool trans_SMLALD(DisasContext *ctx, arg_SMLALD *a);
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typedef arg_rrrr arg_SMLALDX;
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static bool trans_SMLALDX(DisasContext *ctx, arg_SMLALDX *a);
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typedef arg_rrrr arg_SMLSLD;
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static bool trans_SMLSLD(DisasContext *ctx, arg_SMLSLD *a);
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typedef arg_rrrr arg_SMLSLDX;
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static bool trans_SMLSLDX(DisasContext *ctx, arg_SMLSLDX *a);
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typedef arg_rrrr arg_SMMLA;
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static bool trans_SMMLA(DisasContext *ctx, arg_SMMLA *a);
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typedef arg_rrrr arg_SMMLAR;
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static bool trans_SMMLAR(DisasContext *ctx, arg_SMMLAR *a);
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typedef arg_rrrr arg_SMMLS;
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static bool trans_SMMLS(DisasContext *ctx, arg_SMMLS *a);
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typedef arg_rrrr arg_SMMLSR;
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static bool trans_SMMLSR(DisasContext *ctx, arg_SMMLSR *a);
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typedef arg_rrr arg_SDIV;
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static bool trans_SDIV(DisasContext *ctx, arg_SDIV *a);
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typedef arg_rrr arg_UDIV;
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static bool trans_UDIV(DisasContext *ctx, arg_UDIV *a);
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typedef arg_rrr arg_QADD;
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static bool trans_QADD(DisasContext *ctx, arg_QADD *a);
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typedef arg_rrr arg_QSUB;
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static bool trans_QSUB(DisasContext *ctx, arg_QSUB *a);
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typedef arg_rrr arg_QDADD;
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static bool trans_QDADD(DisasContext *ctx, arg_QDADD *a);
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typedef arg_rrr arg_QDSUB;
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static bool trans_QDSUB(DisasContext *ctx, arg_QDSUB *a);
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typedef arg_rrr arg_CRC32B;
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static bool trans_CRC32B(DisasContext *ctx, arg_CRC32B *a);
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typedef arg_rrr arg_CRC32H;
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static bool trans_CRC32H(DisasContext *ctx, arg_CRC32H *a);
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typedef arg_rrr arg_CRC32W;
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static bool trans_CRC32W(DisasContext *ctx, arg_CRC32W *a);
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typedef arg_rrr arg_CRC32CB;
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static bool trans_CRC32CB(DisasContext *ctx, arg_CRC32CB *a);
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typedef arg_rrr arg_CRC32CH;
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static bool trans_CRC32CH(DisasContext *ctx, arg_CRC32CH *a);
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typedef arg_rrr arg_CRC32CW;
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static bool trans_CRC32CW(DisasContext *ctx, arg_CRC32CW *a);
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typedef arg_rrr arg_SEL;
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static bool trans_SEL(DisasContext *ctx, arg_SEL *a);
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typedef arg_rr arg_REV;
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static bool trans_REV(DisasContext *ctx, arg_REV *a);
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typedef arg_rr arg_REV16;
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static bool trans_REV16(DisasContext *ctx, arg_REV16 *a);
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typedef arg_rr arg_RBIT;
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static bool trans_RBIT(DisasContext *ctx, arg_RBIT *a);
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typedef arg_rr arg_REVSH;
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static bool trans_REVSH(DisasContext *ctx, arg_REVSH *a);
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typedef arg_rr arg_CLZ;
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static bool trans_CLZ(DisasContext *ctx, arg_CLZ *a);
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typedef arg_empty arg_YIELD;
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static bool trans_YIELD(DisasContext *ctx, arg_YIELD *a);
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typedef arg_empty arg_WFE;
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static bool trans_WFE(DisasContext *ctx, arg_WFE *a);
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typedef arg_empty arg_WFI;
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static bool trans_WFI(DisasContext *ctx, arg_WFI *a);
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typedef arg_empty arg_NOP;
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static bool trans_NOP(DisasContext *ctx, arg_NOP *a);
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typedef arg_cps arg_CPS;
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static bool trans_CPS(DisasContext *ctx, arg_CPS *a);
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typedef arg_empty arg_CLREX;
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static bool trans_CLREX(DisasContext *ctx, arg_CLREX *a);
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typedef arg_empty arg_DSB;
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static bool trans_DSB(DisasContext *ctx, arg_DSB *a);
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typedef arg_empty arg_DMB;
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static bool trans_DMB(DisasContext *ctx, arg_DMB *a);
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typedef arg_empty arg_ISB;
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static bool trans_ISB(DisasContext *ctx, arg_ISB *a);
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typedef arg_empty arg_SB;
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static bool trans_SB(DisasContext *ctx, arg_SB *a);
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typedef arg_mrs_bank arg_MRS_bank;
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static bool trans_MRS_bank(DisasContext *ctx, arg_MRS_bank *a);
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typedef arg_mrs_reg arg_MRS_reg;
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static bool trans_MRS_reg(DisasContext *ctx, arg_MRS_reg *a);
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typedef arg_disas_t3227 arg_MRS_v7m;
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static bool trans_MRS_v7m(DisasContext *ctx, arg_MRS_v7m *a);
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typedef arg_msr_bank arg_MSR_bank;
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static bool trans_MSR_bank(DisasContext *ctx, arg_MSR_bank *a);
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typedef arg_msr_reg arg_MSR_reg;
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static bool trans_MSR_reg(DisasContext *ctx, arg_MSR_reg *a);
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typedef arg_disas_t3228 arg_MSR_v7m;
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static bool trans_MSR_v7m(DisasContext *ctx, arg_MSR_v7m *a);
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typedef arg_r arg_BXJ;
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static bool trans_BXJ(DisasContext *ctx, arg_BXJ *a);
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typedef arg_empty arg_ERET;
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static bool trans_ERET(DisasContext *ctx, arg_ERET *a);
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typedef arg_i arg_SMC;
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static bool trans_SMC(DisasContext *ctx, arg_SMC *a);
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typedef arg_i arg_HVC;
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static bool trans_HVC(DisasContext *ctx, arg_HVC *a);
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typedef arg_empty arg_UDF;
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static bool trans_UDF(DisasContext *ctx, arg_UDF *a);
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typedef arg_ci arg_B_cond_thumb;
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static bool trans_B_cond_thumb(DisasContext *ctx, arg_B_cond_thumb *a);
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typedef arg_ldst_rr arg_STRB_rr;
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static bool trans_STRB_rr(DisasContext *ctx, arg_STRB_rr *a);
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typedef arg_ldst_ri arg_STRB_ri;
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static bool trans_STRB_ri(DisasContext *ctx, arg_STRB_ri *a);
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typedef arg_ldst_ri arg_STRBT_ri;
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static bool trans_STRBT_ri(DisasContext *ctx, arg_STRBT_ri *a);
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typedef arg_ldst_rr arg_STRH_rr;
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static bool trans_STRH_rr(DisasContext *ctx, arg_STRH_rr *a);
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typedef arg_ldst_ri arg_STRH_ri;
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static bool trans_STRH_ri(DisasContext *ctx, arg_STRH_ri *a);
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typedef arg_ldst_ri arg_STRHT_ri;
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static bool trans_STRHT_ri(DisasContext *ctx, arg_STRHT_ri *a);
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typedef arg_ldst_rr arg_STR_rr;
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static bool trans_STR_rr(DisasContext *ctx, arg_STR_rr *a);
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typedef arg_ldst_ri arg_STR_ri;
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static bool trans_STR_ri(DisasContext *ctx, arg_STR_ri *a);
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typedef arg_ldst_ri arg_STRT_ri;
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static bool trans_STRT_ri(DisasContext *ctx, arg_STRT_ri *a);
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typedef arg_ldst_ri arg_LDRB_ri;
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static bool trans_LDRB_ri(DisasContext *ctx, arg_LDRB_ri *a);
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typedef arg_ldst_ri arg_LDRBT_ri;
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static bool trans_LDRBT_ri(DisasContext *ctx, arg_LDRBT_ri *a);
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typedef arg_ldst_rr arg_LDRB_rr;
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static bool trans_LDRB_rr(DisasContext *ctx, arg_LDRB_rr *a);
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typedef arg_ldst_ri arg_LDRH_ri;
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static bool trans_LDRH_ri(DisasContext *ctx, arg_LDRH_ri *a);
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typedef arg_ldst_ri arg_LDRHT_ri;
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static bool trans_LDRHT_ri(DisasContext *ctx, arg_LDRHT_ri *a);
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typedef arg_ldst_rr arg_LDRH_rr;
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static bool trans_LDRH_rr(DisasContext *ctx, arg_LDRH_rr *a);
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typedef arg_ldst_ri arg_LDR_ri;
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static bool trans_LDR_ri(DisasContext *ctx, arg_LDR_ri *a);
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typedef arg_ldst_ri arg_LDRT_ri;
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static bool trans_LDRT_ri(DisasContext *ctx, arg_LDRT_ri *a);
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typedef arg_ldst_rr arg_LDR_rr;
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static bool trans_LDR_rr(DisasContext *ctx, arg_LDR_rr *a);
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typedef arg_ldst_ri arg_LDRSB_ri;
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static bool trans_LDRSB_ri(DisasContext *ctx, arg_LDRSB_ri *a);
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typedef arg_ldst_ri arg_LDRSBT_ri;
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static bool trans_LDRSBT_ri(DisasContext *ctx, arg_LDRSBT_ri *a);
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typedef arg_ldst_rr arg_LDRSB_rr;
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static bool trans_LDRSB_rr(DisasContext *ctx, arg_LDRSB_rr *a);
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typedef arg_ldst_ri arg_LDRSH_ri;
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static bool trans_LDRSH_ri(DisasContext *ctx, arg_LDRSH_ri *a);
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typedef arg_ldst_ri arg_LDRSHT_ri;
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static bool trans_LDRSHT_ri(DisasContext *ctx, arg_LDRSHT_ri *a);
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typedef arg_ldst_rr arg_LDRSH_rr;
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static bool trans_LDRSH_rr(DisasContext *ctx, arg_LDRSH_rr *a);
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typedef arg_ldst_ri2 arg_STRD_ri_t32;
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static bool trans_STRD_ri_t32(DisasContext *ctx, arg_STRD_ri_t32 *a);
|
|
typedef arg_ldst_ri2 arg_LDRD_ri_t32;
|
|
static bool trans_LDRD_ri_t32(DisasContext *ctx, arg_LDRD_ri_t32 *a);
|
|
typedef arg_empty arg_SG;
|
|
static bool trans_SG(DisasContext *ctx, arg_SG *a);
|
|
typedef arg_disas_t3230 arg_TT;
|
|
static bool trans_TT(DisasContext *ctx, arg_TT *a);
|
|
typedef arg_strex arg_STREX;
|
|
static bool trans_STREX(DisasContext *ctx, arg_STREX *a);
|
|
typedef arg_strex arg_STREXB;
|
|
static bool trans_STREXB(DisasContext *ctx, arg_STREXB *a);
|
|
typedef arg_strex arg_STREXH;
|
|
static bool trans_STREXH(DisasContext *ctx, arg_STREXH *a);
|
|
typedef arg_strex arg_STREXD_t32;
|
|
static bool trans_STREXD_t32(DisasContext *ctx, arg_STREXD_t32 *a);
|
|
typedef arg_strex arg_STLEX;
|
|
static bool trans_STLEX(DisasContext *ctx, arg_STLEX *a);
|
|
typedef arg_strex arg_STLEXB;
|
|
static bool trans_STLEXB(DisasContext *ctx, arg_STLEXB *a);
|
|
typedef arg_strex arg_STLEXH;
|
|
static bool trans_STLEXH(DisasContext *ctx, arg_STLEXH *a);
|
|
typedef arg_strex arg_STLEXD_t32;
|
|
static bool trans_STLEXD_t32(DisasContext *ctx, arg_STLEXD_t32 *a);
|
|
typedef arg_ldrex arg_STL;
|
|
static bool trans_STL(DisasContext *ctx, arg_STL *a);
|
|
typedef arg_ldrex arg_STLB;
|
|
static bool trans_STLB(DisasContext *ctx, arg_STLB *a);
|
|
typedef arg_ldrex arg_STLH;
|
|
static bool trans_STLH(DisasContext *ctx, arg_STLH *a);
|
|
typedef arg_ldrex arg_LDREX;
|
|
static bool trans_LDREX(DisasContext *ctx, arg_LDREX *a);
|
|
typedef arg_ldrex arg_LDREXB;
|
|
static bool trans_LDREXB(DisasContext *ctx, arg_LDREXB *a);
|
|
typedef arg_ldrex arg_LDREXH;
|
|
static bool trans_LDREXH(DisasContext *ctx, arg_LDREXH *a);
|
|
typedef arg_ldrex arg_LDREXD_t32;
|
|
static bool trans_LDREXD_t32(DisasContext *ctx, arg_LDREXD_t32 *a);
|
|
typedef arg_ldrex arg_LDAEX;
|
|
static bool trans_LDAEX(DisasContext *ctx, arg_LDAEX *a);
|
|
typedef arg_ldrex arg_LDAEXB;
|
|
static bool trans_LDAEXB(DisasContext *ctx, arg_LDAEXB *a);
|
|
typedef arg_ldrex arg_LDAEXH;
|
|
static bool trans_LDAEXH(DisasContext *ctx, arg_LDAEXH *a);
|
|
typedef arg_ldrex arg_LDAEXD_t32;
|
|
static bool trans_LDAEXD_t32(DisasContext *ctx, arg_LDAEXD_t32 *a);
|
|
typedef arg_ldrex arg_LDA;
|
|
static bool trans_LDA(DisasContext *ctx, arg_LDA *a);
|
|
typedef arg_ldrex arg_LDAB;
|
|
static bool trans_LDAB(DisasContext *ctx, arg_LDAB *a);
|
|
typedef arg_ldrex arg_LDAH;
|
|
static bool trans_LDAH(DisasContext *ctx, arg_LDAH *a);
|
|
typedef arg_tbranch arg_TBB;
|
|
static bool trans_TBB(DisasContext *ctx, arg_TBB *a);
|
|
typedef arg_tbranch arg_TBH;
|
|
static bool trans_TBH(DisasContext *ctx, arg_TBH *a);
|
|
typedef arg_rrr arg_SADD8;
|
|
static bool trans_SADD8(DisasContext *ctx, arg_SADD8 *a);
|
|
typedef arg_rrr arg_QADD8;
|
|
static bool trans_QADD8(DisasContext *ctx, arg_QADD8 *a);
|
|
typedef arg_rrr arg_SHADD8;
|
|
static bool trans_SHADD8(DisasContext *ctx, arg_SHADD8 *a);
|
|
typedef arg_rrr arg_UADD8;
|
|
static bool trans_UADD8(DisasContext *ctx, arg_UADD8 *a);
|
|
typedef arg_rrr arg_UQADD8;
|
|
static bool trans_UQADD8(DisasContext *ctx, arg_UQADD8 *a);
|
|
typedef arg_rrr arg_UHADD8;
|
|
static bool trans_UHADD8(DisasContext *ctx, arg_UHADD8 *a);
|
|
typedef arg_rrr arg_SADD16;
|
|
static bool trans_SADD16(DisasContext *ctx, arg_SADD16 *a);
|
|
typedef arg_rrr arg_QADD16;
|
|
static bool trans_QADD16(DisasContext *ctx, arg_QADD16 *a);
|
|
typedef arg_rrr arg_SHADD16;
|
|
static bool trans_SHADD16(DisasContext *ctx, arg_SHADD16 *a);
|
|
typedef arg_rrr arg_UADD16;
|
|
static bool trans_UADD16(DisasContext *ctx, arg_UADD16 *a);
|
|
typedef arg_rrr arg_UQADD16;
|
|
static bool trans_UQADD16(DisasContext *ctx, arg_UQADD16 *a);
|
|
typedef arg_rrr arg_UHADD16;
|
|
static bool trans_UHADD16(DisasContext *ctx, arg_UHADD16 *a);
|
|
typedef arg_rrr arg_SASX;
|
|
static bool trans_SASX(DisasContext *ctx, arg_SASX *a);
|
|
typedef arg_rrr arg_QASX;
|
|
static bool trans_QASX(DisasContext *ctx, arg_QASX *a);
|
|
typedef arg_rrr arg_SHASX;
|
|
static bool trans_SHASX(DisasContext *ctx, arg_SHASX *a);
|
|
typedef arg_rrr arg_UASX;
|
|
static bool trans_UASX(DisasContext *ctx, arg_UASX *a);
|
|
typedef arg_rrr arg_UQASX;
|
|
static bool trans_UQASX(DisasContext *ctx, arg_UQASX *a);
|
|
typedef arg_rrr arg_UHASX;
|
|
static bool trans_UHASX(DisasContext *ctx, arg_UHASX *a);
|
|
typedef arg_rrr arg_SSUB8;
|
|
static bool trans_SSUB8(DisasContext *ctx, arg_SSUB8 *a);
|
|
typedef arg_rrr arg_QSUB8;
|
|
static bool trans_QSUB8(DisasContext *ctx, arg_QSUB8 *a);
|
|
typedef arg_rrr arg_SHSUB8;
|
|
static bool trans_SHSUB8(DisasContext *ctx, arg_SHSUB8 *a);
|
|
typedef arg_rrr arg_USUB8;
|
|
static bool trans_USUB8(DisasContext *ctx, arg_USUB8 *a);
|
|
typedef arg_rrr arg_UQSUB8;
|
|
static bool trans_UQSUB8(DisasContext *ctx, arg_UQSUB8 *a);
|
|
typedef arg_rrr arg_UHSUB8;
|
|
static bool trans_UHSUB8(DisasContext *ctx, arg_UHSUB8 *a);
|
|
typedef arg_rrr arg_SSUB16;
|
|
static bool trans_SSUB16(DisasContext *ctx, arg_SSUB16 *a);
|
|
typedef arg_rrr arg_QSUB16;
|
|
static bool trans_QSUB16(DisasContext *ctx, arg_QSUB16 *a);
|
|
typedef arg_rrr arg_SHSUB16;
|
|
static bool trans_SHSUB16(DisasContext *ctx, arg_SHSUB16 *a);
|
|
typedef arg_rrr arg_USUB16;
|
|
static bool trans_USUB16(DisasContext *ctx, arg_USUB16 *a);
|
|
typedef arg_rrr arg_UQSUB16;
|
|
static bool trans_UQSUB16(DisasContext *ctx, arg_UQSUB16 *a);
|
|
typedef arg_rrr arg_UHSUB16;
|
|
static bool trans_UHSUB16(DisasContext *ctx, arg_UHSUB16 *a);
|
|
typedef arg_rrr arg_SSAX;
|
|
static bool trans_SSAX(DisasContext *ctx, arg_SSAX *a);
|
|
typedef arg_rrr arg_QSAX;
|
|
static bool trans_QSAX(DisasContext *ctx, arg_QSAX *a);
|
|
typedef arg_rrr arg_SHSAX;
|
|
static bool trans_SHSAX(DisasContext *ctx, arg_SHSAX *a);
|
|
typedef arg_rrr arg_USAX;
|
|
static bool trans_USAX(DisasContext *ctx, arg_USAX *a);
|
|
typedef arg_rrr arg_UQSAX;
|
|
static bool trans_UQSAX(DisasContext *ctx, arg_UQSAX *a);
|
|
typedef arg_rrr arg_UHSAX;
|
|
static bool trans_UHSAX(DisasContext *ctx, arg_UHSAX *a);
|
|
typedef arg_rrr_rot arg_SXTAH;
|
|
static bool trans_SXTAH(DisasContext *ctx, arg_SXTAH *a);
|
|
typedef arg_rrr_rot arg_UXTAH;
|
|
static bool trans_UXTAH(DisasContext *ctx, arg_UXTAH *a);
|
|
typedef arg_rrr_rot arg_SXTAB16;
|
|
static bool trans_SXTAB16(DisasContext *ctx, arg_SXTAB16 *a);
|
|
typedef arg_rrr_rot arg_UXTAB16;
|
|
static bool trans_UXTAB16(DisasContext *ctx, arg_UXTAB16 *a);
|
|
typedef arg_rrr_rot arg_SXTAB;
|
|
static bool trans_SXTAB(DisasContext *ctx, arg_SXTAB *a);
|
|
typedef arg_rrr_rot arg_UXTAB;
|
|
static bool trans_UXTAB(DisasContext *ctx, arg_UXTAB *a);
|
|
typedef arg_ldst_block arg_STM_t32;
|
|
static bool trans_STM_t32(DisasContext *ctx, arg_STM_t32 *a);
|
|
typedef arg_ldst_block arg_LDM_t32;
|
|
static bool trans_LDM_t32(DisasContext *ctx, arg_LDM_t32 *a);
|
|
typedef arg_rfe arg_RFE;
|
|
static bool trans_RFE(DisasContext *ctx, arg_RFE *a);
|
|
typedef arg_srs arg_SRS;
|
|
static bool trans_SRS(DisasContext *ctx, arg_SRS *a);
|
|
typedef arg_i arg_B;
|
|
static bool trans_B(DisasContext *ctx, arg_B *a);
|
|
typedef arg_i arg_BL;
|
|
static bool trans_BL(DisasContext *ctx, arg_BL *a);
|
|
typedef arg_i arg_BLX_i;
|
|
static bool trans_BLX_i(DisasContext *ctx, arg_BLX_i *a);
|
|
|
|
#ifdef CONFIG_PRAGMA_DIAGNOSTIC_AVAILABLE
|
|
# pragma GCC diagnostic pop
|
|
#endif
|
|
|
|
static void disas_t32_extract_S_xri_rot(DisasContext *ctx, arg_s_rri_rot *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->imm = t32_expandimm_imm(ctx, deposit32(deposit32(extract32(insn, 0, 8), 8, 24, extract32(insn, 12, 3)), 11, 21, extract32(insn, 26, 1)));
|
|
a->rot = t32_expandimm_rot(ctx, deposit32(deposit32(extract32(insn, 0, 8), 8, 24, extract32(insn, 12, 3)), 11, 21, extract32(insn, 26, 1)));
|
|
a->s = 1;
|
|
a->rd = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_S_xrr_shi(DisasContext *ctx, arg_s_rrr_shi *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->shty = extract32(insn, 4, 2);
|
|
a->rm = extract32(insn, 0, 4);
|
|
a->shim = deposit32(extract32(insn, 6, 2), 2, 30, extract32(insn, 12, 3));
|
|
a->s = 1;
|
|
a->rd = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_bfi(DisasContext *ctx, arg_bfi *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->msb = extract32(insn, 0, 5);
|
|
a->lsb = deposit32(extract32(insn, 6, 2), 2, 30, extract32(insn, 12, 3));
|
|
}
|
|
|
|
static void disas_t32_extract_bfx(DisasContext *ctx, arg_bfx *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->widthm1 = extract32(insn, 0, 5);
|
|
a->lsb = deposit32(extract32(insn, 6, 2), 2, 30, extract32(insn, 12, 3));
|
|
}
|
|
|
|
static void disas_t32_extract_branch24(DisasContext *ctx, arg_i *a, uint32_t insn)
|
|
{
|
|
a->imm = t32_branch24(ctx, deposit32(deposit32(deposit32(deposit32(extract32(insn, 0, 11), 11, 21, extract32(insn, 16, 10)), 21, 11, extract32(insn, 11, 1)), 22, 10, extract32(insn, 13, 1)), 23, 9, sextract32(insn, 26, 1)));
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_10(DisasContext *ctx, arg_ri *a, uint32_t insn)
|
|
{
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->imm = negate(ctx, deposit32(deposit32(extract32(insn, 0, 8), 8, 24, extract32(insn, 12, 3)), 11, 21, extract32(insn, 26, 1)));
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_22(DisasContext *ctx, arg_empty *a, uint32_t insn)
|
|
{
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_23(DisasContext *ctx, arg_cps *a, uint32_t insn)
|
|
{
|
|
a->imod = extract32(insn, 9, 2);
|
|
a->M = extract32(insn, 8, 1);
|
|
a->A = extract32(insn, 7, 1);
|
|
a->I = extract32(insn, 6, 1);
|
|
a->F = extract32(insn, 5, 1);
|
|
a->mode = extract32(insn, 0, 5);
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_24(DisasContext *ctx, arg_mrs_bank *a, uint32_t insn)
|
|
{
|
|
a->r = extract32(insn, 20, 1);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->sysm = deposit32(extract32(insn, 16, 4), 4, 28, extract32(insn, 4, 1));
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_25(DisasContext *ctx, arg_mrs_reg *a, uint32_t insn)
|
|
{
|
|
a->r = extract32(insn, 20, 1);
|
|
a->rd = extract32(insn, 8, 4);
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_26(DisasContext *ctx, arg_disas_t3227 *a, uint32_t insn)
|
|
{
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->sysm = extract32(insn, 0, 8);
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_27(DisasContext *ctx, arg_msr_bank *a, uint32_t insn)
|
|
{
|
|
a->r = extract32(insn, 20, 1);
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->sysm = deposit32(extract32(insn, 8, 4), 4, 28, extract32(insn, 4, 1));
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_28(DisasContext *ctx, arg_msr_reg *a, uint32_t insn)
|
|
{
|
|
a->r = extract32(insn, 20, 1);
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->mask = extract32(insn, 8, 4);
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_29(DisasContext *ctx, arg_disas_t3228 *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->mask = extract32(insn, 10, 2);
|
|
a->sysm = extract32(insn, 0, 8);
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_3(DisasContext *ctx, arg_pkh *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->tb = extract32(insn, 5, 1);
|
|
a->rm = extract32(insn, 0, 4);
|
|
a->imm = deposit32(extract32(insn, 6, 2), 2, 30, extract32(insn, 12, 3));
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_30(DisasContext *ctx, arg_r *a, uint32_t insn)
|
|
{
|
|
a->rm = extract32(insn, 16, 4);
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_31(DisasContext *ctx, arg_s_rri_rot *a, uint32_t insn)
|
|
{
|
|
a->imm = extract32(insn, 0, 8);
|
|
a->rot = 0;
|
|
a->s = 1;
|
|
a->rd = 15;
|
|
a->rn = 14;
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_32(DisasContext *ctx, arg_i *a, uint32_t insn)
|
|
{
|
|
a->imm = extract32(insn, 16, 4);
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_33(DisasContext *ctx, arg_i *a, uint32_t insn)
|
|
{
|
|
a->imm = deposit32(extract32(insn, 0, 12), 12, 20, extract32(insn, 16, 4));
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_34(DisasContext *ctx, arg_ci *a, uint32_t insn)
|
|
{
|
|
a->cond = extract32(insn, 22, 4);
|
|
a->imm = times_2(ctx, deposit32(deposit32(deposit32(deposit32(extract32(insn, 0, 11), 11, 21, extract32(insn, 16, 6)), 17, 15, extract32(insn, 13, 1)), 18, 14, extract32(insn, 11, 1)), 19, 13, sextract32(insn, 26, 1)));
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_4(DisasContext *ctx, arg_s_rrr_shr *a, uint32_t insn)
|
|
{
|
|
a->shty = extract32(insn, 21, 2);
|
|
a->s = extract32(insn, 20, 1);
|
|
a->rm = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->rs = extract32(insn, 0, 4);
|
|
a->rn = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_48(DisasContext *ctx, arg_disas_t3230 *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->A = extract32(insn, 7, 1);
|
|
a->T = extract32(insn, 6, 1);
|
|
}
|
|
|
|
static void disas_t32_extract_disas_t32_Fmt_9(DisasContext *ctx, arg_ri *a, uint32_t insn)
|
|
{
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->imm = deposit32(deposit32(extract32(insn, 0, 8), 8, 24, extract32(insn, 12, 3)), 11, 21, extract32(insn, 26, 1));
|
|
}
|
|
|
|
static void disas_t32_extract_ldrex_0(DisasContext *ctx, arg_ldrex *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rt = extract32(insn, 12, 4);
|
|
a->rt2 = 15;
|
|
a->imm = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_ldrex_d(DisasContext *ctx, arg_ldrex *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rt = extract32(insn, 12, 4);
|
|
a->rt2 = extract32(insn, 8, 4);
|
|
a->imm = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_ldrex_i(DisasContext *ctx, arg_ldrex *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rt = extract32(insn, 12, 4);
|
|
a->rt2 = 15;
|
|
a->imm = times_4(ctx, extract32(insn, 0, 8));
|
|
}
|
|
|
|
static void disas_t32_extract_ldst_ri_idx(DisasContext *ctx, arg_ldst_ri *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rt = extract32(insn, 12, 4);
|
|
a->p = extract32(insn, 10, 1);
|
|
a->u = extract32(insn, 9, 1);
|
|
a->imm = extract32(insn, 0, 8);
|
|
a->w = 1;
|
|
}
|
|
|
|
static void disas_t32_extract_ldst_ri_lit(DisasContext *ctx, arg_ldst_ri *a, uint32_t insn)
|
|
{
|
|
a->u = extract32(insn, 23, 1);
|
|
a->rt = extract32(insn, 12, 4);
|
|
a->imm = extract32(insn, 0, 12);
|
|
a->p = 1;
|
|
a->w = 0;
|
|
a->rn = 15;
|
|
}
|
|
|
|
static void disas_t32_extract_ldst_ri_neg(DisasContext *ctx, arg_ldst_ri *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rt = extract32(insn, 12, 4);
|
|
a->imm = extract32(insn, 0, 8);
|
|
a->p = 1;
|
|
a->w = 0;
|
|
a->u = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_ldst_ri_pos(DisasContext *ctx, arg_ldst_ri *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rt = extract32(insn, 12, 4);
|
|
a->imm = extract32(insn, 0, 12);
|
|
a->p = 1;
|
|
a->w = 0;
|
|
a->u = 1;
|
|
}
|
|
|
|
static void disas_t32_extract_ldst_ri_unp(DisasContext *ctx, arg_ldst_ri *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rt = extract32(insn, 12, 4);
|
|
a->imm = extract32(insn, 0, 8);
|
|
a->p = 1;
|
|
a->w = 0;
|
|
a->u = 1;
|
|
}
|
|
|
|
static void disas_t32_extract_ldst_rr(DisasContext *ctx, arg_ldst_rr *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rt = extract32(insn, 12, 4);
|
|
a->shimm = extract32(insn, 4, 2);
|
|
a->rm = extract32(insn, 0, 4);
|
|
a->p = 1;
|
|
a->w = 0;
|
|
a->u = 1;
|
|
a->shtype = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_ldstd_ri8(DisasContext *ctx, arg_ldst_ri2 *a, uint32_t insn)
|
|
{
|
|
a->u = extract32(insn, 23, 1);
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rt = extract32(insn, 12, 4);
|
|
a->rt2 = extract32(insn, 8, 4);
|
|
a->imm = times_4(ctx, extract32(insn, 0, 8));
|
|
}
|
|
|
|
static void disas_t32_extract_ldstm(DisasContext *ctx, arg_ldst_block *a, uint32_t insn)
|
|
{
|
|
a->w = extract32(insn, 21, 1);
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->list = extract32(insn, 0, 16);
|
|
a->u = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_mov16(DisasContext *ctx, arg_ri *a, uint32_t insn)
|
|
{
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->imm = deposit32(deposit32(deposit32(extract32(insn, 0, 8), 8, 24, extract32(insn, 12, 3)), 11, 21, extract32(insn, 26, 1)), 12, 20, extract32(insn, 16, 4));
|
|
}
|
|
|
|
static void disas_t32_extract_rdm(DisasContext *ctx, arg_rr *a, uint32_t insn)
|
|
{
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->rm = extract32(insn, 0, 4);
|
|
}
|
|
|
|
static void disas_t32_extract_rfe(DisasContext *ctx, arg_rfe *a, uint32_t insn)
|
|
{
|
|
a->w = extract32(insn, 21, 1);
|
|
a->rn = extract32(insn, 16, 4);
|
|
}
|
|
|
|
static void disas_t32_extract_rn0dm(DisasContext *ctx, arg_rrrr *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->rm = extract32(insn, 0, 4);
|
|
a->ra = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_rnadm(DisasContext *ctx, arg_rrrr *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->ra = extract32(insn, 12, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->rm = extract32(insn, 0, 4);
|
|
}
|
|
|
|
static void disas_t32_extract_rndm(DisasContext *ctx, arg_rrr *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->rm = extract32(insn, 0, 4);
|
|
}
|
|
|
|
static void disas_t32_extract_rrr_rot(DisasContext *ctx, arg_rrr_rot *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->rot = extract32(insn, 4, 2);
|
|
a->rm = extract32(insn, 0, 4);
|
|
}
|
|
|
|
static void disas_t32_extract_s0_rn0dm(DisasContext *ctx, arg_s_rrrr *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->rm = extract32(insn, 0, 4);
|
|
a->ra = 0;
|
|
a->s = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_s0_rnadm(DisasContext *ctx, arg_s_rrrr *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->ra = extract32(insn, 12, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->rm = extract32(insn, 0, 4);
|
|
a->s = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_s0_rri_12(DisasContext *ctx, arg_s_rri_rot *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->imm = deposit32(deposit32(extract32(insn, 0, 8), 8, 24, extract32(insn, 12, 3)), 11, 21, extract32(insn, 26, 1));
|
|
a->rot = 0;
|
|
a->s = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_s_rri_rot(DisasContext *ctx, arg_s_rri_rot *a, uint32_t insn)
|
|
{
|
|
a->s = extract32(insn, 20, 1);
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->imm = t32_expandimm_imm(ctx, deposit32(deposit32(extract32(insn, 0, 8), 8, 24, extract32(insn, 12, 3)), 11, 21, extract32(insn, 26, 1)));
|
|
a->rot = t32_expandimm_rot(ctx, deposit32(deposit32(extract32(insn, 0, 8), 8, 24, extract32(insn, 12, 3)), 11, 21, extract32(insn, 26, 1)));
|
|
}
|
|
|
|
static void disas_t32_extract_s_rrr_shi(DisasContext *ctx, arg_s_rrr_shi *a, uint32_t insn)
|
|
{
|
|
a->s = extract32(insn, 20, 1);
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->shty = extract32(insn, 4, 2);
|
|
a->rm = extract32(insn, 0, 4);
|
|
a->shim = deposit32(extract32(insn, 6, 2), 2, 30, extract32(insn, 12, 3));
|
|
}
|
|
|
|
static void disas_t32_extract_s_rxi_rot(DisasContext *ctx, arg_s_rri_rot *a, uint32_t insn)
|
|
{
|
|
a->s = extract32(insn, 20, 1);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->imm = t32_expandimm_imm(ctx, deposit32(deposit32(extract32(insn, 0, 8), 8, 24, extract32(insn, 12, 3)), 11, 21, extract32(insn, 26, 1)));
|
|
a->rot = t32_expandimm_rot(ctx, deposit32(deposit32(extract32(insn, 0, 8), 8, 24, extract32(insn, 12, 3)), 11, 21, extract32(insn, 26, 1)));
|
|
a->rn = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_s_rxr_shi(DisasContext *ctx, arg_s_rrr_shi *a, uint32_t insn)
|
|
{
|
|
a->s = extract32(insn, 20, 1);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->shty = extract32(insn, 4, 2);
|
|
a->rm = extract32(insn, 0, 4);
|
|
a->shim = deposit32(extract32(insn, 6, 2), 2, 30, extract32(insn, 12, 3));
|
|
a->rn = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_sat(DisasContext *ctx, arg_sat *a, uint32_t insn)
|
|
{
|
|
a->sh = extract32(insn, 21, 1);
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->satimm = extract32(insn, 0, 5);
|
|
a->imm = deposit32(extract32(insn, 6, 2), 2, 30, extract32(insn, 12, 3));
|
|
}
|
|
|
|
static void disas_t32_extract_sat16(DisasContext *ctx, arg_sat *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->satimm = extract32(insn, 0, 5);
|
|
a->sh = 0;
|
|
a->imm = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_srs(DisasContext *ctx, arg_srs *a, uint32_t insn)
|
|
{
|
|
a->w = extract32(insn, 21, 1);
|
|
a->mode = extract32(insn, 0, 5);
|
|
}
|
|
|
|
static void disas_t32_extract_strex_0(DisasContext *ctx, arg_strex *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rt = extract32(insn, 12, 4);
|
|
a->rd = extract32(insn, 0, 4);
|
|
a->rt2 = 15;
|
|
a->imm = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_strex_d(DisasContext *ctx, arg_strex *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rt = extract32(insn, 12, 4);
|
|
a->rt2 = extract32(insn, 8, 4);
|
|
a->rd = extract32(insn, 0, 4);
|
|
a->imm = 0;
|
|
}
|
|
|
|
static void disas_t32_extract_strex_i(DisasContext *ctx, arg_strex *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rt = extract32(insn, 12, 4);
|
|
a->rd = extract32(insn, 8, 4);
|
|
a->rt2 = 15;
|
|
a->imm = times_4(ctx, extract32(insn, 0, 8));
|
|
}
|
|
|
|
static void disas_t32_extract_tbranch(DisasContext *ctx, arg_tbranch *a, uint32_t insn)
|
|
{
|
|
a->rn = extract32(insn, 16, 4);
|
|
a->rm = extract32(insn, 0, 4);
|
|
}
|
|
|
|
static bool disas_t32(DisasContext *ctx, uint32_t insn)
|
|
{
|
|
union {
|
|
arg_bfi f_bfi;
|
|
arg_bfx f_bfx;
|
|
arg_ci f_ci;
|
|
arg_cps f_cps;
|
|
arg_disas_t3227 f_disas_t3227;
|
|
arg_disas_t3228 f_disas_t3228;
|
|
arg_disas_t3230 f_disas_t3230;
|
|
arg_empty f_empty;
|
|
arg_i f_i;
|
|
arg_ldrex f_ldrex;
|
|
arg_ldst_block f_ldst_block;
|
|
arg_ldst_ri f_ldst_ri;
|
|
arg_ldst_ri2 f_ldst_ri2;
|
|
arg_ldst_rr f_ldst_rr;
|
|
arg_mrs_bank f_mrs_bank;
|
|
arg_mrs_reg f_mrs_reg;
|
|
arg_msr_bank f_msr_bank;
|
|
arg_msr_reg f_msr_reg;
|
|
arg_pkh f_pkh;
|
|
arg_r f_r;
|
|
arg_rfe f_rfe;
|
|
arg_ri f_ri;
|
|
arg_rr f_rr;
|
|
arg_rrr f_rrr;
|
|
arg_rrr_rot f_rrr_rot;
|
|
arg_rrrr f_rrrr;
|
|
arg_s_rri_rot f_s_rri_rot;
|
|
arg_s_rrr_shi f_s_rrr_shi;
|
|
arg_s_rrr_shr f_s_rrr_shr;
|
|
arg_s_rrrr f_s_rrrr;
|
|
arg_sat f_sat;
|
|
arg_srs f_srs;
|
|
arg_strex f_strex;
|
|
arg_tbranch f_tbranch;
|
|
} u;
|
|
|
|
switch ((insn >> 27) & 0x1f) {
|
|
case 0x1d:
|
|
/* 11101... ........ ........ ........ */
|
|
switch (insn & 0x07400000) {
|
|
case 0x00000000:
|
|
/* 11101000 .0...... ........ ........ */
|
|
switch (insn & 0x00900000) {
|
|
case 0x00000000:
|
|
/* 11101000 00.0.... ........ ........ */
|
|
disas_t32_extract_srs(ctx, &u.f_srs, insn);
|
|
switch ((insn >> 5) & 0x7fff) {
|
|
case 0x6e00:
|
|
/* 11101000 00.01101 11000000 000..... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:621 */
|
|
u.f_srs.pu = 2;
|
|
if (trans_SRS(ctx, &u.f_srs)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x00100000:
|
|
/* 11101000 00.1.... ........ ........ */
|
|
disas_t32_extract_rfe(ctx, &u.f_rfe, insn);
|
|
switch (insn & 0x0000ffff) {
|
|
case 0x0000c000:
|
|
/* 11101000 00.1.... 11000000 00000000 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:615 */
|
|
u.f_rfe.pu = 2;
|
|
if (trans_RFE(ctx, &u.f_rfe)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x00800000:
|
|
/* 11101000 10.0.... ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:607 */
|
|
disas_t32_extract_ldstm(ctx, &u.f_ldst_block, insn);
|
|
u.f_ldst_block.i = 1;
|
|
u.f_ldst_block.b = 0;
|
|
if (trans_STM_t32(ctx, &u.f_ldst_block)) return true;
|
|
return false;
|
|
case 0x00900000:
|
|
/* 11101000 10.1.... ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:609 */
|
|
disas_t32_extract_ldstm(ctx, &u.f_ldst_block, insn);
|
|
u.f_ldst_block.i = 1;
|
|
u.f_ldst_block.b = 0;
|
|
if (trans_LDM_t32(ctx, &u.f_ldst_block)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x00400000:
|
|
/* 11101000 .1...... ........ ........ */
|
|
switch ((insn >> 20) & 0x3) {
|
|
case 0x0:
|
|
/* 11101000 .100.... ........ ........ */
|
|
switch ((insn >> 23) & 0x1) {
|
|
case 0x0:
|
|
/* 11101000 0100.... ........ ........ */
|
|
if ((insn & 0x0000f03f) == 0x0000f000) {
|
|
/* 11101000 0100.... 1111.... ..000000 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:512 */
|
|
disas_t32_extract_disas_t32_Fmt_48(ctx, &u.f_disas_t3230, insn);
|
|
if (trans_TT(ctx, &u.f_disas_t3230)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:513 */
|
|
disas_t32_extract_strex_i(ctx, &u.f_strex, insn);
|
|
if (trans_STREX(ctx, &u.f_strex)) return true;
|
|
return false;
|
|
case 0x1:
|
|
/* 11101000 1100.... ........ ........ */
|
|
switch ((insn >> 4) & 0xf) {
|
|
case 0x4:
|
|
/* 11101000 1100.... ........ 0100.... */
|
|
disas_t32_extract_strex_0(ctx, &u.f_strex, insn);
|
|
switch ((insn >> 8) & 0xf) {
|
|
case 0xf:
|
|
/* 11101000 1100.... ....1111 0100.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:515 */
|
|
if (trans_STREXB(ctx, &u.f_strex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x5:
|
|
/* 11101000 1100.... ........ 0101.... */
|
|
disas_t32_extract_strex_0(ctx, &u.f_strex, insn);
|
|
switch ((insn >> 8) & 0xf) {
|
|
case 0xf:
|
|
/* 11101000 1100.... ....1111 0101.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:516 */
|
|
if (trans_STREXH(ctx, &u.f_strex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x7:
|
|
/* 11101000 1100.... ........ 0111.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:517 */
|
|
disas_t32_extract_strex_d(ctx, &u.f_strex, insn);
|
|
if (trans_STREXD_t32(ctx, &u.f_strex)) return true;
|
|
return false;
|
|
case 0x8:
|
|
/* 11101000 1100.... ........ 1000.... */
|
|
disas_t32_extract_ldrex_0(ctx, &u.f_ldrex, insn);
|
|
switch (insn & 0x00000f0f) {
|
|
case 0x00000f0f:
|
|
/* 11101000 1100.... ....1111 10001111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:525 */
|
|
if (trans_STLB(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x9:
|
|
/* 11101000 1100.... ........ 1001.... */
|
|
disas_t32_extract_ldrex_0(ctx, &u.f_ldrex, insn);
|
|
switch (insn & 0x00000f0f) {
|
|
case 0x00000f0f:
|
|
/* 11101000 1100.... ....1111 10011111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:526 */
|
|
if (trans_STLH(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xa:
|
|
/* 11101000 1100.... ........ 1010.... */
|
|
disas_t32_extract_ldrex_0(ctx, &u.f_ldrex, insn);
|
|
switch (insn & 0x00000f0f) {
|
|
case 0x00000f0f:
|
|
/* 11101000 1100.... ....1111 10101111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:524 */
|
|
if (trans_STL(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xc:
|
|
/* 11101000 1100.... ........ 1100.... */
|
|
disas_t32_extract_strex_0(ctx, &u.f_strex, insn);
|
|
switch ((insn >> 8) & 0xf) {
|
|
case 0xf:
|
|
/* 11101000 1100.... ....1111 1100.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:520 */
|
|
if (trans_STLEXB(ctx, &u.f_strex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xd:
|
|
/* 11101000 1100.... ........ 1101.... */
|
|
disas_t32_extract_strex_0(ctx, &u.f_strex, insn);
|
|
switch ((insn >> 8) & 0xf) {
|
|
case 0xf:
|
|
/* 11101000 1100.... ....1111 1101.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:521 */
|
|
if (trans_STLEXH(ctx, &u.f_strex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xe:
|
|
/* 11101000 1100.... ........ 1110.... */
|
|
disas_t32_extract_strex_0(ctx, &u.f_strex, insn);
|
|
switch ((insn >> 8) & 0xf) {
|
|
case 0xf:
|
|
/* 11101000 1100.... ....1111 1110.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:519 */
|
|
if (trans_STLEX(ctx, &u.f_strex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xf:
|
|
/* 11101000 1100.... ........ 1111.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:522 */
|
|
disas_t32_extract_strex_d(ctx, &u.f_strex, insn);
|
|
if (trans_STLEXD_t32(ctx, &u.f_strex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x1:
|
|
/* 11101000 .101.... ........ ........ */
|
|
switch ((insn >> 23) & 0x1) {
|
|
case 0x0:
|
|
/* 11101000 0101.... ........ ........ */
|
|
disas_t32_extract_ldrex_i(ctx, &u.f_ldrex, insn);
|
|
switch ((insn >> 8) & 0xf) {
|
|
case 0xf:
|
|
/* 11101000 0101.... ....1111 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:528 */
|
|
if (trans_LDREX(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x1:
|
|
/* 11101000 1101.... ........ ........ */
|
|
switch ((insn >> 4) & 0xf) {
|
|
case 0x0:
|
|
/* 11101000 1101.... ........ 0000.... */
|
|
disas_t32_extract_tbranch(ctx, &u.f_tbranch, insn);
|
|
switch ((insn >> 8) & 0xff) {
|
|
case 0xf0:
|
|
/* 11101000 1101.... 11110000 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:545 */
|
|
if (trans_TBB(ctx, &u.f_tbranch)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x1:
|
|
/* 11101000 1101.... ........ 0001.... */
|
|
disas_t32_extract_tbranch(ctx, &u.f_tbranch, insn);
|
|
switch ((insn >> 8) & 0xff) {
|
|
case 0xf0:
|
|
/* 11101000 1101.... 11110000 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:546 */
|
|
if (trans_TBH(ctx, &u.f_tbranch)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x4:
|
|
/* 11101000 1101.... ........ 0100.... */
|
|
disas_t32_extract_ldrex_0(ctx, &u.f_ldrex, insn);
|
|
switch (insn & 0x00000f0f) {
|
|
case 0x00000f0f:
|
|
/* 11101000 1101.... ....1111 01001111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:529 */
|
|
if (trans_LDREXB(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x5:
|
|
/* 11101000 1101.... ........ 0101.... */
|
|
disas_t32_extract_ldrex_0(ctx, &u.f_ldrex, insn);
|
|
switch (insn & 0x00000f0f) {
|
|
case 0x00000f0f:
|
|
/* 11101000 1101.... ....1111 01011111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:530 */
|
|
if (trans_LDREXH(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x7:
|
|
/* 11101000 1101.... ........ 0111.... */
|
|
disas_t32_extract_ldrex_d(ctx, &u.f_ldrex, insn);
|
|
switch (insn & 0x0000000f) {
|
|
case 0x0000000f:
|
|
/* 11101000 1101.... ........ 01111111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:531 */
|
|
if (trans_LDREXD_t32(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x8:
|
|
/* 11101000 1101.... ........ 1000.... */
|
|
disas_t32_extract_ldrex_0(ctx, &u.f_ldrex, insn);
|
|
switch (insn & 0x00000f0f) {
|
|
case 0x00000f0f:
|
|
/* 11101000 1101.... ....1111 10001111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:539 */
|
|
if (trans_LDAB(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x9:
|
|
/* 11101000 1101.... ........ 1001.... */
|
|
disas_t32_extract_ldrex_0(ctx, &u.f_ldrex, insn);
|
|
switch (insn & 0x00000f0f) {
|
|
case 0x00000f0f:
|
|
/* 11101000 1101.... ....1111 10011111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:540 */
|
|
if (trans_LDAH(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xa:
|
|
/* 11101000 1101.... ........ 1010.... */
|
|
disas_t32_extract_ldrex_0(ctx, &u.f_ldrex, insn);
|
|
switch (insn & 0x00000f0f) {
|
|
case 0x00000f0f:
|
|
/* 11101000 1101.... ....1111 10101111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:538 */
|
|
if (trans_LDA(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xc:
|
|
/* 11101000 1101.... ........ 1100.... */
|
|
disas_t32_extract_ldrex_0(ctx, &u.f_ldrex, insn);
|
|
switch (insn & 0x00000f0f) {
|
|
case 0x00000f0f:
|
|
/* 11101000 1101.... ....1111 11001111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:534 */
|
|
if (trans_LDAEXB(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xd:
|
|
/* 11101000 1101.... ........ 1101.... */
|
|
disas_t32_extract_ldrex_0(ctx, &u.f_ldrex, insn);
|
|
switch (insn & 0x00000f0f) {
|
|
case 0x00000f0f:
|
|
/* 11101000 1101.... ....1111 11011111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:535 */
|
|
if (trans_LDAEXH(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xe:
|
|
/* 11101000 1101.... ........ 1110.... */
|
|
disas_t32_extract_ldrex_0(ctx, &u.f_ldrex, insn);
|
|
switch (insn & 0x00000f0f) {
|
|
case 0x00000f0f:
|
|
/* 11101000 1101.... ....1111 11101111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:533 */
|
|
if (trans_LDAEX(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xf:
|
|
/* 11101000 1101.... ........ 1111.... */
|
|
disas_t32_extract_ldrex_d(ctx, &u.f_ldrex, insn);
|
|
switch (insn & 0x0000000f) {
|
|
case 0x0000000f:
|
|
/* 11101000 1101.... ........ 11111111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:536 */
|
|
if (trans_LDAEXD_t32(ctx, &u.f_ldrex)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x2:
|
|
/* 11101000 .110.... ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:483 */
|
|
disas_t32_extract_ldstd_ri8(ctx, &u.f_ldst_ri2, insn);
|
|
u.f_ldst_ri2.w = 1;
|
|
u.f_ldst_ri2.p = 0;
|
|
if (trans_STRD_ri_t32(ctx, &u.f_ldst_ri2)) return true;
|
|
return false;
|
|
case 0x3:
|
|
/* 11101000 .111.... ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:484 */
|
|
disas_t32_extract_ldstd_ri8(ctx, &u.f_ldst_ri2, insn);
|
|
u.f_ldst_ri2.w = 1;
|
|
u.f_ldst_ri2.p = 0;
|
|
if (trans_LDRD_ri_t32(ctx, &u.f_ldst_ri2)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x01000000:
|
|
/* 11101001 .0...... ........ ........ */
|
|
switch (insn & 0x00900000) {
|
|
case 0x00000000:
|
|
/* 11101001 00.0.... ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:608 */
|
|
disas_t32_extract_ldstm(ctx, &u.f_ldst_block, insn);
|
|
u.f_ldst_block.i = 0;
|
|
u.f_ldst_block.b = 1;
|
|
if (trans_STM_t32(ctx, &u.f_ldst_block)) return true;
|
|
return false;
|
|
case 0x00100000:
|
|
/* 11101001 00.1.... ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:610 */
|
|
disas_t32_extract_ldstm(ctx, &u.f_ldst_block, insn);
|
|
u.f_ldst_block.i = 0;
|
|
u.f_ldst_block.b = 1;
|
|
if (trans_LDM_t32(ctx, &u.f_ldst_block)) return true;
|
|
return false;
|
|
case 0x00800000:
|
|
/* 11101001 10.0.... ........ ........ */
|
|
disas_t32_extract_srs(ctx, &u.f_srs, insn);
|
|
switch ((insn >> 5) & 0x7fff) {
|
|
case 0x6e00:
|
|
/* 11101001 10.01101 11000000 000..... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:622 */
|
|
u.f_srs.pu = 1;
|
|
if (trans_SRS(ctx, &u.f_srs)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x00900000:
|
|
/* 11101001 10.1.... ........ ........ */
|
|
disas_t32_extract_rfe(ctx, &u.f_rfe, insn);
|
|
switch (insn & 0x0000ffff) {
|
|
case 0x0000c000:
|
|
/* 11101001 10.1.... 11000000 00000000 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:616 */
|
|
u.f_rfe.pu = 1;
|
|
if (trans_RFE(ctx, &u.f_rfe)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x01400000:
|
|
/* 11101001 .1...... ........ ........ */
|
|
switch ((insn >> 20) & 0x3) {
|
|
case 0x0:
|
|
/* 11101001 .100.... ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:486 */
|
|
disas_t32_extract_ldstd_ri8(ctx, &u.f_ldst_ri2, insn);
|
|
u.f_ldst_ri2.w = 0;
|
|
u.f_ldst_ri2.p = 1;
|
|
if (trans_STRD_ri_t32(ctx, &u.f_ldst_ri2)) return true;
|
|
return false;
|
|
case 0x1:
|
|
/* 11101001 .101.... ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:487 */
|
|
disas_t32_extract_ldstd_ri8(ctx, &u.f_ldst_ri2, insn);
|
|
u.f_ldst_ri2.w = 0;
|
|
u.f_ldst_ri2.p = 1;
|
|
if (trans_LDRD_ri_t32(ctx, &u.f_ldst_ri2)) return true;
|
|
return false;
|
|
case 0x2:
|
|
/* 11101001 .110.... ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:489 */
|
|
disas_t32_extract_ldstd_ri8(ctx, &u.f_ldst_ri2, insn);
|
|
u.f_ldst_ri2.w = 1;
|
|
u.f_ldst_ri2.p = 1;
|
|
if (trans_STRD_ri_t32(ctx, &u.f_ldst_ri2)) return true;
|
|
return false;
|
|
case 0x3:
|
|
/* 11101001 .111.... ........ ........ */
|
|
if ((insn & 0x008fffff) == 0x000fe97f) {
|
|
/* 11101001 01111111 11101001 01111111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:491 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_SG(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:492 */
|
|
disas_t32_extract_ldstd_ri8(ctx, &u.f_ldst_ri2, insn);
|
|
u.f_ldst_ri2.w = 1;
|
|
u.f_ldst_ri2.p = 1;
|
|
if (trans_LDRD_ri_t32(ctx, &u.f_ldst_ri2)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x02000000:
|
|
/* 11101010 .0...... ........ ........ */
|
|
switch (insn & 0x00a08000) {
|
|
case 0x00000000:
|
|
/* 11101010 000..... 0....... ........ */
|
|
if ((insn & 0x00100f00) == 0x00100f00) {
|
|
/* 11101010 0001.... 0...1111 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:61 */
|
|
disas_t32_extract_S_xrr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
if (trans_TST_xrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:62 */
|
|
disas_t32_extract_s_rrr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
if (trans_AND_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
return false;
|
|
case 0x00200000:
|
|
/* 11101010 001..... 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:64 */
|
|
disas_t32_extract_s_rrr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
if (trans_BIC_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
return false;
|
|
case 0x00800000:
|
|
/* 11101010 100..... 0....... ........ */
|
|
if ((insn & 0x00100f00) == 0x00100f00) {
|
|
/* 11101010 1001.... 0...1111 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:74 */
|
|
disas_t32_extract_S_xrr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
if (trans_TEQ_xrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:75 */
|
|
disas_t32_extract_s_rrr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
if (trans_EOR_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x02400000:
|
|
/* 11101010 .1...... ........ ........ */
|
|
switch (insn & 0x00a08000) {
|
|
case 0x00000000:
|
|
/* 11101010 010..... 0....... ........ */
|
|
if ((insn & 0x000f0000) == 0x000f0000) {
|
|
/* 11101010 010.1111 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:66 */
|
|
disas_t32_extract_s_rxr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
if (trans_MOV_rxri(ctx, &u.f_s_rrr_shi)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:67 */
|
|
disas_t32_extract_s_rrr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
if (trans_ORR_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
return false;
|
|
case 0x00200000:
|
|
/* 11101010 011..... 0....... ........ */
|
|
if ((insn & 0x000f0000) == 0x000f0000) {
|
|
/* 11101010 011.1111 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:70 */
|
|
disas_t32_extract_s_rxr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
if (trans_MVN_rxri(ctx, &u.f_s_rrr_shi)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:71 */
|
|
disas_t32_extract_s_rrr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
if (trans_ORN_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
return false;
|
|
case 0x00800000:
|
|
/* 11101010 110..... 0....... ........ */
|
|
disas_t32_extract_disas_t32_Fmt_3(ctx, &u.f_pkh, insn);
|
|
switch (insn & 0x00100010) {
|
|
case 0x00000000:
|
|
/* 11101010 1100.... 0....... ...0.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:77 */
|
|
if (trans_PKH(ctx, &u.f_pkh)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x03000000:
|
|
/* 11101011 .0...... ........ ........ */
|
|
switch (insn & 0x00a08000) {
|
|
case 0x00000000:
|
|
/* 11101011 000..... 0....... ........ */
|
|
if ((insn & 0x00100f00) == 0x00100f00) {
|
|
/* 11101011 0001.... 0...1111 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:80 */
|
|
disas_t32_extract_S_xrr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
if (trans_CMN_xrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:81 */
|
|
disas_t32_extract_s_rrr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
if (trans_ADD_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
return false;
|
|
case 0x00a00000:
|
|
/* 11101011 101..... 0....... ........ */
|
|
if ((insn & 0x00100f00) == 0x00100f00) {
|
|
/* 11101011 1011.... 0...1111 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:86 */
|
|
disas_t32_extract_S_xrr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
if (trans_CMP_xrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:87 */
|
|
disas_t32_extract_s_rrr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
if (trans_SUB_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x03400000:
|
|
/* 11101011 .1...... ........ ........ */
|
|
disas_t32_extract_s_rrr_shi(ctx, &u.f_s_rrr_shi, insn);
|
|
switch (insn & 0x00a08000) {
|
|
case 0x00000000:
|
|
/* 11101011 010..... 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:83 */
|
|
if (trans_ADC_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
return false;
|
|
case 0x00200000:
|
|
/* 11101011 011..... 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:84 */
|
|
if (trans_SBC_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
return false;
|
|
case 0x00800000:
|
|
/* 11101011 110..... 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:89 */
|
|
if (trans_RSB_rrri(ctx, &u.f_s_rrr_shi)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x1e:
|
|
/* 11110... ........ ........ ........ */
|
|
switch ((insn >> 15) & 0x1) {
|
|
case 0x0:
|
|
/* 11110... ........ 0....... ........ */
|
|
switch ((insn >> 22) & 0xf) {
|
|
case 0x0:
|
|
/* 11110.00 00...... 0....... ........ */
|
|
switch ((insn >> 21) & 0x1) {
|
|
case 0x0:
|
|
/* 11110.00 000..... 0....... ........ */
|
|
if ((insn & 0x00100f00) == 0x00100f00) {
|
|
/* 11110.00 0001.... 0...1111 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:109 */
|
|
disas_t32_extract_S_xri_rot(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_TST_xri(ctx, &u.f_s_rri_rot)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:110 */
|
|
disas_t32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_AND_rri(ctx, &u.f_s_rri_rot)) return true;
|
|
return false;
|
|
case 0x1:
|
|
/* 11110.00 001..... 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:112 */
|
|
disas_t32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_BIC_rri(ctx, &u.f_s_rri_rot)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x1:
|
|
/* 11110.00 01...... 0....... ........ */
|
|
switch ((insn >> 21) & 0x1) {
|
|
case 0x0:
|
|
/* 11110.00 010..... 0....... ........ */
|
|
if ((insn & 0x000f0000) == 0x000f0000) {
|
|
/* 11110.00 010.1111 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:114 */
|
|
disas_t32_extract_s_rxi_rot(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_MOV_rxi(ctx, &u.f_s_rri_rot)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:115 */
|
|
disas_t32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_ORR_rri(ctx, &u.f_s_rri_rot)) return true;
|
|
return false;
|
|
case 0x1:
|
|
/* 11110.00 011..... 0....... ........ */
|
|
if ((insn & 0x000f0000) == 0x000f0000) {
|
|
/* 11110.00 011.1111 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:118 */
|
|
disas_t32_extract_s_rxi_rot(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_MVN_rxi(ctx, &u.f_s_rri_rot)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:119 */
|
|
disas_t32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_ORN_rri(ctx, &u.f_s_rri_rot)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x2:
|
|
/* 11110.00 10...... 0....... ........ */
|
|
switch ((insn >> 21) & 0x1) {
|
|
case 0x0:
|
|
/* 11110.00 100..... 0....... ........ */
|
|
if ((insn & 0x00100f00) == 0x00100f00) {
|
|
/* 11110.00 1001.... 0...1111 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:122 */
|
|
disas_t32_extract_S_xri_rot(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_TEQ_xri(ctx, &u.f_s_rri_rot)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:123 */
|
|
disas_t32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_EOR_rri(ctx, &u.f_s_rri_rot)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x4:
|
|
/* 11110.01 00...... 0....... ........ */
|
|
switch ((insn >> 21) & 0x1) {
|
|
case 0x0:
|
|
/* 11110.01 000..... 0....... ........ */
|
|
if ((insn & 0x00100f00) == 0x00100f00) {
|
|
/* 11110.01 0001.... 0...1111 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:126 */
|
|
disas_t32_extract_S_xri_rot(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_CMN_xri(ctx, &u.f_s_rri_rot)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:127 */
|
|
disas_t32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_ADD_rri(ctx, &u.f_s_rri_rot)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x5:
|
|
/* 11110.01 01...... 0....... ........ */
|
|
disas_t32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
|
|
switch ((insn >> 21) & 0x1) {
|
|
case 0x0:
|
|
/* 11110.01 010..... 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:129 */
|
|
if (trans_ADC_rri(ctx, &u.f_s_rri_rot)) return true;
|
|
return false;
|
|
case 0x1:
|
|
/* 11110.01 011..... 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:130 */
|
|
if (trans_SBC_rri(ctx, &u.f_s_rri_rot)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x6:
|
|
/* 11110.01 10...... 0....... ........ */
|
|
switch ((insn >> 21) & 0x1) {
|
|
case 0x1:
|
|
/* 11110.01 101..... 0....... ........ */
|
|
if ((insn & 0x00100f00) == 0x00100f00) {
|
|
/* 11110.01 1011.... 0...1111 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:132 */
|
|
disas_t32_extract_S_xri_rot(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_CMP_xri(ctx, &u.f_s_rri_rot)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:133 */
|
|
disas_t32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_SUB_rri(ctx, &u.f_s_rri_rot)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x7:
|
|
/* 11110.01 11...... 0....... ........ */
|
|
disas_t32_extract_s_rri_rot(ctx, &u.f_s_rri_rot, insn);
|
|
switch ((insn >> 21) & 0x1) {
|
|
case 0x0:
|
|
/* 11110.01 110..... 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:135 */
|
|
if (trans_RSB_rri(ctx, &u.f_s_rri_rot)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x8:
|
|
/* 11110.10 00...... 0....... ........ */
|
|
switch ((insn >> 20) & 0x3) {
|
|
case 0x0:
|
|
/* 11110.10 0000.... 0....... ........ */
|
|
if ((insn & 0x000f0000) == 0x000f0000) {
|
|
/* 11110.10 00001111 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:145 */
|
|
disas_t32_extract_disas_t32_Fmt_9(ctx, &u.f_ri, insn);
|
|
if (trans_ADR(ctx, &u.f_ri)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:147 */
|
|
disas_t32_extract_s0_rri_12(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_ADD_rri(ctx, &u.f_s_rri_rot)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x9:
|
|
/* 11110.10 01...... 0....... ........ */
|
|
disas_t32_extract_mov16(ctx, &u.f_ri, insn);
|
|
switch ((insn >> 20) & 0x3) {
|
|
case 0x0:
|
|
/* 11110.10 0100.... 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:161 */
|
|
if (trans_MOVW(ctx, &u.f_ri)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xa:
|
|
/* 11110.10 10...... 0....... ........ */
|
|
switch ((insn >> 20) & 0x3) {
|
|
case 0x2:
|
|
/* 11110.10 1010.... 0....... ........ */
|
|
if ((insn & 0x000f0000) == 0x000f0000) {
|
|
/* 11110.10 10101111 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:150 */
|
|
disas_t32_extract_disas_t32_Fmt_10(ctx, &u.f_ri, insn);
|
|
if (trans_ADR(ctx, &u.f_ri)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:152 */
|
|
disas_t32_extract_s0_rri_12(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_SUB_rri(ctx, &u.f_s_rri_rot)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xb:
|
|
/* 11110.10 11...... 0....... ........ */
|
|
disas_t32_extract_mov16(ctx, &u.f_ri, insn);
|
|
switch ((insn >> 20) & 0x3) {
|
|
case 0x0:
|
|
/* 11110.10 1100.... 0....... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:162 */
|
|
if (trans_MOVT(ctx, &u.f_ri)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xc:
|
|
/* 11110.11 00...... 0....... ........ */
|
|
switch (insn & 0x04100020) {
|
|
case 0x00000000:
|
|
/* 11110011 00.0.... 0....... ..0..... */
|
|
if ((insn & 0x002070c0) == 0x00200000) {
|
|
/* 11110011 0010.... 0000.... 000..... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:172 */
|
|
disas_t32_extract_sat16(ctx, &u.f_sat, insn);
|
|
if (trans_SSAT16(ctx, &u.f_sat)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:173 */
|
|
disas_t32_extract_sat(ctx, &u.f_sat, insn);
|
|
if (trans_SSAT(ctx, &u.f_sat)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xd:
|
|
/* 11110.11 01...... 0....... ........ */
|
|
switch (insn & 0x04300020) {
|
|
case 0x00000000:
|
|
/* 11110011 0100.... 0....... ..0..... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:185 */
|
|
disas_t32_extract_bfx(ctx, &u.f_bfx, insn);
|
|
if (trans_SBFX(ctx, &u.f_bfx)) return true;
|
|
return false;
|
|
case 0x00200000:
|
|
/* 11110011 0110.... 0....... ..0..... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:189 */
|
|
disas_t32_extract_bfi(ctx, &u.f_bfi, insn);
|
|
if (trans_BFCI(ctx, &u.f_bfi)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xe:
|
|
/* 11110.11 10...... 0....... ........ */
|
|
switch (insn & 0x04100020) {
|
|
case 0x00000000:
|
|
/* 11110011 10.0.... 0....... ..0..... */
|
|
if ((insn & 0x002070c0) == 0x00200000) {
|
|
/* 11110011 1010.... 0000.... 000..... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:176 */
|
|
disas_t32_extract_sat16(ctx, &u.f_sat, insn);
|
|
if (trans_USAT16(ctx, &u.f_sat)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:177 */
|
|
disas_t32_extract_sat(ctx, &u.f_sat, insn);
|
|
if (trans_USAT(ctx, &u.f_sat)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0xf:
|
|
/* 11110.11 11...... 0....... ........ */
|
|
disas_t32_extract_bfx(ctx, &u.f_bfx, insn);
|
|
switch (insn & 0x04300020) {
|
|
case 0x00000000:
|
|
/* 11110011 1100.... 0....... ..0..... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:186 */
|
|
if (trans_UBFX(ctx, &u.f_bfx)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x1:
|
|
/* 11110... ........ 1....... ........ */
|
|
switch (insn & 0x00005000) {
|
|
case 0x00000000:
|
|
/* 11110... ........ 10.0.... ........ */
|
|
if ((insn & 0x03800000) == 0x03800000) {
|
|
/* 11110.11 1....... 10.0.... ........ */
|
|
if ((insn & 0x047f2f00) == 0x002f0000) {
|
|
/* 11110011 10101111 10000000 ........ */
|
|
if ((insn & 0x000000ff) == 0x00000001) {
|
|
/* 11110011 10101111 10000000 00000001 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:297 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_YIELD(ctx, &u.f_empty)) return true;
|
|
}
|
|
if ((insn & 0x000000ff) == 0x00000002) {
|
|
/* 11110011 10101111 10000000 00000010 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:298 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_WFE(ctx, &u.f_empty)) return true;
|
|
}
|
|
if ((insn & 0x000000ff) == 0x00000003) {
|
|
/* 11110011 10101111 10000000 00000011 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:299 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_WFI(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:307 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
if ((insn & 0x047f2800) == 0x002f0000) {
|
|
/* 11110011 10101111 10000... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:311 */
|
|
disas_t32_extract_disas_t32_Fmt_23(ctx, &u.f_cps, insn);
|
|
if (trans_CPS(ctx, &u.f_cps)) return true;
|
|
}
|
|
if ((insn & 0x047f2f80) == 0x003f0f00) {
|
|
/* 11110011 10111111 10001111 0....... */
|
|
if ((insn & 0x0000007f) == 0x0000002f) {
|
|
/* 11110011 10111111 10001111 00101111 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:316 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_CLREX(ctx, &u.f_empty)) return true;
|
|
}
|
|
if ((insn & 0x00000070) == 0x00000040) {
|
|
/* 11110011 10111111 10001111 0100.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:317 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_DSB(ctx, &u.f_empty)) return true;
|
|
}
|
|
if ((insn & 0x00000070) == 0x00000050) {
|
|
/* 11110011 10111111 10001111 0101.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:318 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_DMB(ctx, &u.f_empty)) return true;
|
|
}
|
|
if ((insn & 0x00000070) == 0x00000060) {
|
|
/* 11110011 10111111 10001111 0110.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:319 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_ISB(ctx, &u.f_empty)) return true;
|
|
}
|
|
if ((insn & 0x0000007f) == 0x00000070) {
|
|
/* 11110011 10111111 10001111 01110000 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:320 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_SB(ctx, &u.f_empty)) return true;
|
|
}
|
|
}
|
|
if ((insn & 0x04602000) == 0x00600000) {
|
|
/* 11110011 111..... 1000.... ........ */
|
|
if ((insn & 0x000000ef) == 0x00000020) {
|
|
/* 11110011 111..... 1000.... 001.0000 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:325 */
|
|
disas_t32_extract_disas_t32_Fmt_24(ctx, &u.f_mrs_bank, insn);
|
|
if (trans_MRS_bank(ctx, &u.f_mrs_bank)) return true;
|
|
}
|
|
if ((insn & 0x000f00ff) == 0x000f0000) {
|
|
/* 11110011 111.1111 1000.... 00000000 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:327 */
|
|
disas_t32_extract_disas_t32_Fmt_25(ctx, &u.f_mrs_reg, insn);
|
|
if (trans_MRS_reg(ctx, &u.f_mrs_reg)) return true;
|
|
}
|
|
if ((insn & 0x001f0000) == 0x000f0000) {
|
|
/* 11110011 11101111 1000.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:328 */
|
|
disas_t32_extract_disas_t32_Fmt_26(ctx, &u.f_disas_t3227, insn);
|
|
if (trans_MRS_v7m(ctx, &u.f_disas_t3227)) return true;
|
|
}
|
|
}
|
|
if ((insn & 0x04602000) == 0x00000000) {
|
|
/* 11110011 100..... 1000.... ........ */
|
|
if ((insn & 0x000000ef) == 0x00000020) {
|
|
/* 11110011 100..... 1000.... 001.0000 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:331 */
|
|
disas_t32_extract_disas_t32_Fmt_27(ctx, &u.f_msr_bank, insn);
|
|
if (trans_MSR_bank(ctx, &u.f_msr_bank)) return true;
|
|
}
|
|
if ((insn & 0x000000ff) == 0x00000000) {
|
|
/* 11110011 100..... 1000.... 00000000 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:333 */
|
|
disas_t32_extract_disas_t32_Fmt_28(ctx, &u.f_msr_reg, insn);
|
|
if (trans_MSR_reg(ctx, &u.f_msr_reg)) return true;
|
|
}
|
|
if ((insn & 0x00100300) == 0x00000000) {
|
|
/* 11110011 1000.... 1000..00 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:334 */
|
|
disas_t32_extract_disas_t32_Fmt_29(ctx, &u.f_disas_t3228, insn);
|
|
if (trans_MSR_v7m(ctx, &u.f_disas_t3228)) return true;
|
|
}
|
|
}
|
|
if ((insn & 0x04702fff) == 0x00400f00) {
|
|
/* 11110011 1100.... 10001111 00000000 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:336 */
|
|
disas_t32_extract_disas_t32_Fmt_30(ctx, &u.f_r, insn);
|
|
if (trans_BXJ(ctx, &u.f_r)) return true;
|
|
}
|
|
if ((insn & 0x047f2f00) == 0x005e0f00) {
|
|
/* 11110011 11011110 10001111 ........ */
|
|
if ((insn & 0x000000ff) == 0x00000000) {
|
|
/* 11110011 11011110 10001111 00000000 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:341 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_ERET(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:342 */
|
|
disas_t32_extract_disas_t32_Fmt_31(ctx, &u.f_s_rri_rot, insn);
|
|
if (trans_SUB_rri(ctx, &u.f_s_rri_rot)) return true;
|
|
}
|
|
if ((insn & 0x04702fff) == 0x04700000) {
|
|
/* 11110111 1111.... 10000000 00000000 */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:345 */
|
|
disas_t32_extract_disas_t32_Fmt_32(ctx, &u.f_i, insn);
|
|
if (trans_SMC(ctx, &u.f_i)) return true;
|
|
}
|
|
if ((insn & 0x04702000) == 0x04600000) {
|
|
/* 11110111 1110.... 1000.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:346 */
|
|
disas_t32_extract_disas_t32_Fmt_33(ctx, &u.f_i, insn);
|
|
if (trans_HVC(ctx, &u.f_i)) return true;
|
|
}
|
|
if ((insn & 0x04702000) == 0x04702000) {
|
|
/* 11110111 1111.... 1010.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:348 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_UDF(ctx, &u.f_empty)) return true;
|
|
}
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:350 */
|
|
disas_t32_extract_disas_t32_Fmt_34(ctx, &u.f_ci, insn);
|
|
if (trans_B_cond_thumb(ctx, &u.f_ci)) return true;
|
|
return false;
|
|
case 0x00001000:
|
|
/* 11110... ........ 10.1.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:629 */
|
|
disas_t32_extract_branch24(ctx, &u.f_i, insn);
|
|
if (trans_B(ctx, &u.f_i)) return true;
|
|
return false;
|
|
case 0x00004000:
|
|
/* 11110... ........ 11.0.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:631 */
|
|
disas_t32_extract_branch24(ctx, &u.f_i, insn);
|
|
if (trans_BLX_i(ctx, &u.f_i)) return true;
|
|
return false;
|
|
case 0x00005000:
|
|
/* 11110... ........ 11.1.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:630 */
|
|
disas_t32_extract_branch24(ctx, &u.f_i, insn);
|
|
if (trans_BL(ctx, &u.f_i)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x1f:
|
|
/* 11111... ........ ........ ........ */
|
|
switch ((insn >> 24) & 0x7) {
|
|
case 0x0:
|
|
/* 11111000 ........ ........ ........ */
|
|
switch ((insn >> 20) & 0x7) {
|
|
case 0x0:
|
|
/* 11111000 .000.... ........ ........ */
|
|
switch ((insn >> 23) & 0x1) {
|
|
case 0x0:
|
|
/* 11111000 0000.... ........ ........ */
|
|
switch (insn & 0x00000900) {
|
|
case 0x00000000:
|
|
/* 11111000 0000.... ....0..0 ........ */
|
|
disas_t32_extract_ldst_rr(ctx, &u.f_ldst_rr, insn);
|
|
switch (insn & 0x000006c0) {
|
|
case 0x00000000:
|
|
/* 11111000 0000.... ....0000 00...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:368 */
|
|
if (trans_STRB_rr(ctx, &u.f_ldst_rr)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x00000800:
|
|
/* 11111000 0000.... ....1..0 ........ */
|
|
switch ((insn >> 9) & 0x3) {
|
|
case 0x2:
|
|
/* 11111000 0000.... ....1100 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:370 */
|
|
disas_t32_extract_ldst_ri_neg(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_STRB_ri(ctx, &u.f_ldst_ri)) return true;
|
|
return false;
|
|
case 0x3:
|
|
/* 11111000 0000.... ....1110 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:371 */
|
|
disas_t32_extract_ldst_ri_unp(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_STRBT_ri(ctx, &u.f_ldst_ri)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x00000900:
|
|
/* 11111000 0000.... ....1..1 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:369 */
|
|
disas_t32_extract_ldst_ri_idx(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_STRB_ri(ctx, &u.f_ldst_ri)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x1:
|
|
/* 11111000 1000.... ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:372 */
|
|
disas_t32_extract_ldst_ri_pos(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_STRB_ri(ctx, &u.f_ldst_ri)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x1:
|
|
/* 11111000 .001.... ........ ........ */
|
|
if ((insn & 0x000f0000) == 0x000f0000) {
|
|
/* 11111000 .0011111 ........ ........ */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111000 .0011111 1111.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:389 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:390 */
|
|
disas_t32_extract_ldst_ri_lit(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRB_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800000) == 0x00800000) {
|
|
/* 11111000 1001.... ........ ........ */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111000 1001.... 1111.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:393 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:394 */
|
|
disas_t32_extract_ldst_ri_pos(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRB_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800900) == 0x00000900) {
|
|
/* 11111000 0001.... ....1..1 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:396 */
|
|
disas_t32_extract_ldst_ri_idx(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRB_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800f00) == 0x00000c00) {
|
|
/* 11111000 0001.... ....1100 ........ */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111000 0001.... 11111100 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:398 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:399 */
|
|
disas_t32_extract_ldst_ri_neg(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRB_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800f00) == 0x00000e00) {
|
|
/* 11111000 0001.... ....1110 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:401 */
|
|
disas_t32_extract_ldst_ri_unp(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRBT_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800fc0) == 0x00000000) {
|
|
/* 11111000 0001.... ....0000 00...... */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111000 0001.... 11110000 00...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:403 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:404 */
|
|
disas_t32_extract_ldst_rr(ctx, &u.f_ldst_rr, insn);
|
|
if (trans_LDRB_rr(ctx, &u.f_ldst_rr)) return true;
|
|
}
|
|
return false;
|
|
case 0x2:
|
|
/* 11111000 .010.... ........ ........ */
|
|
switch ((insn >> 23) & 0x1) {
|
|
case 0x0:
|
|
/* 11111000 0010.... ........ ........ */
|
|
switch (insn & 0x00000900) {
|
|
case 0x00000000:
|
|
/* 11111000 0010.... ....0..0 ........ */
|
|
disas_t32_extract_ldst_rr(ctx, &u.f_ldst_rr, insn);
|
|
switch (insn & 0x000006c0) {
|
|
case 0x00000000:
|
|
/* 11111000 0010.... ....0000 00...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:374 */
|
|
if (trans_STRH_rr(ctx, &u.f_ldst_rr)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x00000800:
|
|
/* 11111000 0010.... ....1..0 ........ */
|
|
switch ((insn >> 9) & 0x3) {
|
|
case 0x2:
|
|
/* 11111000 0010.... ....1100 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:376 */
|
|
disas_t32_extract_ldst_ri_neg(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_STRH_ri(ctx, &u.f_ldst_ri)) return true;
|
|
return false;
|
|
case 0x3:
|
|
/* 11111000 0010.... ....1110 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:377 */
|
|
disas_t32_extract_ldst_ri_unp(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_STRHT_ri(ctx, &u.f_ldst_ri)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x00000900:
|
|
/* 11111000 0010.... ....1..1 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:375 */
|
|
disas_t32_extract_ldst_ri_idx(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_STRH_ri(ctx, &u.f_ldst_ri)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x1:
|
|
/* 11111000 1010.... ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:378 */
|
|
disas_t32_extract_ldst_ri_pos(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_STRH_ri(ctx, &u.f_ldst_ri)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x3:
|
|
/* 11111000 .011.... ........ ........ */
|
|
if ((insn & 0x000f0000) == 0x000f0000) {
|
|
/* 11111000 .0111111 ........ ........ */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111000 .0111111 1111.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:409 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:410 */
|
|
disas_t32_extract_ldst_ri_lit(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRH_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800000) == 0x00800000) {
|
|
/* 11111000 1011.... ........ ........ */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111000 1011.... 1111.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:413 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:414 */
|
|
disas_t32_extract_ldst_ri_pos(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRH_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800900) == 0x00000900) {
|
|
/* 11111000 0011.... ....1..1 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:416 */
|
|
disas_t32_extract_ldst_ri_idx(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRH_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800f00) == 0x00000c00) {
|
|
/* 11111000 0011.... ....1100 ........ */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111000 0011.... 11111100 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:418 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:419 */
|
|
disas_t32_extract_ldst_ri_neg(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRH_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800f00) == 0x00000e00) {
|
|
/* 11111000 0011.... ....1110 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:421 */
|
|
disas_t32_extract_ldst_ri_unp(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRHT_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800fc0) == 0x00000000) {
|
|
/* 11111000 0011.... ....0000 00...... */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111000 0011.... 11110000 00...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:423 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:424 */
|
|
disas_t32_extract_ldst_rr(ctx, &u.f_ldst_rr, insn);
|
|
if (trans_LDRH_rr(ctx, &u.f_ldst_rr)) return true;
|
|
}
|
|
return false;
|
|
case 0x4:
|
|
/* 11111000 .100.... ........ ........ */
|
|
switch ((insn >> 23) & 0x1) {
|
|
case 0x0:
|
|
/* 11111000 0100.... ........ ........ */
|
|
switch (insn & 0x00000900) {
|
|
case 0x00000000:
|
|
/* 11111000 0100.... ....0..0 ........ */
|
|
disas_t32_extract_ldst_rr(ctx, &u.f_ldst_rr, insn);
|
|
switch (insn & 0x000006c0) {
|
|
case 0x00000000:
|
|
/* 11111000 0100.... ....0000 00...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:380 */
|
|
if (trans_STR_rr(ctx, &u.f_ldst_rr)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x00000800:
|
|
/* 11111000 0100.... ....1..0 ........ */
|
|
switch ((insn >> 9) & 0x3) {
|
|
case 0x2:
|
|
/* 11111000 0100.... ....1100 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:382 */
|
|
disas_t32_extract_ldst_ri_neg(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_STR_ri(ctx, &u.f_ldst_ri)) return true;
|
|
return false;
|
|
case 0x3:
|
|
/* 11111000 0100.... ....1110 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:383 */
|
|
disas_t32_extract_ldst_ri_unp(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_STRT_ri(ctx, &u.f_ldst_ri)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x00000900:
|
|
/* 11111000 0100.... ....1..1 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:381 */
|
|
disas_t32_extract_ldst_ri_idx(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_STR_ri(ctx, &u.f_ldst_ri)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x1:
|
|
/* 11111000 1100.... ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:384 */
|
|
disas_t32_extract_ldst_ri_pos(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_STR_ri(ctx, &u.f_ldst_ri)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x5:
|
|
/* 11111000 .101.... ........ ........ */
|
|
if ((insn & 0x000f0000) == 0x000f0000) {
|
|
/* 11111000 .1011111 ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:428 */
|
|
disas_t32_extract_ldst_ri_lit(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDR_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800000) == 0x00800000) {
|
|
/* 11111000 1101.... ........ ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:429 */
|
|
disas_t32_extract_ldst_ri_pos(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDR_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800900) == 0x00000900) {
|
|
/* 11111000 0101.... ....1..1 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:430 */
|
|
disas_t32_extract_ldst_ri_idx(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDR_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800f00) == 0x00000c00) {
|
|
/* 11111000 0101.... ....1100 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:431 */
|
|
disas_t32_extract_ldst_ri_neg(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDR_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800f00) == 0x00000e00) {
|
|
/* 11111000 0101.... ....1110 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:432 */
|
|
disas_t32_extract_ldst_ri_unp(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRT_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800fc0) == 0x00000000) {
|
|
/* 11111000 0101.... ....0000 00...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:433 */
|
|
disas_t32_extract_ldst_rr(ctx, &u.f_ldst_rr, insn);
|
|
if (trans_LDR_rr(ctx, &u.f_ldst_rr)) return true;
|
|
}
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x1:
|
|
/* 11111001 ........ ........ ........ */
|
|
switch ((insn >> 20) & 0x7) {
|
|
case 0x1:
|
|
/* 11111001 .001.... ........ ........ */
|
|
if ((insn & 0x000f0000) == 0x000f0000) {
|
|
/* 11111001 .0011111 ........ ........ */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111001 .0011111 1111.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:438 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:439 */
|
|
disas_t32_extract_ldst_ri_lit(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRSB_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800000) == 0x00800000) {
|
|
/* 11111001 1001.... ........ ........ */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111001 1001.... 1111.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:442 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:443 */
|
|
disas_t32_extract_ldst_ri_pos(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRSB_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800900) == 0x00000900) {
|
|
/* 11111001 0001.... ....1..1 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:445 */
|
|
disas_t32_extract_ldst_ri_idx(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRSB_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800f00) == 0x00000c00) {
|
|
/* 11111001 0001.... ....1100 ........ */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111001 0001.... 11111100 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:447 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:448 */
|
|
disas_t32_extract_ldst_ri_neg(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRSB_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800f00) == 0x00000e00) {
|
|
/* 11111001 0001.... ....1110 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:450 */
|
|
disas_t32_extract_ldst_ri_unp(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRSBT_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800fc0) == 0x00000000) {
|
|
/* 11111001 0001.... ....0000 00...... */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111001 0001.... 11110000 00...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:452 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:453 */
|
|
disas_t32_extract_ldst_rr(ctx, &u.f_ldst_rr, insn);
|
|
if (trans_LDRSB_rr(ctx, &u.f_ldst_rr)) return true;
|
|
}
|
|
return false;
|
|
case 0x3:
|
|
/* 11111001 .011.... ........ ........ */
|
|
if ((insn & 0x000f0000) == 0x000f0000) {
|
|
/* 11111001 .0111111 ........ ........ */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111001 .0111111 1111.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:459 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:460 */
|
|
disas_t32_extract_ldst_ri_lit(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRSH_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800000) == 0x00800000) {
|
|
/* 11111001 1011.... ........ ........ */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111001 1011.... 1111.... ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:463 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:464 */
|
|
disas_t32_extract_ldst_ri_pos(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRSH_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800900) == 0x00000900) {
|
|
/* 11111001 0011.... ....1..1 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:466 */
|
|
disas_t32_extract_ldst_ri_idx(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRSH_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800f00) == 0x00000c00) {
|
|
/* 11111001 0011.... ....1100 ........ */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111001 0011.... 11111100 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:468 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:469 */
|
|
disas_t32_extract_ldst_ri_neg(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRSH_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800f00) == 0x00000e00) {
|
|
/* 11111001 0011.... ....1110 ........ */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:471 */
|
|
disas_t32_extract_ldst_ri_unp(ctx, &u.f_ldst_ri, insn);
|
|
if (trans_LDRSHT_ri(ctx, &u.f_ldst_ri)) return true;
|
|
}
|
|
if ((insn & 0x00800fc0) == 0x00000000) {
|
|
/* 11111001 0011.... ....0000 00...... */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111001 0011.... 11110000 00...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:473 */
|
|
disas_t32_extract_disas_t32_Fmt_22(ctx, &u.f_empty, insn);
|
|
if (trans_NOP(ctx, &u.f_empty)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:474 */
|
|
disas_t32_extract_ldst_rr(ctx, &u.f_ldst_rr, insn);
|
|
if (trans_LDRSH_rr(ctx, &u.f_ldst_rr)) return true;
|
|
}
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x2:
|
|
/* 11111010 ........ ........ ........ */
|
|
switch (insn & 0x0080f0c0) {
|
|
case 0x0000f000:
|
|
/* 11111010 0....... 1111.... 00...... */
|
|
disas_t32_extract_disas_t32_Fmt_4(ctx, &u.f_s_rrr_shr, insn);
|
|
switch ((insn >> 4) & 0x3) {
|
|
case 0x0:
|
|
/* 11111010 0....... 1111.... 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:93 */
|
|
if (trans_MOV_rxrr(ctx, &u.f_s_rrr_shr)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x0000f080:
|
|
/* 11111010 0....... 1111.... 10...... */
|
|
disas_t32_extract_rrr_rot(ctx, &u.f_rrr_rot, insn);
|
|
switch ((insn >> 20) & 0x7) {
|
|
case 0x0:
|
|
/* 11111010 0000.... 1111.... 10...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:596 */
|
|
if (trans_SXTAH(ctx, &u.f_rrr_rot)) return true;
|
|
return false;
|
|
case 0x1:
|
|
/* 11111010 0001.... 1111.... 10...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:597 */
|
|
if (trans_UXTAH(ctx, &u.f_rrr_rot)) return true;
|
|
return false;
|
|
case 0x2:
|
|
/* 11111010 0010.... 1111.... 10...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:598 */
|
|
if (trans_SXTAB16(ctx, &u.f_rrr_rot)) return true;
|
|
return false;
|
|
case 0x3:
|
|
/* 11111010 0011.... 1111.... 10...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:599 */
|
|
if (trans_UXTAB16(ctx, &u.f_rrr_rot)) return true;
|
|
return false;
|
|
case 0x4:
|
|
/* 11111010 0100.... 1111.... 10...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:600 */
|
|
if (trans_SXTAB(ctx, &u.f_rrr_rot)) return true;
|
|
return false;
|
|
case 0x5:
|
|
/* 11111010 0101.... 1111.... 10...... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:601 */
|
|
if (trans_UXTAB(ctx, &u.f_rrr_rot)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x0080f000:
|
|
/* 11111010 1....... 1111.... 00...... */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
switch (insn & 0x00700030) {
|
|
case 0x00000000:
|
|
/* 11111010 1000.... 1111.... 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:550 */
|
|
if (trans_SADD8(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00000010:
|
|
/* 11111010 1000.... 1111.... 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:551 */
|
|
if (trans_QADD8(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00000020:
|
|
/* 11111010 1000.... 1111.... 0010.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:552 */
|
|
if (trans_SHADD8(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00100000:
|
|
/* 11111010 1001.... 1111.... 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:557 */
|
|
if (trans_SADD16(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00100010:
|
|
/* 11111010 1001.... 1111.... 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:558 */
|
|
if (trans_QADD16(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00100020:
|
|
/* 11111010 1001.... 1111.... 0010.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:559 */
|
|
if (trans_SHADD16(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00200000:
|
|
/* 11111010 1010.... 1111.... 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:564 */
|
|
if (trans_SASX(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00200010:
|
|
/* 11111010 1010.... 1111.... 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:565 */
|
|
if (trans_QASX(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00200020:
|
|
/* 11111010 1010.... 1111.... 0010.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:566 */
|
|
if (trans_SHASX(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00400000:
|
|
/* 11111010 1100.... 1111.... 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:571 */
|
|
if (trans_SSUB8(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00400010:
|
|
/* 11111010 1100.... 1111.... 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:572 */
|
|
if (trans_QSUB8(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00400020:
|
|
/* 11111010 1100.... 1111.... 0010.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:573 */
|
|
if (trans_SHSUB8(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00500000:
|
|
/* 11111010 1101.... 1111.... 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:578 */
|
|
if (trans_SSUB16(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00500010:
|
|
/* 11111010 1101.... 1111.... 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:579 */
|
|
if (trans_QSUB16(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00500020:
|
|
/* 11111010 1101.... 1111.... 0010.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:580 */
|
|
if (trans_SHSUB16(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00600000:
|
|
/* 11111010 1110.... 1111.... 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:585 */
|
|
if (trans_SSAX(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00600010:
|
|
/* 11111010 1110.... 1111.... 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:586 */
|
|
if (trans_QSAX(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00600020:
|
|
/* 11111010 1110.... 1111.... 0010.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:587 */
|
|
if (trans_SHSAX(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x0080f040:
|
|
/* 11111010 1....... 1111.... 01...... */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
switch (insn & 0x00700030) {
|
|
case 0x00000000:
|
|
/* 11111010 1000.... 1111.... 0100.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:553 */
|
|
if (trans_UADD8(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00000010:
|
|
/* 11111010 1000.... 1111.... 0101.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:554 */
|
|
if (trans_UQADD8(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00000020:
|
|
/* 11111010 1000.... 1111.... 0110.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:555 */
|
|
if (trans_UHADD8(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00100000:
|
|
/* 11111010 1001.... 1111.... 0100.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:560 */
|
|
if (trans_UADD16(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00100010:
|
|
/* 11111010 1001.... 1111.... 0101.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:561 */
|
|
if (trans_UQADD16(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00100020:
|
|
/* 11111010 1001.... 1111.... 0110.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:562 */
|
|
if (trans_UHADD16(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00200000:
|
|
/* 11111010 1010.... 1111.... 0100.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:567 */
|
|
if (trans_UASX(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00200010:
|
|
/* 11111010 1010.... 1111.... 0101.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:568 */
|
|
if (trans_UQASX(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00200020:
|
|
/* 11111010 1010.... 1111.... 0110.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:569 */
|
|
if (trans_UHASX(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00400000:
|
|
/* 11111010 1100.... 1111.... 0100.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:574 */
|
|
if (trans_USUB8(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00400010:
|
|
/* 11111010 1100.... 1111.... 0101.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:575 */
|
|
if (trans_UQSUB8(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00400020:
|
|
/* 11111010 1100.... 1111.... 0110.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:576 */
|
|
if (trans_UHSUB8(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00500000:
|
|
/* 11111010 1101.... 1111.... 0100.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:581 */
|
|
if (trans_USUB16(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00500010:
|
|
/* 11111010 1101.... 1111.... 0101.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:582 */
|
|
if (trans_UQSUB16(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00500020:
|
|
/* 11111010 1101.... 1111.... 0110.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:583 */
|
|
if (trans_UHSUB16(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00600000:
|
|
/* 11111010 1110.... 1111.... 0100.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:588 */
|
|
if (trans_USAX(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00600010:
|
|
/* 11111010 1110.... 1111.... 0101.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:589 */
|
|
if (trans_UQSAX(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00600020:
|
|
/* 11111010 1110.... 1111.... 0110.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:590 */
|
|
if (trans_UHSAX(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x0080f080:
|
|
/* 11111010 1....... 1111.... 10...... */
|
|
switch (insn & 0x00700030) {
|
|
case 0x00000000:
|
|
/* 11111010 1000.... 1111.... 1000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:262 */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
if (trans_QADD(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00000010:
|
|
/* 11111010 1000.... 1111.... 1001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:264 */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
if (trans_QDADD(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00000020:
|
|
/* 11111010 1000.... 1111.... 1010.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:263 */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
if (trans_QSUB(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00000030:
|
|
/* 11111010 1000.... 1111.... 1011.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:265 */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
if (trans_QDSUB(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00100000:
|
|
/* 11111010 1001.... 1111.... 1000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:277 */
|
|
disas_t32_extract_rdm(ctx, &u.f_rr, insn);
|
|
if (trans_REV(ctx, &u.f_rr)) return true;
|
|
return false;
|
|
case 0x00100010:
|
|
/* 11111010 1001.... 1111.... 1001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:278 */
|
|
disas_t32_extract_rdm(ctx, &u.f_rr, insn);
|
|
if (trans_REV16(ctx, &u.f_rr)) return true;
|
|
return false;
|
|
case 0x00100020:
|
|
/* 11111010 1001.... 1111.... 1010.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:279 */
|
|
disas_t32_extract_rdm(ctx, &u.f_rr, insn);
|
|
if (trans_RBIT(ctx, &u.f_rr)) return true;
|
|
return false;
|
|
case 0x00100030:
|
|
/* 11111010 1001.... 1111.... 1011.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:280 */
|
|
disas_t32_extract_rdm(ctx, &u.f_rr, insn);
|
|
if (trans_REVSH(ctx, &u.f_rr)) return true;
|
|
return false;
|
|
case 0x00200000:
|
|
/* 11111010 1010.... 1111.... 1000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:274 */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
if (trans_SEL(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00300000:
|
|
/* 11111010 1011.... 1111.... 1000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:281 */
|
|
disas_t32_extract_rdm(ctx, &u.f_rr, insn);
|
|
if (trans_CLZ(ctx, &u.f_rr)) return true;
|
|
return false;
|
|
case 0x00400000:
|
|
/* 11111010 1100.... 1111.... 1000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:267 */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
if (trans_CRC32B(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00400010:
|
|
/* 11111010 1100.... 1111.... 1001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:268 */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
if (trans_CRC32H(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00400020:
|
|
/* 11111010 1100.... 1111.... 1010.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:269 */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
if (trans_CRC32W(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00500000:
|
|
/* 11111010 1101.... 1111.... 1000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:270 */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
if (trans_CRC32CB(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00500010:
|
|
/* 11111010 1101.... 1111.... 1001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:271 */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
if (trans_CRC32CH(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
case 0x00500020:
|
|
/* 11111010 1101.... 1111.... 1010.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:272 */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
if (trans_CRC32CW(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x3:
|
|
/* 11111011 ........ ........ ........ */
|
|
switch (insn & 0x00f000f0) {
|
|
case 0x00000000:
|
|
/* 11111011 0000.... ........ 0000.... */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111011 0000.... 1111.... 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:201 */
|
|
disas_t32_extract_s0_rn0dm(ctx, &u.f_s_rrrr, insn);
|
|
if (trans_MUL(ctx, &u.f_s_rrrr)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:202 */
|
|
disas_t32_extract_s0_rnadm(ctx, &u.f_s_rrrr, insn);
|
|
if (trans_MLA(ctx, &u.f_s_rrrr)) return true;
|
|
return false;
|
|
case 0x00000010:
|
|
/* 11111011 0000.... ........ 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:204 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_MLS(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00100000:
|
|
/* 11111011 0001.... ........ 0000.... */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111011 0001.... 1111.... 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:219 */
|
|
disas_t32_extract_rn0dm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMULBB(ctx, &u.f_rrrr)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:220 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLABB(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00100010:
|
|
/* 11111011 0001.... ........ 0001.... */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111011 0001.... 1111.... 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:223 */
|
|
disas_t32_extract_rn0dm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMULBT(ctx, &u.f_rrrr)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:224 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLABT(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00100020:
|
|
/* 11111011 0001.... ........ 0010.... */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111011 0001.... 1111.... 0010.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:227 */
|
|
disas_t32_extract_rn0dm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMULTB(ctx, &u.f_rrrr)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:228 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLATB(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00100030:
|
|
/* 11111011 0001.... ........ 0011.... */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111011 0001.... 1111.... 0011.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:231 */
|
|
disas_t32_extract_rn0dm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMULTT(ctx, &u.f_rrrr)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:232 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLATT(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00200000:
|
|
/* 11111011 0010.... ........ 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:242 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLAD(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00200010:
|
|
/* 11111011 0010.... ........ 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:243 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLADX(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00300000:
|
|
/* 11111011 0011.... ........ 0000.... */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111011 0011.... 1111.... 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:211 */
|
|
disas_t32_extract_rn0dm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMULWB(ctx, &u.f_rrrr)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:212 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLAWB(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00300010:
|
|
/* 11111011 0011.... ........ 0001.... */
|
|
if ((insn & 0x0000f000) == 0x0000f000) {
|
|
/* 11111011 0011.... 1111.... 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:215 */
|
|
disas_t32_extract_rn0dm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMULWT(ctx, &u.f_rrrr)) return true;
|
|
}
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:216 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLAWT(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00400000:
|
|
/* 11111011 0100.... ........ 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:244 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLSD(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00400010:
|
|
/* 11111011 0100.... ........ 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:245 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLSDX(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00500000:
|
|
/* 11111011 0101.... ........ 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:252 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMMLA(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00500010:
|
|
/* 11111011 0101.... ........ 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:253 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMMLAR(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00600000:
|
|
/* 11111011 0110.... ........ 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:254 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMMLS(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00600010:
|
|
/* 11111011 0110.... ........ 0001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:255 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMMLSR(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00700000:
|
|
/* 11111011 0111.... ........ 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:240 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_USADA8(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00800000:
|
|
/* 11111011 1000.... ........ 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:205 */
|
|
disas_t32_extract_s0_rnadm(ctx, &u.f_s_rrrr, insn);
|
|
if (trans_SMULL(ctx, &u.f_s_rrrr)) return true;
|
|
return false;
|
|
case 0x009000f0:
|
|
/* 11111011 1001.... ........ 1111.... */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
switch ((insn >> 12) & 0xf) {
|
|
case 0xf:
|
|
/* 11111011 1001.... 1111.... 1111.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:257 */
|
|
if (trans_SDIV(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x00a00000:
|
|
/* 11111011 1010.... ........ 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:206 */
|
|
disas_t32_extract_s0_rnadm(ctx, &u.f_s_rrrr, insn);
|
|
if (trans_UMULL(ctx, &u.f_s_rrrr)) return true;
|
|
return false;
|
|
case 0x00b000f0:
|
|
/* 11111011 1011.... ........ 1111.... */
|
|
disas_t32_extract_rndm(ctx, &u.f_rrr, insn);
|
|
switch ((insn >> 12) & 0xf) {
|
|
case 0xf:
|
|
/* 11111011 1011.... 1111.... 1111.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:258 */
|
|
if (trans_UDIV(ctx, &u.f_rrr)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
case 0x00c00000:
|
|
/* 11111011 1100.... ........ 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:207 */
|
|
disas_t32_extract_s0_rnadm(ctx, &u.f_s_rrrr, insn);
|
|
if (trans_SMLAL(ctx, &u.f_s_rrrr)) return true;
|
|
return false;
|
|
case 0x00c00080:
|
|
/* 11111011 1100.... ........ 1000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:234 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLALBB(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00c00090:
|
|
/* 11111011 1100.... ........ 1001.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:235 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLALBT(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00c000a0:
|
|
/* 11111011 1100.... ........ 1010.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:236 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLALTB(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00c000b0:
|
|
/* 11111011 1100.... ........ 1011.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:237 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLALTT(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00c000c0:
|
|
/* 11111011 1100.... ........ 1100.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:247 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLALD(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00c000d0:
|
|
/* 11111011 1100.... ........ 1101.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:248 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLALDX(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00d000c0:
|
|
/* 11111011 1101.... ........ 1100.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:249 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLSLD(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00d000d0:
|
|
/* 11111011 1101.... ........ 1101.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:250 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_SMLSLDX(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
case 0x00e00000:
|
|
/* 11111011 1110.... ........ 0000.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:208 */
|
|
disas_t32_extract_s0_rnadm(ctx, &u.f_s_rrrr, insn);
|
|
if (trans_UMLAL(ctx, &u.f_s_rrrr)) return true;
|
|
return false;
|
|
case 0x00e00060:
|
|
/* 11111011 1110.... ........ 0110.... */
|
|
/* /mnt/c/Users/me/Documents/projects/unicorn2/tmp/tmp/qemu-5.0.0/target/arm/t32.decode:209 */
|
|
disas_t32_extract_rnadm(ctx, &u.f_rrrr, insn);
|
|
if (trans_UMAAL(ctx, &u.f_rrrr)) return true;
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|