2396 lines
133 KiB
C
2396 lines
133 KiB
C
/* Autogen header for Unicorn Engine - DONOT MODIFY */
|
|
#ifndef UNICORN_AUTOGEN_mips64el_H
|
|
#define UNICORN_AUTOGEN_mips64el_H
|
|
#ifndef UNICORN_ARCH_POSTFIX
|
|
#define UNICORN_ARCH_POSTFIX _mips64el
|
|
#endif
|
|
#define uc_add_inline_hook uc_add_inline_hook_mips64el
|
|
#define uc_del_inline_hook uc_del_inline_hook_mips64el
|
|
#define tb_invalidate_phys_range tb_invalidate_phys_range_mips64el
|
|
#define use_idiv_instructions use_idiv_instructions_mips64el
|
|
#define arm_arch arm_arch_mips64el
|
|
#define tb_target_set_jmp_target tb_target_set_jmp_target_mips64el
|
|
#define have_bmi1 have_bmi1_mips64el
|
|
#define have_popcnt have_popcnt_mips64el
|
|
#define have_avx1 have_avx1_mips64el
|
|
#define have_avx2 have_avx2_mips64el
|
|
#define have_isa have_isa_mips64el
|
|
#define have_altivec have_altivec_mips64el
|
|
#define have_vsx have_vsx_mips64el
|
|
#define flush_icache_range flush_icache_range_mips64el
|
|
#define s390_facilities s390_facilities_mips64el
|
|
#define tcg_dump_op tcg_dump_op_mips64el
|
|
#define tcg_dump_ops tcg_dump_ops_mips64el
|
|
#define tcg_gen_and_i64 tcg_gen_and_i64_mips64el
|
|
#define tcg_gen_discard_i64 tcg_gen_discard_i64_mips64el
|
|
#define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_mips64el
|
|
#define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_mips64el
|
|
#define tcg_gen_ld32s_i64 tcg_gen_ld32s_i64_mips64el
|
|
#define tcg_gen_ld32u_i64 tcg_gen_ld32u_i64_mips64el
|
|
#define tcg_gen_ld8s_i64 tcg_gen_ld8s_i64_mips64el
|
|
#define tcg_gen_ld8u_i64 tcg_gen_ld8u_i64_mips64el
|
|
#define tcg_gen_ld_i64 tcg_gen_ld_i64_mips64el
|
|
#define tcg_gen_mov_i64 tcg_gen_mov_i64_mips64el
|
|
#define tcg_gen_movi_i64 tcg_gen_movi_i64_mips64el
|
|
#define tcg_gen_mul_i64 tcg_gen_mul_i64_mips64el
|
|
#define tcg_gen_or_i64 tcg_gen_or_i64_mips64el
|
|
#define tcg_gen_sar_i64 tcg_gen_sar_i64_mips64el
|
|
#define tcg_gen_shl_i64 tcg_gen_shl_i64_mips64el
|
|
#define tcg_gen_shr_i64 tcg_gen_shr_i64_mips64el
|
|
#define tcg_gen_st_i64 tcg_gen_st_i64_mips64el
|
|
#define tcg_gen_xor_i64 tcg_gen_xor_i64_mips64el
|
|
#define cpu_icount_to_ns cpu_icount_to_ns_mips64el
|
|
#define cpu_is_stopped cpu_is_stopped_mips64el
|
|
#define cpu_get_ticks cpu_get_ticks_mips64el
|
|
#define cpu_get_clock cpu_get_clock_mips64el
|
|
#define cpu_resume cpu_resume_mips64el
|
|
#define qemu_init_vcpu qemu_init_vcpu_mips64el
|
|
#define cpu_stop_current cpu_stop_current_mips64el
|
|
#define resume_all_vcpus resume_all_vcpus_mips64el
|
|
#define vm_start vm_start_mips64el
|
|
#define address_space_dispatch_compact address_space_dispatch_compact_mips64el
|
|
#define flatview_translate flatview_translate_mips64el
|
|
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mips64el
|
|
#define qemu_get_cpu qemu_get_cpu_mips64el
|
|
#define cpu_address_space_init cpu_address_space_init_mips64el
|
|
#define cpu_get_address_space cpu_get_address_space_mips64el
|
|
#define cpu_exec_unrealizefn cpu_exec_unrealizefn_mips64el
|
|
#define cpu_exec_initfn cpu_exec_initfn_mips64el
|
|
#define cpu_exec_realizefn cpu_exec_realizefn_mips64el
|
|
#define tb_invalidate_phys_addr tb_invalidate_phys_addr_mips64el
|
|
#define cpu_watchpoint_insert cpu_watchpoint_insert_mips64el
|
|
#define cpu_watchpoint_remove_by_ref cpu_watchpoint_remove_by_ref_mips64el
|
|
#define cpu_watchpoint_remove_all cpu_watchpoint_remove_all_mips64el
|
|
#define cpu_watchpoint_address_matches cpu_watchpoint_address_matches_mips64el
|
|
#define cpu_breakpoint_insert cpu_breakpoint_insert_mips64el
|
|
#define cpu_breakpoint_remove cpu_breakpoint_remove_mips64el
|
|
#define cpu_breakpoint_remove_by_ref cpu_breakpoint_remove_by_ref_mips64el
|
|
#define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_mips64el
|
|
#define cpu_abort cpu_abort_mips64el
|
|
#define cpu_physical_memory_test_and_clear_dirty cpu_physical_memory_test_and_clear_dirty_mips64el
|
|
#define memory_region_section_get_iotlb memory_region_section_get_iotlb_mips64el
|
|
#define flatview_add_to_dispatch flatview_add_to_dispatch_mips64el
|
|
#define qemu_ram_get_host_addr qemu_ram_get_host_addr_mips64el
|
|
#define qemu_ram_get_offset qemu_ram_get_offset_mips64el
|
|
#define qemu_ram_get_used_length qemu_ram_get_used_length_mips64el
|
|
#define qemu_ram_is_shared qemu_ram_is_shared_mips64el
|
|
#define qemu_ram_pagesize qemu_ram_pagesize_mips64el
|
|
#define qemu_ram_alloc_from_ptr qemu_ram_alloc_from_ptr_mips64el
|
|
#define qemu_ram_alloc qemu_ram_alloc_mips64el
|
|
#define qemu_ram_free qemu_ram_free_mips64el
|
|
#define qemu_map_ram_ptr qemu_map_ram_ptr_mips64el
|
|
#define qemu_ram_block_host_offset qemu_ram_block_host_offset_mips64el
|
|
#define qemu_ram_block_from_host qemu_ram_block_from_host_mips64el
|
|
#define qemu_ram_addr_from_host qemu_ram_addr_from_host_mips64el
|
|
#define cpu_check_watchpoint cpu_check_watchpoint_mips64el
|
|
#define iotlb_to_section iotlb_to_section_mips64el
|
|
#define address_space_dispatch_new address_space_dispatch_new_mips64el
|
|
#define address_space_dispatch_free address_space_dispatch_free_mips64el
|
|
#define flatview_read_continue flatview_read_continue_mips64el
|
|
#define address_space_read_full address_space_read_full_mips64el
|
|
#define address_space_write address_space_write_mips64el
|
|
#define address_space_rw address_space_rw_mips64el
|
|
#define cpu_physical_memory_rw cpu_physical_memory_rw_mips64el
|
|
#define address_space_write_rom address_space_write_rom_mips64el
|
|
#define cpu_flush_icache_range cpu_flush_icache_range_mips64el
|
|
#define cpu_exec_init_all cpu_exec_init_all_mips64el
|
|
#define address_space_access_valid address_space_access_valid_mips64el
|
|
#define address_space_map address_space_map_mips64el
|
|
#define address_space_unmap address_space_unmap_mips64el
|
|
#define cpu_physical_memory_map cpu_physical_memory_map_mips64el
|
|
#define cpu_physical_memory_unmap cpu_physical_memory_unmap_mips64el
|
|
#define cpu_memory_rw_debug cpu_memory_rw_debug_mips64el
|
|
#define qemu_target_page_size qemu_target_page_size_mips64el
|
|
#define qemu_target_page_bits qemu_target_page_bits_mips64el
|
|
#define qemu_target_page_bits_min qemu_target_page_bits_min_mips64el
|
|
#define target_words_bigendian target_words_bigendian_mips64el
|
|
#define cpu_physical_memory_is_io cpu_physical_memory_is_io_mips64el
|
|
#define ram_block_discard_range ram_block_discard_range_mips64el
|
|
#define ramblock_is_pmem ramblock_is_pmem_mips64el
|
|
#define page_size_init page_size_init_mips64el
|
|
#define set_preferred_target_page_bits set_preferred_target_page_bits_mips64el
|
|
#define finalize_target_page_bits finalize_target_page_bits_mips64el
|
|
#define cpu_outb cpu_outb_mips64el
|
|
#define cpu_outw cpu_outw_mips64el
|
|
#define cpu_outl cpu_outl_mips64el
|
|
#define cpu_inb cpu_inb_mips64el
|
|
#define cpu_inw cpu_inw_mips64el
|
|
#define cpu_inl cpu_inl_mips64el
|
|
#define memory_map memory_map_mips64el
|
|
#define memory_map_io memory_map_io_mips64el
|
|
#define memory_map_ptr memory_map_ptr_mips64el
|
|
#define memory_unmap memory_unmap_mips64el
|
|
#define memory_free memory_free_mips64el
|
|
#define flatview_unref flatview_unref_mips64el
|
|
#define address_space_get_flatview address_space_get_flatview_mips64el
|
|
#define memory_region_transaction_begin memory_region_transaction_begin_mips64el
|
|
#define memory_region_transaction_commit memory_region_transaction_commit_mips64el
|
|
#define memory_region_init memory_region_init_mips64el
|
|
#define memory_region_access_valid memory_region_access_valid_mips64el
|
|
#define memory_region_dispatch_read memory_region_dispatch_read_mips64el
|
|
#define memory_region_dispatch_write memory_region_dispatch_write_mips64el
|
|
#define memory_region_init_io memory_region_init_io_mips64el
|
|
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_mips64el
|
|
#define memory_region_size memory_region_size_mips64el
|
|
#define memory_region_set_readonly memory_region_set_readonly_mips64el
|
|
#define memory_region_get_ram_ptr memory_region_get_ram_ptr_mips64el
|
|
#define memory_region_from_host memory_region_from_host_mips64el
|
|
#define memory_region_get_ram_addr memory_region_get_ram_addr_mips64el
|
|
#define memory_region_add_subregion memory_region_add_subregion_mips64el
|
|
#define memory_region_del_subregion memory_region_del_subregion_mips64el
|
|
#define memory_region_find memory_region_find_mips64el
|
|
#define memory_listener_register memory_listener_register_mips64el
|
|
#define memory_listener_unregister memory_listener_unregister_mips64el
|
|
#define address_space_remove_listeners address_space_remove_listeners_mips64el
|
|
#define address_space_init address_space_init_mips64el
|
|
#define address_space_destroy address_space_destroy_mips64el
|
|
#define memory_region_init_ram memory_region_init_ram_mips64el
|
|
#define memory_mapping_list_add_merge_sorted memory_mapping_list_add_merge_sorted_mips64el
|
|
#define exec_inline_op exec_inline_op_mips64el
|
|
#define floatx80_default_nan floatx80_default_nan_mips64el
|
|
#define float_raise float_raise_mips64el
|
|
#define float16_is_quiet_nan float16_is_quiet_nan_mips64el
|
|
#define float16_is_signaling_nan float16_is_signaling_nan_mips64el
|
|
#define float32_is_quiet_nan float32_is_quiet_nan_mips64el
|
|
#define float32_is_signaling_nan float32_is_signaling_nan_mips64el
|
|
#define float64_is_quiet_nan float64_is_quiet_nan_mips64el
|
|
#define float64_is_signaling_nan float64_is_signaling_nan_mips64el
|
|
#define floatx80_is_quiet_nan floatx80_is_quiet_nan_mips64el
|
|
#define floatx80_is_signaling_nan floatx80_is_signaling_nan_mips64el
|
|
#define floatx80_silence_nan floatx80_silence_nan_mips64el
|
|
#define propagateFloatx80NaN propagateFloatx80NaN_mips64el
|
|
#define float128_is_quiet_nan float128_is_quiet_nan_mips64el
|
|
#define float128_is_signaling_nan float128_is_signaling_nan_mips64el
|
|
#define float128_silence_nan float128_silence_nan_mips64el
|
|
#define float16_add float16_add_mips64el
|
|
#define float16_sub float16_sub_mips64el
|
|
#define float32_add float32_add_mips64el
|
|
#define float32_sub float32_sub_mips64el
|
|
#define float64_add float64_add_mips64el
|
|
#define float64_sub float64_sub_mips64el
|
|
#define float16_mul float16_mul_mips64el
|
|
#define float32_mul float32_mul_mips64el
|
|
#define float64_mul float64_mul_mips64el
|
|
#define float16_muladd float16_muladd_mips64el
|
|
#define float32_muladd float32_muladd_mips64el
|
|
#define float64_muladd float64_muladd_mips64el
|
|
#define float16_div float16_div_mips64el
|
|
#define float32_div float32_div_mips64el
|
|
#define float64_div float64_div_mips64el
|
|
#define float16_to_float32 float16_to_float32_mips64el
|
|
#define float16_to_float64 float16_to_float64_mips64el
|
|
#define float32_to_float16 float32_to_float16_mips64el
|
|
#define float32_to_float64 float32_to_float64_mips64el
|
|
#define float64_to_float16 float64_to_float16_mips64el
|
|
#define float64_to_float32 float64_to_float32_mips64el
|
|
#define float16_round_to_int float16_round_to_int_mips64el
|
|
#define float32_round_to_int float32_round_to_int_mips64el
|
|
#define float64_round_to_int float64_round_to_int_mips64el
|
|
#define float16_to_int16_scalbn float16_to_int16_scalbn_mips64el
|
|
#define float16_to_int32_scalbn float16_to_int32_scalbn_mips64el
|
|
#define float16_to_int64_scalbn float16_to_int64_scalbn_mips64el
|
|
#define float32_to_int16_scalbn float32_to_int16_scalbn_mips64el
|
|
#define float32_to_int32_scalbn float32_to_int32_scalbn_mips64el
|
|
#define float32_to_int64_scalbn float32_to_int64_scalbn_mips64el
|
|
#define float64_to_int16_scalbn float64_to_int16_scalbn_mips64el
|
|
#define float64_to_int32_scalbn float64_to_int32_scalbn_mips64el
|
|
#define float64_to_int64_scalbn float64_to_int64_scalbn_mips64el
|
|
#define float16_to_int16 float16_to_int16_mips64el
|
|
#define float16_to_int32 float16_to_int32_mips64el
|
|
#define float16_to_int64 float16_to_int64_mips64el
|
|
#define float32_to_int16 float32_to_int16_mips64el
|
|
#define float32_to_int32 float32_to_int32_mips64el
|
|
#define float32_to_int64 float32_to_int64_mips64el
|
|
#define float64_to_int16 float64_to_int16_mips64el
|
|
#define float64_to_int32 float64_to_int32_mips64el
|
|
#define float64_to_int64 float64_to_int64_mips64el
|
|
#define float16_to_int16_round_to_zero float16_to_int16_round_to_zero_mips64el
|
|
#define float16_to_int32_round_to_zero float16_to_int32_round_to_zero_mips64el
|
|
#define float16_to_int64_round_to_zero float16_to_int64_round_to_zero_mips64el
|
|
#define float32_to_int16_round_to_zero float32_to_int16_round_to_zero_mips64el
|
|
#define float32_to_int32_round_to_zero float32_to_int32_round_to_zero_mips64el
|
|
#define float32_to_int64_round_to_zero float32_to_int64_round_to_zero_mips64el
|
|
#define float64_to_int16_round_to_zero float64_to_int16_round_to_zero_mips64el
|
|
#define float64_to_int32_round_to_zero float64_to_int32_round_to_zero_mips64el
|
|
#define float64_to_int64_round_to_zero float64_to_int64_round_to_zero_mips64el
|
|
#define float16_to_uint16_scalbn float16_to_uint16_scalbn_mips64el
|
|
#define float16_to_uint32_scalbn float16_to_uint32_scalbn_mips64el
|
|
#define float16_to_uint64_scalbn float16_to_uint64_scalbn_mips64el
|
|
#define float32_to_uint16_scalbn float32_to_uint16_scalbn_mips64el
|
|
#define float32_to_uint32_scalbn float32_to_uint32_scalbn_mips64el
|
|
#define float32_to_uint64_scalbn float32_to_uint64_scalbn_mips64el
|
|
#define float64_to_uint16_scalbn float64_to_uint16_scalbn_mips64el
|
|
#define float64_to_uint32_scalbn float64_to_uint32_scalbn_mips64el
|
|
#define float64_to_uint64_scalbn float64_to_uint64_scalbn_mips64el
|
|
#define float16_to_uint16 float16_to_uint16_mips64el
|
|
#define float16_to_uint32 float16_to_uint32_mips64el
|
|
#define float16_to_uint64 float16_to_uint64_mips64el
|
|
#define float32_to_uint16 float32_to_uint16_mips64el
|
|
#define float32_to_uint32 float32_to_uint32_mips64el
|
|
#define float32_to_uint64 float32_to_uint64_mips64el
|
|
#define float64_to_uint16 float64_to_uint16_mips64el
|
|
#define float64_to_uint32 float64_to_uint32_mips64el
|
|
#define float64_to_uint64 float64_to_uint64_mips64el
|
|
#define float16_to_uint16_round_to_zero float16_to_uint16_round_to_zero_mips64el
|
|
#define float16_to_uint32_round_to_zero float16_to_uint32_round_to_zero_mips64el
|
|
#define float16_to_uint64_round_to_zero float16_to_uint64_round_to_zero_mips64el
|
|
#define float32_to_uint16_round_to_zero float32_to_uint16_round_to_zero_mips64el
|
|
#define float32_to_uint32_round_to_zero float32_to_uint32_round_to_zero_mips64el
|
|
#define float32_to_uint64_round_to_zero float32_to_uint64_round_to_zero_mips64el
|
|
#define float64_to_uint16_round_to_zero float64_to_uint16_round_to_zero_mips64el
|
|
#define float64_to_uint32_round_to_zero float64_to_uint32_round_to_zero_mips64el
|
|
#define float64_to_uint64_round_to_zero float64_to_uint64_round_to_zero_mips64el
|
|
#define int64_to_float16_scalbn int64_to_float16_scalbn_mips64el
|
|
#define int32_to_float16_scalbn int32_to_float16_scalbn_mips64el
|
|
#define int16_to_float16_scalbn int16_to_float16_scalbn_mips64el
|
|
#define int64_to_float16 int64_to_float16_mips64el
|
|
#define int32_to_float16 int32_to_float16_mips64el
|
|
#define int16_to_float16 int16_to_float16_mips64el
|
|
#define int64_to_float32_scalbn int64_to_float32_scalbn_mips64el
|
|
#define int32_to_float32_scalbn int32_to_float32_scalbn_mips64el
|
|
#define int16_to_float32_scalbn int16_to_float32_scalbn_mips64el
|
|
#define int64_to_float32 int64_to_float32_mips64el
|
|
#define int32_to_float32 int32_to_float32_mips64el
|
|
#define int16_to_float32 int16_to_float32_mips64el
|
|
#define int64_to_float64_scalbn int64_to_float64_scalbn_mips64el
|
|
#define int32_to_float64_scalbn int32_to_float64_scalbn_mips64el
|
|
#define int16_to_float64_scalbn int16_to_float64_scalbn_mips64el
|
|
#define int64_to_float64 int64_to_float64_mips64el
|
|
#define int32_to_float64 int32_to_float64_mips64el
|
|
#define int16_to_float64 int16_to_float64_mips64el
|
|
#define uint64_to_float16_scalbn uint64_to_float16_scalbn_mips64el
|
|
#define uint32_to_float16_scalbn uint32_to_float16_scalbn_mips64el
|
|
#define uint16_to_float16_scalbn uint16_to_float16_scalbn_mips64el
|
|
#define uint64_to_float16 uint64_to_float16_mips64el
|
|
#define uint32_to_float16 uint32_to_float16_mips64el
|
|
#define uint16_to_float16 uint16_to_float16_mips64el
|
|
#define uint64_to_float32_scalbn uint64_to_float32_scalbn_mips64el
|
|
#define uint32_to_float32_scalbn uint32_to_float32_scalbn_mips64el
|
|
#define uint16_to_float32_scalbn uint16_to_float32_scalbn_mips64el
|
|
#define uint64_to_float32 uint64_to_float32_mips64el
|
|
#define uint32_to_float32 uint32_to_float32_mips64el
|
|
#define uint16_to_float32 uint16_to_float32_mips64el
|
|
#define uint64_to_float64_scalbn uint64_to_float64_scalbn_mips64el
|
|
#define uint32_to_float64_scalbn uint32_to_float64_scalbn_mips64el
|
|
#define uint16_to_float64_scalbn uint16_to_float64_scalbn_mips64el
|
|
#define uint64_to_float64 uint64_to_float64_mips64el
|
|
#define uint32_to_float64 uint32_to_float64_mips64el
|
|
#define uint16_to_float64 uint16_to_float64_mips64el
|
|
#define float16_min float16_min_mips64el
|
|
#define float16_minnum float16_minnum_mips64el
|
|
#define float16_minnummag float16_minnummag_mips64el
|
|
#define float16_max float16_max_mips64el
|
|
#define float16_maxnum float16_maxnum_mips64el
|
|
#define float16_maxnummag float16_maxnummag_mips64el
|
|
#define float32_min float32_min_mips64el
|
|
#define float32_minnum float32_minnum_mips64el
|
|
#define float32_minnummag float32_minnummag_mips64el
|
|
#define float32_max float32_max_mips64el
|
|
#define float32_maxnum float32_maxnum_mips64el
|
|
#define float32_maxnummag float32_maxnummag_mips64el
|
|
#define float64_min float64_min_mips64el
|
|
#define float64_minnum float64_minnum_mips64el
|
|
#define float64_minnummag float64_minnummag_mips64el
|
|
#define float64_max float64_max_mips64el
|
|
#define float64_maxnum float64_maxnum_mips64el
|
|
#define float64_maxnummag float64_maxnummag_mips64el
|
|
#define float16_compare float16_compare_mips64el
|
|
#define float16_compare_quiet float16_compare_quiet_mips64el
|
|
#define float32_compare float32_compare_mips64el
|
|
#define float32_compare_quiet float32_compare_quiet_mips64el
|
|
#define float64_compare float64_compare_mips64el
|
|
#define float64_compare_quiet float64_compare_quiet_mips64el
|
|
#define float16_scalbn float16_scalbn_mips64el
|
|
#define float32_scalbn float32_scalbn_mips64el
|
|
#define float64_scalbn float64_scalbn_mips64el
|
|
#define float16_sqrt float16_sqrt_mips64el
|
|
#define float32_sqrt float32_sqrt_mips64el
|
|
#define float64_sqrt float64_sqrt_mips64el
|
|
#define float16_default_nan float16_default_nan_mips64el
|
|
#define float32_default_nan float32_default_nan_mips64el
|
|
#define float64_default_nan float64_default_nan_mips64el
|
|
#define float128_default_nan float128_default_nan_mips64el
|
|
#define float16_silence_nan float16_silence_nan_mips64el
|
|
#define float32_silence_nan float32_silence_nan_mips64el
|
|
#define float64_silence_nan float64_silence_nan_mips64el
|
|
#define float16_squash_input_denormal float16_squash_input_denormal_mips64el
|
|
#define float32_squash_input_denormal float32_squash_input_denormal_mips64el
|
|
#define float64_squash_input_denormal float64_squash_input_denormal_mips64el
|
|
#define normalizeFloatx80Subnormal normalizeFloatx80Subnormal_mips64el
|
|
#define roundAndPackFloatx80 roundAndPackFloatx80_mips64el
|
|
#define normalizeRoundAndPackFloatx80 normalizeRoundAndPackFloatx80_mips64el
|
|
#define int32_to_floatx80 int32_to_floatx80_mips64el
|
|
#define int32_to_float128 int32_to_float128_mips64el
|
|
#define int64_to_floatx80 int64_to_floatx80_mips64el
|
|
#define int64_to_float128 int64_to_float128_mips64el
|
|
#define uint64_to_float128 uint64_to_float128_mips64el
|
|
#define float32_to_floatx80 float32_to_floatx80_mips64el
|
|
#define float32_to_float128 float32_to_float128_mips64el
|
|
#define float32_rem float32_rem_mips64el
|
|
#define float32_exp2 float32_exp2_mips64el
|
|
#define float32_log2 float32_log2_mips64el
|
|
#define float32_eq float32_eq_mips64el
|
|
#define float32_le float32_le_mips64el
|
|
#define float32_lt float32_lt_mips64el
|
|
#define float32_unordered float32_unordered_mips64el
|
|
#define float32_eq_quiet float32_eq_quiet_mips64el
|
|
#define float32_le_quiet float32_le_quiet_mips64el
|
|
#define float32_lt_quiet float32_lt_quiet_mips64el
|
|
#define float32_unordered_quiet float32_unordered_quiet_mips64el
|
|
#define float64_to_floatx80 float64_to_floatx80_mips64el
|
|
#define float64_to_float128 float64_to_float128_mips64el
|
|
#define float64_rem float64_rem_mips64el
|
|
#define float64_log2 float64_log2_mips64el
|
|
#define float64_eq float64_eq_mips64el
|
|
#define float64_le float64_le_mips64el
|
|
#define float64_lt float64_lt_mips64el
|
|
#define float64_unordered float64_unordered_mips64el
|
|
#define float64_eq_quiet float64_eq_quiet_mips64el
|
|
#define float64_le_quiet float64_le_quiet_mips64el
|
|
#define float64_lt_quiet float64_lt_quiet_mips64el
|
|
#define float64_unordered_quiet float64_unordered_quiet_mips64el
|
|
#define floatx80_to_int32 floatx80_to_int32_mips64el
|
|
#define floatx80_to_int32_round_to_zero floatx80_to_int32_round_to_zero_mips64el
|
|
#define floatx80_to_int64 floatx80_to_int64_mips64el
|
|
#define floatx80_to_int64_round_to_zero floatx80_to_int64_round_to_zero_mips64el
|
|
#define floatx80_to_float32 floatx80_to_float32_mips64el
|
|
#define floatx80_to_float64 floatx80_to_float64_mips64el
|
|
#define floatx80_to_float128 floatx80_to_float128_mips64el
|
|
#define floatx80_round floatx80_round_mips64el
|
|
#define floatx80_round_to_int floatx80_round_to_int_mips64el
|
|
#define floatx80_add floatx80_add_mips64el
|
|
#define floatx80_sub floatx80_sub_mips64el
|
|
#define floatx80_mul floatx80_mul_mips64el
|
|
#define floatx80_div floatx80_div_mips64el
|
|
#define floatx80_rem floatx80_rem_mips64el
|
|
#define floatx80_sqrt floatx80_sqrt_mips64el
|
|
#define floatx80_eq floatx80_eq_mips64el
|
|
#define floatx80_le floatx80_le_mips64el
|
|
#define floatx80_lt floatx80_lt_mips64el
|
|
#define floatx80_unordered floatx80_unordered_mips64el
|
|
#define floatx80_eq_quiet floatx80_eq_quiet_mips64el
|
|
#define floatx80_le_quiet floatx80_le_quiet_mips64el
|
|
#define floatx80_lt_quiet floatx80_lt_quiet_mips64el
|
|
#define floatx80_unordered_quiet floatx80_unordered_quiet_mips64el
|
|
#define float128_to_int32 float128_to_int32_mips64el
|
|
#define float128_to_int32_round_to_zero float128_to_int32_round_to_zero_mips64el
|
|
#define float128_to_int64 float128_to_int64_mips64el
|
|
#define float128_to_int64_round_to_zero float128_to_int64_round_to_zero_mips64el
|
|
#define float128_to_uint64 float128_to_uint64_mips64el
|
|
#define float128_to_uint64_round_to_zero float128_to_uint64_round_to_zero_mips64el
|
|
#define float128_to_uint32_round_to_zero float128_to_uint32_round_to_zero_mips64el
|
|
#define float128_to_uint32 float128_to_uint32_mips64el
|
|
#define float128_to_float32 float128_to_float32_mips64el
|
|
#define float128_to_float64 float128_to_float64_mips64el
|
|
#define float128_to_floatx80 float128_to_floatx80_mips64el
|
|
#define float128_round_to_int float128_round_to_int_mips64el
|
|
#define float128_add float128_add_mips64el
|
|
#define float128_sub float128_sub_mips64el
|
|
#define float128_mul float128_mul_mips64el
|
|
#define float128_div float128_div_mips64el
|
|
#define float128_rem float128_rem_mips64el
|
|
#define float128_sqrt float128_sqrt_mips64el
|
|
#define float128_eq float128_eq_mips64el
|
|
#define float128_le float128_le_mips64el
|
|
#define float128_lt float128_lt_mips64el
|
|
#define float128_unordered float128_unordered_mips64el
|
|
#define float128_eq_quiet float128_eq_quiet_mips64el
|
|
#define float128_le_quiet float128_le_quiet_mips64el
|
|
#define float128_lt_quiet float128_lt_quiet_mips64el
|
|
#define float128_unordered_quiet float128_unordered_quiet_mips64el
|
|
#define floatx80_compare floatx80_compare_mips64el
|
|
#define floatx80_compare_quiet floatx80_compare_quiet_mips64el
|
|
#define float128_compare float128_compare_mips64el
|
|
#define float128_compare_quiet float128_compare_quiet_mips64el
|
|
#define floatx80_scalbn floatx80_scalbn_mips64el
|
|
#define float128_scalbn float128_scalbn_mips64el
|
|
#define softfloat_init softfloat_init_mips64el
|
|
#define tcg_optimize tcg_optimize_mips64el
|
|
#define gen_new_label gen_new_label_mips64el
|
|
#define tcg_can_emit_vec_op tcg_can_emit_vec_op_mips64el
|
|
#define tcg_expand_vec_op tcg_expand_vec_op_mips64el
|
|
#define tcg_register_jit tcg_register_jit_mips64el
|
|
#define tcg_tb_insert tcg_tb_insert_mips64el
|
|
#define tcg_tb_remove tcg_tb_remove_mips64el
|
|
#define tcg_tb_lookup tcg_tb_lookup_mips64el
|
|
#define tcg_tb_foreach tcg_tb_foreach_mips64el
|
|
#define tcg_nb_tbs tcg_nb_tbs_mips64el
|
|
#define tcg_region_reset_all tcg_region_reset_all_mips64el
|
|
#define tcg_region_init tcg_region_init_mips64el
|
|
#define tcg_code_size tcg_code_size_mips64el
|
|
#define tcg_code_capacity tcg_code_capacity_mips64el
|
|
#define tcg_tb_phys_invalidate_count tcg_tb_phys_invalidate_count_mips64el
|
|
#define tcg_malloc_internal tcg_malloc_internal_mips64el
|
|
#define tcg_pool_reset tcg_pool_reset_mips64el
|
|
#define tcg_context_init tcg_context_init_mips64el
|
|
#define tcg_tb_alloc tcg_tb_alloc_mips64el
|
|
#define tcg_prologue_init tcg_prologue_init_mips64el
|
|
#define tcg_func_start tcg_func_start_mips64el
|
|
#define tcg_set_frame tcg_set_frame_mips64el
|
|
#define tcg_global_mem_new_internal tcg_global_mem_new_internal_mips64el
|
|
#define tcg_temp_new_internal tcg_temp_new_internal_mips64el
|
|
#define tcg_temp_new_vec tcg_temp_new_vec_mips64el
|
|
#define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_mips64el
|
|
#define tcg_temp_free_internal tcg_temp_free_internal_mips64el
|
|
#define tcg_const_i32 tcg_const_i32_mips64el
|
|
#define tcg_const_i64 tcg_const_i64_mips64el
|
|
#define tcg_const_local_i32 tcg_const_local_i32_mips64el
|
|
#define tcg_const_local_i64 tcg_const_local_i64_mips64el
|
|
#define tcg_op_supported tcg_op_supported_mips64el
|
|
#define tcg_gen_callN tcg_gen_callN_mips64el
|
|
#define tcg_op_remove tcg_op_remove_mips64el
|
|
#define tcg_emit_op tcg_emit_op_mips64el
|
|
#define tcg_op_insert_before tcg_op_insert_before_mips64el
|
|
#define tcg_op_insert_after tcg_op_insert_after_mips64el
|
|
#define tcg_cpu_exec_time tcg_cpu_exec_time_mips64el
|
|
#define tcg_gen_code tcg_gen_code_mips64el
|
|
#define tcg_gen_op1 tcg_gen_op1_mips64el
|
|
#define tcg_gen_op2 tcg_gen_op2_mips64el
|
|
#define tcg_gen_op3 tcg_gen_op3_mips64el
|
|
#define tcg_gen_op4 tcg_gen_op4_mips64el
|
|
#define tcg_gen_op5 tcg_gen_op5_mips64el
|
|
#define tcg_gen_op6 tcg_gen_op6_mips64el
|
|
#define tcg_gen_mb tcg_gen_mb_mips64el
|
|
#define tcg_gen_addi_i32 tcg_gen_addi_i32_mips64el
|
|
#define tcg_gen_subfi_i32 tcg_gen_subfi_i32_mips64el
|
|
#define tcg_gen_subi_i32 tcg_gen_subi_i32_mips64el
|
|
#define tcg_gen_andi_i32 tcg_gen_andi_i32_mips64el
|
|
#define tcg_gen_ori_i32 tcg_gen_ori_i32_mips64el
|
|
#define tcg_gen_xori_i32 tcg_gen_xori_i32_mips64el
|
|
#define tcg_gen_shli_i32 tcg_gen_shli_i32_mips64el
|
|
#define tcg_gen_shri_i32 tcg_gen_shri_i32_mips64el
|
|
#define tcg_gen_sari_i32 tcg_gen_sari_i32_mips64el
|
|
#define tcg_gen_brcond_i32 tcg_gen_brcond_i32_mips64el
|
|
#define tcg_gen_brcondi_i32 tcg_gen_brcondi_i32_mips64el
|
|
#define tcg_gen_setcond_i32 tcg_gen_setcond_i32_mips64el
|
|
#define tcg_gen_setcondi_i32 tcg_gen_setcondi_i32_mips64el
|
|
#define tcg_gen_muli_i32 tcg_gen_muli_i32_mips64el
|
|
#define tcg_gen_div_i32 tcg_gen_div_i32_mips64el
|
|
#define tcg_gen_rem_i32 tcg_gen_rem_i32_mips64el
|
|
#define tcg_gen_divu_i32 tcg_gen_divu_i32_mips64el
|
|
#define tcg_gen_remu_i32 tcg_gen_remu_i32_mips64el
|
|
#define tcg_gen_andc_i32 tcg_gen_andc_i32_mips64el
|
|
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_mips64el
|
|
#define tcg_gen_nand_i32 tcg_gen_nand_i32_mips64el
|
|
#define tcg_gen_nor_i32 tcg_gen_nor_i32_mips64el
|
|
#define tcg_gen_orc_i32 tcg_gen_orc_i32_mips64el
|
|
#define tcg_gen_clz_i32 tcg_gen_clz_i32_mips64el
|
|
#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_mips64el
|
|
#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_mips64el
|
|
#define tcg_gen_ctzi_i32 tcg_gen_ctzi_i32_mips64el
|
|
#define tcg_gen_clrsb_i32 tcg_gen_clrsb_i32_mips64el
|
|
#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_mips64el
|
|
#define tcg_gen_rotl_i32 tcg_gen_rotl_i32_mips64el
|
|
#define tcg_gen_rotli_i32 tcg_gen_rotli_i32_mips64el
|
|
#define tcg_gen_rotr_i32 tcg_gen_rotr_i32_mips64el
|
|
#define tcg_gen_rotri_i32 tcg_gen_rotri_i32_mips64el
|
|
#define tcg_gen_deposit_i32 tcg_gen_deposit_i32_mips64el
|
|
#define tcg_gen_deposit_z_i32 tcg_gen_deposit_z_i32_mips64el
|
|
#define tcg_gen_extract_i32 tcg_gen_extract_i32_mips64el
|
|
#define tcg_gen_sextract_i32 tcg_gen_sextract_i32_mips64el
|
|
#define tcg_gen_extract2_i32 tcg_gen_extract2_i32_mips64el
|
|
#define tcg_gen_movcond_i32 tcg_gen_movcond_i32_mips64el
|
|
#define tcg_gen_add2_i32 tcg_gen_add2_i32_mips64el
|
|
#define tcg_gen_sub2_i32 tcg_gen_sub2_i32_mips64el
|
|
#define tcg_gen_mulu2_i32 tcg_gen_mulu2_i32_mips64el
|
|
#define tcg_gen_muls2_i32 tcg_gen_muls2_i32_mips64el
|
|
#define tcg_gen_mulsu2_i32 tcg_gen_mulsu2_i32_mips64el
|
|
#define tcg_gen_ext8s_i32 tcg_gen_ext8s_i32_mips64el
|
|
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_mips64el
|
|
#define tcg_gen_ext8u_i32 tcg_gen_ext8u_i32_mips64el
|
|
#define tcg_gen_ext16u_i32 tcg_gen_ext16u_i32_mips64el
|
|
#define tcg_gen_bswap16_i32 tcg_gen_bswap16_i32_mips64el
|
|
#define tcg_gen_bswap32_i32 tcg_gen_bswap32_i32_mips64el
|
|
#define tcg_gen_smin_i32 tcg_gen_smin_i32_mips64el
|
|
#define tcg_gen_umin_i32 tcg_gen_umin_i32_mips64el
|
|
#define tcg_gen_smax_i32 tcg_gen_smax_i32_mips64el
|
|
#define tcg_gen_umax_i32 tcg_gen_umax_i32_mips64el
|
|
#define tcg_gen_abs_i32 tcg_gen_abs_i32_mips64el
|
|
#define tcg_gen_addi_i64 tcg_gen_addi_i64_mips64el
|
|
#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_mips64el
|
|
#define tcg_gen_subi_i64 tcg_gen_subi_i64_mips64el
|
|
#define tcg_gen_andi_i64 tcg_gen_andi_i64_mips64el
|
|
#define tcg_gen_ori_i64 tcg_gen_ori_i64_mips64el
|
|
#define tcg_gen_xori_i64 tcg_gen_xori_i64_mips64el
|
|
#define tcg_gen_shli_i64 tcg_gen_shli_i64_mips64el
|
|
#define tcg_gen_shri_i64 tcg_gen_shri_i64_mips64el
|
|
#define tcg_gen_sari_i64 tcg_gen_sari_i64_mips64el
|
|
#define tcg_gen_brcond_i64 tcg_gen_brcond_i64_mips64el
|
|
#define tcg_gen_brcondi_i64 tcg_gen_brcondi_i64_mips64el
|
|
#define tcg_gen_setcond_i64 tcg_gen_setcond_i64_mips64el
|
|
#define tcg_gen_setcondi_i64 tcg_gen_setcondi_i64_mips64el
|
|
#define tcg_gen_muli_i64 tcg_gen_muli_i64_mips64el
|
|
#define tcg_gen_div_i64 tcg_gen_div_i64_mips64el
|
|
#define tcg_gen_rem_i64 tcg_gen_rem_i64_mips64el
|
|
#define tcg_gen_divu_i64 tcg_gen_divu_i64_mips64el
|
|
#define tcg_gen_remu_i64 tcg_gen_remu_i64_mips64el
|
|
#define tcg_gen_ext8s_i64 tcg_gen_ext8s_i64_mips64el
|
|
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_mips64el
|
|
#define tcg_gen_ext32s_i64 tcg_gen_ext32s_i64_mips64el
|
|
#define tcg_gen_ext8u_i64 tcg_gen_ext8u_i64_mips64el
|
|
#define tcg_gen_ext16u_i64 tcg_gen_ext16u_i64_mips64el
|
|
#define tcg_gen_ext32u_i64 tcg_gen_ext32u_i64_mips64el
|
|
#define tcg_gen_bswap16_i64 tcg_gen_bswap16_i64_mips64el
|
|
#define tcg_gen_bswap32_i64 tcg_gen_bswap32_i64_mips64el
|
|
#define tcg_gen_bswap64_i64 tcg_gen_bswap64_i64_mips64el
|
|
#define tcg_gen_not_i64 tcg_gen_not_i64_mips64el
|
|
#define tcg_gen_andc_i64 tcg_gen_andc_i64_mips64el
|
|
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_mips64el
|
|
#define tcg_gen_nand_i64 tcg_gen_nand_i64_mips64el
|
|
#define tcg_gen_nor_i64 tcg_gen_nor_i64_mips64el
|
|
#define tcg_gen_orc_i64 tcg_gen_orc_i64_mips64el
|
|
#define tcg_gen_clz_i64 tcg_gen_clz_i64_mips64el
|
|
#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_mips64el
|
|
#define tcg_gen_ctz_i64 tcg_gen_ctz_i64_mips64el
|
|
#define tcg_gen_ctzi_i64 tcg_gen_ctzi_i64_mips64el
|
|
#define tcg_gen_clrsb_i64 tcg_gen_clrsb_i64_mips64el
|
|
#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_mips64el
|
|
#define tcg_gen_rotl_i64 tcg_gen_rotl_i64_mips64el
|
|
#define tcg_gen_rotli_i64 tcg_gen_rotli_i64_mips64el
|
|
#define tcg_gen_rotr_i64 tcg_gen_rotr_i64_mips64el
|
|
#define tcg_gen_rotri_i64 tcg_gen_rotri_i64_mips64el
|
|
#define tcg_gen_deposit_i64 tcg_gen_deposit_i64_mips64el
|
|
#define tcg_gen_deposit_z_i64 tcg_gen_deposit_z_i64_mips64el
|
|
#define tcg_gen_extract_i64 tcg_gen_extract_i64_mips64el
|
|
#define tcg_gen_sextract_i64 tcg_gen_sextract_i64_mips64el
|
|
#define tcg_gen_extract2_i64 tcg_gen_extract2_i64_mips64el
|
|
#define tcg_gen_movcond_i64 tcg_gen_movcond_i64_mips64el
|
|
#define tcg_gen_add2_i64 tcg_gen_add2_i64_mips64el
|
|
#define tcg_gen_sub2_i64 tcg_gen_sub2_i64_mips64el
|
|
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_mips64el
|
|
#define tcg_gen_muls2_i64 tcg_gen_muls2_i64_mips64el
|
|
#define tcg_gen_mulsu2_i64 tcg_gen_mulsu2_i64_mips64el
|
|
#define tcg_gen_smin_i64 tcg_gen_smin_i64_mips64el
|
|
#define tcg_gen_umin_i64 tcg_gen_umin_i64_mips64el
|
|
#define tcg_gen_smax_i64 tcg_gen_smax_i64_mips64el
|
|
#define tcg_gen_umax_i64 tcg_gen_umax_i64_mips64el
|
|
#define tcg_gen_abs_i64 tcg_gen_abs_i64_mips64el
|
|
#define tcg_gen_extrl_i64_i32 tcg_gen_extrl_i64_i32_mips64el
|
|
#define tcg_gen_extrh_i64_i32 tcg_gen_extrh_i64_i32_mips64el
|
|
#define tcg_gen_extu_i32_i64 tcg_gen_extu_i32_i64_mips64el
|
|
#define tcg_gen_ext_i32_i64 tcg_gen_ext_i32_i64_mips64el
|
|
#define tcg_gen_concat_i32_i64 tcg_gen_concat_i32_i64_mips64el
|
|
#define tcg_gen_extr_i64_i32 tcg_gen_extr_i64_i32_mips64el
|
|
#define tcg_gen_extr32_i64 tcg_gen_extr32_i64_mips64el
|
|
#define tcg_gen_exit_tb tcg_gen_exit_tb_mips64el
|
|
#define tcg_gen_goto_tb tcg_gen_goto_tb_mips64el
|
|
#define tcg_gen_lookup_and_goto_ptr tcg_gen_lookup_and_goto_ptr_mips64el
|
|
#define check_exit_request check_exit_request_mips64el
|
|
#define tcg_gen_qemu_ld_i32 tcg_gen_qemu_ld_i32_mips64el
|
|
#define tcg_gen_qemu_st_i32 tcg_gen_qemu_st_i32_mips64el
|
|
#define tcg_gen_qemu_ld_i64 tcg_gen_qemu_ld_i64_mips64el
|
|
#define tcg_gen_qemu_st_i64 tcg_gen_qemu_st_i64_mips64el
|
|
#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_mips64el
|
|
#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_mips64el
|
|
#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_mips64el
|
|
#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_mips64el
|
|
#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_mips64el
|
|
#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_mips64el
|
|
#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_mips64el
|
|
#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_mips64el
|
|
#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_mips64el
|
|
#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_mips64el
|
|
#define tcg_gen_atomic_fetch_smin_i32 tcg_gen_atomic_fetch_smin_i32_mips64el
|
|
#define tcg_gen_atomic_fetch_smin_i64 tcg_gen_atomic_fetch_smin_i64_mips64el
|
|
#define tcg_gen_atomic_fetch_umin_i32 tcg_gen_atomic_fetch_umin_i32_mips64el
|
|
#define tcg_gen_atomic_fetch_umin_i64 tcg_gen_atomic_fetch_umin_i64_mips64el
|
|
#define tcg_gen_atomic_fetch_smax_i32 tcg_gen_atomic_fetch_smax_i32_mips64el
|
|
#define tcg_gen_atomic_fetch_smax_i64 tcg_gen_atomic_fetch_smax_i64_mips64el
|
|
#define tcg_gen_atomic_fetch_umax_i32 tcg_gen_atomic_fetch_umax_i32_mips64el
|
|
#define tcg_gen_atomic_fetch_umax_i64 tcg_gen_atomic_fetch_umax_i64_mips64el
|
|
#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_mips64el
|
|
#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_mips64el
|
|
#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_mips64el
|
|
#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_mips64el
|
|
#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_mips64el
|
|
#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_mips64el
|
|
#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_mips64el
|
|
#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_mips64el
|
|
#define tcg_gen_atomic_smin_fetch_i32 tcg_gen_atomic_smin_fetch_i32_mips64el
|
|
#define tcg_gen_atomic_smin_fetch_i64 tcg_gen_atomic_smin_fetch_i64_mips64el
|
|
#define tcg_gen_atomic_umin_fetch_i32 tcg_gen_atomic_umin_fetch_i32_mips64el
|
|
#define tcg_gen_atomic_umin_fetch_i64 tcg_gen_atomic_umin_fetch_i64_mips64el
|
|
#define tcg_gen_atomic_smax_fetch_i32 tcg_gen_atomic_smax_fetch_i32_mips64el
|
|
#define tcg_gen_atomic_smax_fetch_i64 tcg_gen_atomic_smax_fetch_i64_mips64el
|
|
#define tcg_gen_atomic_umax_fetch_i32 tcg_gen_atomic_umax_fetch_i32_mips64el
|
|
#define tcg_gen_atomic_umax_fetch_i64 tcg_gen_atomic_umax_fetch_i64_mips64el
|
|
#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_mips64el
|
|
#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_mips64el
|
|
#define simd_desc simd_desc_mips64el
|
|
#define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_mips64el
|
|
#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_mips64el
|
|
#define tcg_gen_gvec_3_ool tcg_gen_gvec_3_ool_mips64el
|
|
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_mips64el
|
|
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_mips64el
|
|
#define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_mips64el
|
|
#define tcg_gen_gvec_3_ptr tcg_gen_gvec_3_ptr_mips64el
|
|
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_mips64el
|
|
#define tcg_gen_gvec_5_ptr tcg_gen_gvec_5_ptr_mips64el
|
|
#define tcg_gen_gvec_2 tcg_gen_gvec_2_mips64el
|
|
#define tcg_gen_gvec_2i tcg_gen_gvec_2i_mips64el
|
|
#define tcg_gen_gvec_2s tcg_gen_gvec_2s_mips64el
|
|
#define tcg_gen_gvec_3 tcg_gen_gvec_3_mips64el
|
|
#define tcg_gen_gvec_3i tcg_gen_gvec_3i_mips64el
|
|
#define tcg_gen_gvec_4 tcg_gen_gvec_4_mips64el
|
|
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_mips64el
|
|
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_mips64el
|
|
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_mips64el
|
|
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mips64el
|
|
#define tcg_gen_gvec_dup64i tcg_gen_gvec_dup64i_mips64el
|
|
#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_mips64el
|
|
#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_mips64el
|
|
#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_mips64el
|
|
#define tcg_gen_gvec_not tcg_gen_gvec_not_mips64el
|
|
#define tcg_gen_vec_add8_i64 tcg_gen_vec_add8_i64_mips64el
|
|
#define tcg_gen_vec_add16_i64 tcg_gen_vec_add16_i64_mips64el
|
|
#define tcg_gen_vec_add32_i64 tcg_gen_vec_add32_i64_mips64el
|
|
#define tcg_gen_gvec_add tcg_gen_gvec_add_mips64el
|
|
#define tcg_gen_gvec_adds tcg_gen_gvec_adds_mips64el
|
|
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_mips64el
|
|
#define tcg_gen_gvec_subs tcg_gen_gvec_subs_mips64el
|
|
#define tcg_gen_vec_sub8_i64 tcg_gen_vec_sub8_i64_mips64el
|
|
#define tcg_gen_vec_sub16_i64 tcg_gen_vec_sub16_i64_mips64el
|
|
#define tcg_gen_vec_sub32_i64 tcg_gen_vec_sub32_i64_mips64el
|
|
#define tcg_gen_gvec_sub tcg_gen_gvec_sub_mips64el
|
|
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_mips64el
|
|
#define tcg_gen_gvec_muls tcg_gen_gvec_muls_mips64el
|
|
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_mips64el
|
|
#define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_mips64el
|
|
#define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_mips64el
|
|
#define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_mips64el
|
|
#define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_mips64el
|
|
#define tcg_gen_gvec_smin tcg_gen_gvec_smin_mips64el
|
|
#define tcg_gen_gvec_umin tcg_gen_gvec_umin_mips64el
|
|
#define tcg_gen_gvec_smax tcg_gen_gvec_smax_mips64el
|
|
#define tcg_gen_gvec_umax tcg_gen_gvec_umax_mips64el
|
|
#define tcg_gen_vec_neg8_i64 tcg_gen_vec_neg8_i64_mips64el
|
|
#define tcg_gen_vec_neg16_i64 tcg_gen_vec_neg16_i64_mips64el
|
|
#define tcg_gen_vec_neg32_i64 tcg_gen_vec_neg32_i64_mips64el
|
|
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_mips64el
|
|
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_mips64el
|
|
#define tcg_gen_gvec_and tcg_gen_gvec_and_mips64el
|
|
#define tcg_gen_gvec_or tcg_gen_gvec_or_mips64el
|
|
#define tcg_gen_gvec_xor tcg_gen_gvec_xor_mips64el
|
|
#define tcg_gen_gvec_andc tcg_gen_gvec_andc_mips64el
|
|
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_mips64el
|
|
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_mips64el
|
|
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_mips64el
|
|
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_mips64el
|
|
#define tcg_gen_gvec_ands tcg_gen_gvec_ands_mips64el
|
|
#define tcg_gen_gvec_andi tcg_gen_gvec_andi_mips64el
|
|
#define tcg_gen_gvec_xors tcg_gen_gvec_xors_mips64el
|
|
#define tcg_gen_gvec_xori tcg_gen_gvec_xori_mips64el
|
|
#define tcg_gen_gvec_ors tcg_gen_gvec_ors_mips64el
|
|
#define tcg_gen_gvec_ori tcg_gen_gvec_ori_mips64el
|
|
#define tcg_gen_vec_shl8i_i64 tcg_gen_vec_shl8i_i64_mips64el
|
|
#define tcg_gen_vec_shl16i_i64 tcg_gen_vec_shl16i_i64_mips64el
|
|
#define tcg_gen_gvec_shli tcg_gen_gvec_shli_mips64el
|
|
#define tcg_gen_vec_shr8i_i64 tcg_gen_vec_shr8i_i64_mips64el
|
|
#define tcg_gen_vec_shr16i_i64 tcg_gen_vec_shr16i_i64_mips64el
|
|
#define tcg_gen_gvec_shri tcg_gen_gvec_shri_mips64el
|
|
#define tcg_gen_vec_sar8i_i64 tcg_gen_vec_sar8i_i64_mips64el
|
|
#define tcg_gen_vec_sar16i_i64 tcg_gen_vec_sar16i_i64_mips64el
|
|
#define tcg_gen_gvec_sari tcg_gen_gvec_sari_mips64el
|
|
#define tcg_gen_gvec_shls tcg_gen_gvec_shls_mips64el
|
|
#define tcg_gen_gvec_shrs tcg_gen_gvec_shrs_mips64el
|
|
#define tcg_gen_gvec_sars tcg_gen_gvec_sars_mips64el
|
|
#define tcg_gen_gvec_shlv tcg_gen_gvec_shlv_mips64el
|
|
#define tcg_gen_gvec_shrv tcg_gen_gvec_shrv_mips64el
|
|
#define tcg_gen_gvec_sarv tcg_gen_gvec_sarv_mips64el
|
|
#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_mips64el
|
|
#define tcg_gen_gvec_bitsel tcg_gen_gvec_bitsel_mips64el
|
|
#define tcg_can_emit_vecop_list tcg_can_emit_vecop_list_mips64el
|
|
#define vec_gen_2 vec_gen_2_mips64el
|
|
#define vec_gen_3 vec_gen_3_mips64el
|
|
#define vec_gen_4 vec_gen_4_mips64el
|
|
#define tcg_gen_mov_vec tcg_gen_mov_vec_mips64el
|
|
#define tcg_const_zeros_vec tcg_const_zeros_vec_mips64el
|
|
#define tcg_const_ones_vec tcg_const_ones_vec_mips64el
|
|
#define tcg_const_zeros_vec_matching tcg_const_zeros_vec_matching_mips64el
|
|
#define tcg_const_ones_vec_matching tcg_const_ones_vec_matching_mips64el
|
|
#define tcg_gen_dup64i_vec tcg_gen_dup64i_vec_mips64el
|
|
#define tcg_gen_dup32i_vec tcg_gen_dup32i_vec_mips64el
|
|
#define tcg_gen_dup16i_vec tcg_gen_dup16i_vec_mips64el
|
|
#define tcg_gen_dup8i_vec tcg_gen_dup8i_vec_mips64el
|
|
#define tcg_gen_dupi_vec tcg_gen_dupi_vec_mips64el
|
|
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_mips64el
|
|
#define tcg_gen_dup_i32_vec tcg_gen_dup_i32_vec_mips64el
|
|
#define tcg_gen_dup_mem_vec tcg_gen_dup_mem_vec_mips64el
|
|
#define tcg_gen_ld_vec tcg_gen_ld_vec_mips64el
|
|
#define tcg_gen_st_vec tcg_gen_st_vec_mips64el
|
|
#define tcg_gen_stl_vec tcg_gen_stl_vec_mips64el
|
|
#define tcg_gen_and_vec tcg_gen_and_vec_mips64el
|
|
#define tcg_gen_or_vec tcg_gen_or_vec_mips64el
|
|
#define tcg_gen_xor_vec tcg_gen_xor_vec_mips64el
|
|
#define tcg_gen_andc_vec tcg_gen_andc_vec_mips64el
|
|
#define tcg_gen_orc_vec tcg_gen_orc_vec_mips64el
|
|
#define tcg_gen_nand_vec tcg_gen_nand_vec_mips64el
|
|
#define tcg_gen_nor_vec tcg_gen_nor_vec_mips64el
|
|
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_mips64el
|
|
#define tcg_gen_not_vec tcg_gen_not_vec_mips64el
|
|
#define tcg_gen_neg_vec tcg_gen_neg_vec_mips64el
|
|
#define tcg_gen_abs_vec tcg_gen_abs_vec_mips64el
|
|
#define tcg_gen_shli_vec tcg_gen_shli_vec_mips64el
|
|
#define tcg_gen_shri_vec tcg_gen_shri_vec_mips64el
|
|
#define tcg_gen_sari_vec tcg_gen_sari_vec_mips64el
|
|
#define tcg_gen_cmp_vec tcg_gen_cmp_vec_mips64el
|
|
#define tcg_gen_add_vec tcg_gen_add_vec_mips64el
|
|
#define tcg_gen_sub_vec tcg_gen_sub_vec_mips64el
|
|
#define tcg_gen_mul_vec tcg_gen_mul_vec_mips64el
|
|
#define tcg_gen_ssadd_vec tcg_gen_ssadd_vec_mips64el
|
|
#define tcg_gen_usadd_vec tcg_gen_usadd_vec_mips64el
|
|
#define tcg_gen_sssub_vec tcg_gen_sssub_vec_mips64el
|
|
#define tcg_gen_ussub_vec tcg_gen_ussub_vec_mips64el
|
|
#define tcg_gen_smin_vec tcg_gen_smin_vec_mips64el
|
|
#define tcg_gen_umin_vec tcg_gen_umin_vec_mips64el
|
|
#define tcg_gen_smax_vec tcg_gen_smax_vec_mips64el
|
|
#define tcg_gen_umax_vec tcg_gen_umax_vec_mips64el
|
|
#define tcg_gen_shlv_vec tcg_gen_shlv_vec_mips64el
|
|
#define tcg_gen_shrv_vec tcg_gen_shrv_vec_mips64el
|
|
#define tcg_gen_sarv_vec tcg_gen_sarv_vec_mips64el
|
|
#define tcg_gen_shls_vec tcg_gen_shls_vec_mips64el
|
|
#define tcg_gen_shrs_vec tcg_gen_shrs_vec_mips64el
|
|
#define tcg_gen_sars_vec tcg_gen_sars_vec_mips64el
|
|
#define tcg_gen_bitsel_vec tcg_gen_bitsel_vec_mips64el
|
|
#define tcg_gen_cmpsel_vec tcg_gen_cmpsel_vec_mips64el
|
|
#define tb_htable_lookup tb_htable_lookup_mips64el
|
|
#define tb_set_jmp_target tb_set_jmp_target_mips64el
|
|
#define cpu_exec cpu_exec_mips64el
|
|
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_mips64el
|
|
#define cpu_reloading_memory_map cpu_reloading_memory_map_mips64el
|
|
#define cpu_loop_exit cpu_loop_exit_mips64el
|
|
#define cpu_loop_exit_restore cpu_loop_exit_restore_mips64el
|
|
#define cpu_loop_exit_atomic cpu_loop_exit_atomic_mips64el
|
|
#define tlb_init tlb_init_mips64el
|
|
#define tlb_flush_by_mmuidx tlb_flush_by_mmuidx_mips64el
|
|
#define tlb_flush tlb_flush_mips64el
|
|
#define tlb_flush_by_mmuidx_all_cpus tlb_flush_by_mmuidx_all_cpus_mips64el
|
|
#define tlb_flush_all_cpus tlb_flush_all_cpus_mips64el
|
|
#define tlb_flush_by_mmuidx_all_cpus_synced tlb_flush_by_mmuidx_all_cpus_synced_mips64el
|
|
#define tlb_flush_all_cpus_synced tlb_flush_all_cpus_synced_mips64el
|
|
#define tlb_flush_page_by_mmuidx tlb_flush_page_by_mmuidx_mips64el
|
|
#define tlb_flush_page tlb_flush_page_mips64el
|
|
#define tlb_flush_page_by_mmuidx_all_cpus tlb_flush_page_by_mmuidx_all_cpus_mips64el
|
|
#define tlb_flush_page_all_cpus tlb_flush_page_all_cpus_mips64el
|
|
#define tlb_flush_page_by_mmuidx_all_cpus_synced tlb_flush_page_by_mmuidx_all_cpus_synced_mips64el
|
|
#define tlb_flush_page_all_cpus_synced tlb_flush_page_all_cpus_synced_mips64el
|
|
#define tlb_protect_code tlb_protect_code_mips64el
|
|
#define tlb_unprotect_code tlb_unprotect_code_mips64el
|
|
#define tlb_reset_dirty tlb_reset_dirty_mips64el
|
|
#define tlb_set_dirty tlb_set_dirty_mips64el
|
|
#define tlb_set_page_with_attrs tlb_set_page_with_attrs_mips64el
|
|
#define tlb_set_page tlb_set_page_mips64el
|
|
#define get_page_addr_code_hostp get_page_addr_code_hostp_mips64el
|
|
#define get_page_addr_code get_page_addr_code_mips64el
|
|
#define probe_access probe_access_mips64el
|
|
#define tlb_vaddr_to_host tlb_vaddr_to_host_mips64el
|
|
#define helper_ret_ldub_mmu helper_ret_ldub_mmu_mips64el
|
|
#define helper_le_lduw_mmu helper_le_lduw_mmu_mips64el
|
|
#define helper_be_lduw_mmu helper_be_lduw_mmu_mips64el
|
|
#define helper_le_ldul_mmu helper_le_ldul_mmu_mips64el
|
|
#define helper_be_ldul_mmu helper_be_ldul_mmu_mips64el
|
|
#define helper_le_ldq_mmu helper_le_ldq_mmu_mips64el
|
|
#define helper_be_ldq_mmu helper_be_ldq_mmu_mips64el
|
|
#define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_mips64el
|
|
#define helper_le_ldsw_mmu helper_le_ldsw_mmu_mips64el
|
|
#define helper_be_ldsw_mmu helper_be_ldsw_mmu_mips64el
|
|
#define helper_le_ldsl_mmu helper_le_ldsl_mmu_mips64el
|
|
#define helper_be_ldsl_mmu helper_be_ldsl_mmu_mips64el
|
|
#define cpu_ldub_mmuidx_ra cpu_ldub_mmuidx_ra_mips64el
|
|
#define cpu_ldsb_mmuidx_ra cpu_ldsb_mmuidx_ra_mips64el
|
|
#define cpu_lduw_mmuidx_ra cpu_lduw_mmuidx_ra_mips64el
|
|
#define cpu_ldsw_mmuidx_ra cpu_ldsw_mmuidx_ra_mips64el
|
|
#define cpu_ldl_mmuidx_ra cpu_ldl_mmuidx_ra_mips64el
|
|
#define cpu_ldq_mmuidx_ra cpu_ldq_mmuidx_ra_mips64el
|
|
#define cpu_ldub_data_ra cpu_ldub_data_ra_mips64el
|
|
#define cpu_ldsb_data_ra cpu_ldsb_data_ra_mips64el
|
|
#define cpu_lduw_data_ra cpu_lduw_data_ra_mips64el
|
|
#define cpu_ldsw_data_ra cpu_ldsw_data_ra_mips64el
|
|
#define cpu_ldl_data_ra cpu_ldl_data_ra_mips64el
|
|
#define cpu_ldq_data_ra cpu_ldq_data_ra_mips64el
|
|
#define cpu_ldub_data cpu_ldub_data_mips64el
|
|
#define cpu_ldsb_data cpu_ldsb_data_mips64el
|
|
#define cpu_lduw_data cpu_lduw_data_mips64el
|
|
#define cpu_ldsw_data cpu_ldsw_data_mips64el
|
|
#define cpu_ldl_data cpu_ldl_data_mips64el
|
|
#define cpu_ldq_data cpu_ldq_data_mips64el
|
|
#define helper_ret_stb_mmu helper_ret_stb_mmu_mips64el
|
|
#define helper_le_stw_mmu helper_le_stw_mmu_mips64el
|
|
#define helper_be_stw_mmu helper_be_stw_mmu_mips64el
|
|
#define helper_le_stl_mmu helper_le_stl_mmu_mips64el
|
|
#define helper_be_stl_mmu helper_be_stl_mmu_mips64el
|
|
#define helper_le_stq_mmu helper_le_stq_mmu_mips64el
|
|
#define helper_be_stq_mmu helper_be_stq_mmu_mips64el
|
|
#define cpu_stb_mmuidx_ra cpu_stb_mmuidx_ra_mips64el
|
|
#define cpu_stw_mmuidx_ra cpu_stw_mmuidx_ra_mips64el
|
|
#define cpu_stl_mmuidx_ra cpu_stl_mmuidx_ra_mips64el
|
|
#define cpu_stq_mmuidx_ra cpu_stq_mmuidx_ra_mips64el
|
|
#define cpu_stb_data_ra cpu_stb_data_ra_mips64el
|
|
#define cpu_stw_data_ra cpu_stw_data_ra_mips64el
|
|
#define cpu_stl_data_ra cpu_stl_data_ra_mips64el
|
|
#define cpu_stq_data_ra cpu_stq_data_ra_mips64el
|
|
#define cpu_stb_data cpu_stb_data_mips64el
|
|
#define cpu_stw_data cpu_stw_data_mips64el
|
|
#define cpu_stl_data cpu_stl_data_mips64el
|
|
#define cpu_stq_data cpu_stq_data_mips64el
|
|
#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_mips64el
|
|
#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_mips64el
|
|
#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_mips64el
|
|
#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_mips64el
|
|
#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_mips64el
|
|
#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_mips64el
|
|
#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_mips64el
|
|
#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_mips64el
|
|
#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_mips64el
|
|
#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_mips64el
|
|
#define helper_atomic_fetch_sminb_mmu helper_atomic_fetch_sminb_mmu_mips64el
|
|
#define helper_atomic_fetch_uminb_mmu helper_atomic_fetch_uminb_mmu_mips64el
|
|
#define helper_atomic_fetch_smaxb_mmu helper_atomic_fetch_smaxb_mmu_mips64el
|
|
#define helper_atomic_fetch_umaxb_mmu helper_atomic_fetch_umaxb_mmu_mips64el
|
|
#define helper_atomic_smin_fetchb_mmu helper_atomic_smin_fetchb_mmu_mips64el
|
|
#define helper_atomic_umin_fetchb_mmu helper_atomic_umin_fetchb_mmu_mips64el
|
|
#define helper_atomic_smax_fetchb_mmu helper_atomic_smax_fetchb_mmu_mips64el
|
|
#define helper_atomic_umax_fetchb_mmu helper_atomic_umax_fetchb_mmu_mips64el
|
|
#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_mips64el
|
|
#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_mips64el
|
|
#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_mips64el
|
|
#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_mips64el
|
|
#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_mips64el
|
|
#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_mips64el
|
|
#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_mips64el
|
|
#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_mips64el
|
|
#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_mips64el
|
|
#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_mips64el
|
|
#define helper_atomic_fetch_sminw_le_mmu helper_atomic_fetch_sminw_le_mmu_mips64el
|
|
#define helper_atomic_fetch_uminw_le_mmu helper_atomic_fetch_uminw_le_mmu_mips64el
|
|
#define helper_atomic_fetch_smaxw_le_mmu helper_atomic_fetch_smaxw_le_mmu_mips64el
|
|
#define helper_atomic_fetch_umaxw_le_mmu helper_atomic_fetch_umaxw_le_mmu_mips64el
|
|
#define helper_atomic_smin_fetchw_le_mmu helper_atomic_smin_fetchw_le_mmu_mips64el
|
|
#define helper_atomic_umin_fetchw_le_mmu helper_atomic_umin_fetchw_le_mmu_mips64el
|
|
#define helper_atomic_smax_fetchw_le_mmu helper_atomic_smax_fetchw_le_mmu_mips64el
|
|
#define helper_atomic_umax_fetchw_le_mmu helper_atomic_umax_fetchw_le_mmu_mips64el
|
|
#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_mips64el
|
|
#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_mips64el
|
|
#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_mips64el
|
|
#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_mips64el
|
|
#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_mips64el
|
|
#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_mips64el
|
|
#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_mips64el
|
|
#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_mips64el
|
|
#define helper_atomic_fetch_sminw_be_mmu helper_atomic_fetch_sminw_be_mmu_mips64el
|
|
#define helper_atomic_fetch_uminw_be_mmu helper_atomic_fetch_uminw_be_mmu_mips64el
|
|
#define helper_atomic_fetch_smaxw_be_mmu helper_atomic_fetch_smaxw_be_mmu_mips64el
|
|
#define helper_atomic_fetch_umaxw_be_mmu helper_atomic_fetch_umaxw_be_mmu_mips64el
|
|
#define helper_atomic_smin_fetchw_be_mmu helper_atomic_smin_fetchw_be_mmu_mips64el
|
|
#define helper_atomic_umin_fetchw_be_mmu helper_atomic_umin_fetchw_be_mmu_mips64el
|
|
#define helper_atomic_smax_fetchw_be_mmu helper_atomic_smax_fetchw_be_mmu_mips64el
|
|
#define helper_atomic_umax_fetchw_be_mmu helper_atomic_umax_fetchw_be_mmu_mips64el
|
|
#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_mips64el
|
|
#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_mips64el
|
|
#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_mips64el
|
|
#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_mips64el
|
|
#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_mips64el
|
|
#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_mips64el
|
|
#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_mips64el
|
|
#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_mips64el
|
|
#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_mips64el
|
|
#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_mips64el
|
|
#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_mips64el
|
|
#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_mips64el
|
|
#define helper_atomic_fetch_sminl_le_mmu helper_atomic_fetch_sminl_le_mmu_mips64el
|
|
#define helper_atomic_fetch_uminl_le_mmu helper_atomic_fetch_uminl_le_mmu_mips64el
|
|
#define helper_atomic_fetch_smaxl_le_mmu helper_atomic_fetch_smaxl_le_mmu_mips64el
|
|
#define helper_atomic_fetch_umaxl_le_mmu helper_atomic_fetch_umaxl_le_mmu_mips64el
|
|
#define helper_atomic_smin_fetchl_le_mmu helper_atomic_smin_fetchl_le_mmu_mips64el
|
|
#define helper_atomic_umin_fetchl_le_mmu helper_atomic_umin_fetchl_le_mmu_mips64el
|
|
#define helper_atomic_smax_fetchl_le_mmu helper_atomic_smax_fetchl_le_mmu_mips64el
|
|
#define helper_atomic_umax_fetchl_le_mmu helper_atomic_umax_fetchl_le_mmu_mips64el
|
|
#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_mips64el
|
|
#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_mips64el
|
|
#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_mips64el
|
|
#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_mips64el
|
|
#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_mips64el
|
|
#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_mips64el
|
|
#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_mips64el
|
|
#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_mips64el
|
|
#define helper_atomic_fetch_sminl_be_mmu helper_atomic_fetch_sminl_be_mmu_mips64el
|
|
#define helper_atomic_fetch_uminl_be_mmu helper_atomic_fetch_uminl_be_mmu_mips64el
|
|
#define helper_atomic_fetch_smaxl_be_mmu helper_atomic_fetch_smaxl_be_mmu_mips64el
|
|
#define helper_atomic_fetch_umaxl_be_mmu helper_atomic_fetch_umaxl_be_mmu_mips64el
|
|
#define helper_atomic_smin_fetchl_be_mmu helper_atomic_smin_fetchl_be_mmu_mips64el
|
|
#define helper_atomic_umin_fetchl_be_mmu helper_atomic_umin_fetchl_be_mmu_mips64el
|
|
#define helper_atomic_smax_fetchl_be_mmu helper_atomic_smax_fetchl_be_mmu_mips64el
|
|
#define helper_atomic_umax_fetchl_be_mmu helper_atomic_umax_fetchl_be_mmu_mips64el
|
|
#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_mips64el
|
|
#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_mips64el
|
|
#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_mips64el
|
|
#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_mips64el
|
|
#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_mips64el
|
|
#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_mips64el
|
|
#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_mips64el
|
|
#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_mips64el
|
|
#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_mips64el
|
|
#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_mips64el
|
|
#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_mips64el
|
|
#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_mips64el
|
|
#define helper_atomic_fetch_sminq_le_mmu helper_atomic_fetch_sminq_le_mmu_mips64el
|
|
#define helper_atomic_fetch_uminq_le_mmu helper_atomic_fetch_uminq_le_mmu_mips64el
|
|
#define helper_atomic_fetch_smaxq_le_mmu helper_atomic_fetch_smaxq_le_mmu_mips64el
|
|
#define helper_atomic_fetch_umaxq_le_mmu helper_atomic_fetch_umaxq_le_mmu_mips64el
|
|
#define helper_atomic_smin_fetchq_le_mmu helper_atomic_smin_fetchq_le_mmu_mips64el
|
|
#define helper_atomic_umin_fetchq_le_mmu helper_atomic_umin_fetchq_le_mmu_mips64el
|
|
#define helper_atomic_smax_fetchq_le_mmu helper_atomic_smax_fetchq_le_mmu_mips64el
|
|
#define helper_atomic_umax_fetchq_le_mmu helper_atomic_umax_fetchq_le_mmu_mips64el
|
|
#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_mips64el
|
|
#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_mips64el
|
|
#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_mips64el
|
|
#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_mips64el
|
|
#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_mips64el
|
|
#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_mips64el
|
|
#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_mips64el
|
|
#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_mips64el
|
|
#define helper_atomic_fetch_sminq_be_mmu helper_atomic_fetch_sminq_be_mmu_mips64el
|
|
#define helper_atomic_fetch_uminq_be_mmu helper_atomic_fetch_uminq_be_mmu_mips64el
|
|
#define helper_atomic_fetch_smaxq_be_mmu helper_atomic_fetch_smaxq_be_mmu_mips64el
|
|
#define helper_atomic_fetch_umaxq_be_mmu helper_atomic_fetch_umaxq_be_mmu_mips64el
|
|
#define helper_atomic_smin_fetchq_be_mmu helper_atomic_smin_fetchq_be_mmu_mips64el
|
|
#define helper_atomic_umin_fetchq_be_mmu helper_atomic_umin_fetchq_be_mmu_mips64el
|
|
#define helper_atomic_smax_fetchq_be_mmu helper_atomic_smax_fetchq_be_mmu_mips64el
|
|
#define helper_atomic_umax_fetchq_be_mmu helper_atomic_umax_fetchq_be_mmu_mips64el
|
|
#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_mips64el
|
|
#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_mips64el
|
|
#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_mips64el
|
|
#define helper_atomic_xchgb helper_atomic_xchgb_mips64el
|
|
#define helper_atomic_fetch_addb helper_atomic_fetch_addb_mips64el
|
|
#define helper_atomic_fetch_andb helper_atomic_fetch_andb_mips64el
|
|
#define helper_atomic_fetch_orb helper_atomic_fetch_orb_mips64el
|
|
#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_mips64el
|
|
#define helper_atomic_add_fetchb helper_atomic_add_fetchb_mips64el
|
|
#define helper_atomic_and_fetchb helper_atomic_and_fetchb_mips64el
|
|
#define helper_atomic_or_fetchb helper_atomic_or_fetchb_mips64el
|
|
#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_mips64el
|
|
#define helper_atomic_fetch_sminb helper_atomic_fetch_sminb_mips64el
|
|
#define helper_atomic_fetch_uminb helper_atomic_fetch_uminb_mips64el
|
|
#define helper_atomic_fetch_smaxb helper_atomic_fetch_smaxb_mips64el
|
|
#define helper_atomic_fetch_umaxb helper_atomic_fetch_umaxb_mips64el
|
|
#define helper_atomic_smin_fetchb helper_atomic_smin_fetchb_mips64el
|
|
#define helper_atomic_umin_fetchb helper_atomic_umin_fetchb_mips64el
|
|
#define helper_atomic_smax_fetchb helper_atomic_smax_fetchb_mips64el
|
|
#define helper_atomic_umax_fetchb helper_atomic_umax_fetchb_mips64el
|
|
#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_mips64el
|
|
#define helper_atomic_xchgw_le helper_atomic_xchgw_le_mips64el
|
|
#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_mips64el
|
|
#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_mips64el
|
|
#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_mips64el
|
|
#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_mips64el
|
|
#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_mips64el
|
|
#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_mips64el
|
|
#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_mips64el
|
|
#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_mips64el
|
|
#define helper_atomic_fetch_sminw_le helper_atomic_fetch_sminw_le_mips64el
|
|
#define helper_atomic_fetch_uminw_le helper_atomic_fetch_uminw_le_mips64el
|
|
#define helper_atomic_fetch_smaxw_le helper_atomic_fetch_smaxw_le_mips64el
|
|
#define helper_atomic_fetch_umaxw_le helper_atomic_fetch_umaxw_le_mips64el
|
|
#define helper_atomic_smin_fetchw_le helper_atomic_smin_fetchw_le_mips64el
|
|
#define helper_atomic_umin_fetchw_le helper_atomic_umin_fetchw_le_mips64el
|
|
#define helper_atomic_smax_fetchw_le helper_atomic_smax_fetchw_le_mips64el
|
|
#define helper_atomic_umax_fetchw_le helper_atomic_umax_fetchw_le_mips64el
|
|
#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_mips64el
|
|
#define helper_atomic_xchgw_be helper_atomic_xchgw_be_mips64el
|
|
#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_mips64el
|
|
#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_mips64el
|
|
#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_mips64el
|
|
#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_mips64el
|
|
#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_mips64el
|
|
#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_mips64el
|
|
#define helper_atomic_fetch_sminw_be helper_atomic_fetch_sminw_be_mips64el
|
|
#define helper_atomic_fetch_uminw_be helper_atomic_fetch_uminw_be_mips64el
|
|
#define helper_atomic_fetch_smaxw_be helper_atomic_fetch_smaxw_be_mips64el
|
|
#define helper_atomic_fetch_umaxw_be helper_atomic_fetch_umaxw_be_mips64el
|
|
#define helper_atomic_smin_fetchw_be helper_atomic_smin_fetchw_be_mips64el
|
|
#define helper_atomic_umin_fetchw_be helper_atomic_umin_fetchw_be_mips64el
|
|
#define helper_atomic_smax_fetchw_be helper_atomic_smax_fetchw_be_mips64el
|
|
#define helper_atomic_umax_fetchw_be helper_atomic_umax_fetchw_be_mips64el
|
|
#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_mips64el
|
|
#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_mips64el
|
|
#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_mips64el
|
|
#define helper_atomic_xchgl_le helper_atomic_xchgl_le_mips64el
|
|
#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_mips64el
|
|
#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_mips64el
|
|
#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_mips64el
|
|
#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_mips64el
|
|
#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_mips64el
|
|
#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_mips64el
|
|
#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_mips64el
|
|
#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_mips64el
|
|
#define helper_atomic_fetch_sminl_le helper_atomic_fetch_sminl_le_mips64el
|
|
#define helper_atomic_fetch_uminl_le helper_atomic_fetch_uminl_le_mips64el
|
|
#define helper_atomic_fetch_smaxl_le helper_atomic_fetch_smaxl_le_mips64el
|
|
#define helper_atomic_fetch_umaxl_le helper_atomic_fetch_umaxl_le_mips64el
|
|
#define helper_atomic_smin_fetchl_le helper_atomic_smin_fetchl_le_mips64el
|
|
#define helper_atomic_umin_fetchl_le helper_atomic_umin_fetchl_le_mips64el
|
|
#define helper_atomic_smax_fetchl_le helper_atomic_smax_fetchl_le_mips64el
|
|
#define helper_atomic_umax_fetchl_le helper_atomic_umax_fetchl_le_mips64el
|
|
#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_mips64el
|
|
#define helper_atomic_xchgl_be helper_atomic_xchgl_be_mips64el
|
|
#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_mips64el
|
|
#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_mips64el
|
|
#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_mips64el
|
|
#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_mips64el
|
|
#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_mips64el
|
|
#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_mips64el
|
|
#define helper_atomic_fetch_sminl_be helper_atomic_fetch_sminl_be_mips64el
|
|
#define helper_atomic_fetch_uminl_be helper_atomic_fetch_uminl_be_mips64el
|
|
#define helper_atomic_fetch_smaxl_be helper_atomic_fetch_smaxl_be_mips64el
|
|
#define helper_atomic_fetch_umaxl_be helper_atomic_fetch_umaxl_be_mips64el
|
|
#define helper_atomic_smin_fetchl_be helper_atomic_smin_fetchl_be_mips64el
|
|
#define helper_atomic_umin_fetchl_be helper_atomic_umin_fetchl_be_mips64el
|
|
#define helper_atomic_smax_fetchl_be helper_atomic_smax_fetchl_be_mips64el
|
|
#define helper_atomic_umax_fetchl_be helper_atomic_umax_fetchl_be_mips64el
|
|
#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_mips64el
|
|
#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_mips64el
|
|
#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_mips64el
|
|
#define helper_atomic_xchgq_le helper_atomic_xchgq_le_mips64el
|
|
#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_mips64el
|
|
#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_mips64el
|
|
#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_mips64el
|
|
#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_mips64el
|
|
#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_mips64el
|
|
#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_mips64el
|
|
#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_mips64el
|
|
#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_mips64el
|
|
#define helper_atomic_fetch_sminq_le helper_atomic_fetch_sminq_le_mips64el
|
|
#define helper_atomic_fetch_uminq_le helper_atomic_fetch_uminq_le_mips64el
|
|
#define helper_atomic_fetch_smaxq_le helper_atomic_fetch_smaxq_le_mips64el
|
|
#define helper_atomic_fetch_umaxq_le helper_atomic_fetch_umaxq_le_mips64el
|
|
#define helper_atomic_smin_fetchq_le helper_atomic_smin_fetchq_le_mips64el
|
|
#define helper_atomic_umin_fetchq_le helper_atomic_umin_fetchq_le_mips64el
|
|
#define helper_atomic_smax_fetchq_le helper_atomic_smax_fetchq_le_mips64el
|
|
#define helper_atomic_umax_fetchq_le helper_atomic_umax_fetchq_le_mips64el
|
|
#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_mips64el
|
|
#define helper_atomic_xchgq_be helper_atomic_xchgq_be_mips64el
|
|
#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_mips64el
|
|
#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_mips64el
|
|
#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_mips64el
|
|
#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_mips64el
|
|
#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_mips64el
|
|
#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_mips64el
|
|
#define helper_atomic_fetch_sminq_be helper_atomic_fetch_sminq_be_mips64el
|
|
#define helper_atomic_fetch_uminq_be helper_atomic_fetch_uminq_be_mips64el
|
|
#define helper_atomic_fetch_smaxq_be helper_atomic_fetch_smaxq_be_mips64el
|
|
#define helper_atomic_fetch_umaxq_be helper_atomic_fetch_umaxq_be_mips64el
|
|
#define helper_atomic_smin_fetchq_be helper_atomic_smin_fetchq_be_mips64el
|
|
#define helper_atomic_umin_fetchq_be helper_atomic_umin_fetchq_be_mips64el
|
|
#define helper_atomic_smax_fetchq_be helper_atomic_smax_fetchq_be_mips64el
|
|
#define helper_atomic_umax_fetchq_be helper_atomic_umax_fetchq_be_mips64el
|
|
#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_mips64el
|
|
#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_mips64el
|
|
#define cpu_ldub_code cpu_ldub_code_mips64el
|
|
#define cpu_lduw_code cpu_lduw_code_mips64el
|
|
#define cpu_ldl_code cpu_ldl_code_mips64el
|
|
#define cpu_ldq_code cpu_ldq_code_mips64el
|
|
#define helper_div_i32 helper_div_i32_mips64el
|
|
#define helper_rem_i32 helper_rem_i32_mips64el
|
|
#define helper_divu_i32 helper_divu_i32_mips64el
|
|
#define helper_remu_i32 helper_remu_i32_mips64el
|
|
#define helper_shl_i64 helper_shl_i64_mips64el
|
|
#define helper_shr_i64 helper_shr_i64_mips64el
|
|
#define helper_sar_i64 helper_sar_i64_mips64el
|
|
#define helper_div_i64 helper_div_i64_mips64el
|
|
#define helper_rem_i64 helper_rem_i64_mips64el
|
|
#define helper_divu_i64 helper_divu_i64_mips64el
|
|
#define helper_remu_i64 helper_remu_i64_mips64el
|
|
#define helper_muluh_i64 helper_muluh_i64_mips64el
|
|
#define helper_mulsh_i64 helper_mulsh_i64_mips64el
|
|
#define helper_clz_i32 helper_clz_i32_mips64el
|
|
#define helper_ctz_i32 helper_ctz_i32_mips64el
|
|
#define helper_clz_i64 helper_clz_i64_mips64el
|
|
#define helper_ctz_i64 helper_ctz_i64_mips64el
|
|
#define helper_clrsb_i32 helper_clrsb_i32_mips64el
|
|
#define helper_clrsb_i64 helper_clrsb_i64_mips64el
|
|
#define helper_ctpop_i32 helper_ctpop_i32_mips64el
|
|
#define helper_ctpop_i64 helper_ctpop_i64_mips64el
|
|
#define helper_lookup_tb_ptr helper_lookup_tb_ptr_mips64el
|
|
#define helper_exit_atomic helper_exit_atomic_mips64el
|
|
#define helper_gvec_add8 helper_gvec_add8_mips64el
|
|
#define helper_gvec_add16 helper_gvec_add16_mips64el
|
|
#define helper_gvec_add32 helper_gvec_add32_mips64el
|
|
#define helper_gvec_add64 helper_gvec_add64_mips64el
|
|
#define helper_gvec_adds8 helper_gvec_adds8_mips64el
|
|
#define helper_gvec_adds16 helper_gvec_adds16_mips64el
|
|
#define helper_gvec_adds32 helper_gvec_adds32_mips64el
|
|
#define helper_gvec_adds64 helper_gvec_adds64_mips64el
|
|
#define helper_gvec_sub8 helper_gvec_sub8_mips64el
|
|
#define helper_gvec_sub16 helper_gvec_sub16_mips64el
|
|
#define helper_gvec_sub32 helper_gvec_sub32_mips64el
|
|
#define helper_gvec_sub64 helper_gvec_sub64_mips64el
|
|
#define helper_gvec_subs8 helper_gvec_subs8_mips64el
|
|
#define helper_gvec_subs16 helper_gvec_subs16_mips64el
|
|
#define helper_gvec_subs32 helper_gvec_subs32_mips64el
|
|
#define helper_gvec_subs64 helper_gvec_subs64_mips64el
|
|
#define helper_gvec_mul8 helper_gvec_mul8_mips64el
|
|
#define helper_gvec_mul16 helper_gvec_mul16_mips64el
|
|
#define helper_gvec_mul32 helper_gvec_mul32_mips64el
|
|
#define helper_gvec_mul64 helper_gvec_mul64_mips64el
|
|
#define helper_gvec_muls8 helper_gvec_muls8_mips64el
|
|
#define helper_gvec_muls16 helper_gvec_muls16_mips64el
|
|
#define helper_gvec_muls32 helper_gvec_muls32_mips64el
|
|
#define helper_gvec_muls64 helper_gvec_muls64_mips64el
|
|
#define helper_gvec_neg8 helper_gvec_neg8_mips64el
|
|
#define helper_gvec_neg16 helper_gvec_neg16_mips64el
|
|
#define helper_gvec_neg32 helper_gvec_neg32_mips64el
|
|
#define helper_gvec_neg64 helper_gvec_neg64_mips64el
|
|
#define helper_gvec_abs8 helper_gvec_abs8_mips64el
|
|
#define helper_gvec_abs16 helper_gvec_abs16_mips64el
|
|
#define helper_gvec_abs32 helper_gvec_abs32_mips64el
|
|
#define helper_gvec_abs64 helper_gvec_abs64_mips64el
|
|
#define helper_gvec_mov helper_gvec_mov_mips64el
|
|
#define helper_gvec_dup64 helper_gvec_dup64_mips64el
|
|
#define helper_gvec_dup32 helper_gvec_dup32_mips64el
|
|
#define helper_gvec_dup16 helper_gvec_dup16_mips64el
|
|
#define helper_gvec_dup8 helper_gvec_dup8_mips64el
|
|
#define helper_gvec_not helper_gvec_not_mips64el
|
|
#define helper_gvec_and helper_gvec_and_mips64el
|
|
#define helper_gvec_or helper_gvec_or_mips64el
|
|
#define helper_gvec_xor helper_gvec_xor_mips64el
|
|
#define helper_gvec_andc helper_gvec_andc_mips64el
|
|
#define helper_gvec_orc helper_gvec_orc_mips64el
|
|
#define helper_gvec_nand helper_gvec_nand_mips64el
|
|
#define helper_gvec_nor helper_gvec_nor_mips64el
|
|
#define helper_gvec_eqv helper_gvec_eqv_mips64el
|
|
#define helper_gvec_ands helper_gvec_ands_mips64el
|
|
#define helper_gvec_xors helper_gvec_xors_mips64el
|
|
#define helper_gvec_ors helper_gvec_ors_mips64el
|
|
#define helper_gvec_shl8i helper_gvec_shl8i_mips64el
|
|
#define helper_gvec_shl16i helper_gvec_shl16i_mips64el
|
|
#define helper_gvec_shl32i helper_gvec_shl32i_mips64el
|
|
#define helper_gvec_shl64i helper_gvec_shl64i_mips64el
|
|
#define helper_gvec_shr8i helper_gvec_shr8i_mips64el
|
|
#define helper_gvec_shr16i helper_gvec_shr16i_mips64el
|
|
#define helper_gvec_shr32i helper_gvec_shr32i_mips64el
|
|
#define helper_gvec_shr64i helper_gvec_shr64i_mips64el
|
|
#define helper_gvec_sar8i helper_gvec_sar8i_mips64el
|
|
#define helper_gvec_sar16i helper_gvec_sar16i_mips64el
|
|
#define helper_gvec_sar32i helper_gvec_sar32i_mips64el
|
|
#define helper_gvec_sar64i helper_gvec_sar64i_mips64el
|
|
#define helper_gvec_shl8v helper_gvec_shl8v_mips64el
|
|
#define helper_gvec_shl16v helper_gvec_shl16v_mips64el
|
|
#define helper_gvec_shl32v helper_gvec_shl32v_mips64el
|
|
#define helper_gvec_shl64v helper_gvec_shl64v_mips64el
|
|
#define helper_gvec_shr8v helper_gvec_shr8v_mips64el
|
|
#define helper_gvec_shr16v helper_gvec_shr16v_mips64el
|
|
#define helper_gvec_shr32v helper_gvec_shr32v_mips64el
|
|
#define helper_gvec_shr64v helper_gvec_shr64v_mips64el
|
|
#define helper_gvec_sar8v helper_gvec_sar8v_mips64el
|
|
#define helper_gvec_sar16v helper_gvec_sar16v_mips64el
|
|
#define helper_gvec_sar32v helper_gvec_sar32v_mips64el
|
|
#define helper_gvec_sar64v helper_gvec_sar64v_mips64el
|
|
#define helper_gvec_eq8 helper_gvec_eq8_mips64el
|
|
#define helper_gvec_ne8 helper_gvec_ne8_mips64el
|
|
#define helper_gvec_lt8 helper_gvec_lt8_mips64el
|
|
#define helper_gvec_le8 helper_gvec_le8_mips64el
|
|
#define helper_gvec_ltu8 helper_gvec_ltu8_mips64el
|
|
#define helper_gvec_leu8 helper_gvec_leu8_mips64el
|
|
#define helper_gvec_eq16 helper_gvec_eq16_mips64el
|
|
#define helper_gvec_ne16 helper_gvec_ne16_mips64el
|
|
#define helper_gvec_lt16 helper_gvec_lt16_mips64el
|
|
#define helper_gvec_le16 helper_gvec_le16_mips64el
|
|
#define helper_gvec_ltu16 helper_gvec_ltu16_mips64el
|
|
#define helper_gvec_leu16 helper_gvec_leu16_mips64el
|
|
#define helper_gvec_eq32 helper_gvec_eq32_mips64el
|
|
#define helper_gvec_ne32 helper_gvec_ne32_mips64el
|
|
#define helper_gvec_lt32 helper_gvec_lt32_mips64el
|
|
#define helper_gvec_le32 helper_gvec_le32_mips64el
|
|
#define helper_gvec_ltu32 helper_gvec_ltu32_mips64el
|
|
#define helper_gvec_leu32 helper_gvec_leu32_mips64el
|
|
#define helper_gvec_eq64 helper_gvec_eq64_mips64el
|
|
#define helper_gvec_ne64 helper_gvec_ne64_mips64el
|
|
#define helper_gvec_lt64 helper_gvec_lt64_mips64el
|
|
#define helper_gvec_le64 helper_gvec_le64_mips64el
|
|
#define helper_gvec_ltu64 helper_gvec_ltu64_mips64el
|
|
#define helper_gvec_leu64 helper_gvec_leu64_mips64el
|
|
#define helper_gvec_ssadd8 helper_gvec_ssadd8_mips64el
|
|
#define helper_gvec_ssadd16 helper_gvec_ssadd16_mips64el
|
|
#define helper_gvec_ssadd32 helper_gvec_ssadd32_mips64el
|
|
#define helper_gvec_ssadd64 helper_gvec_ssadd64_mips64el
|
|
#define helper_gvec_sssub8 helper_gvec_sssub8_mips64el
|
|
#define helper_gvec_sssub16 helper_gvec_sssub16_mips64el
|
|
#define helper_gvec_sssub32 helper_gvec_sssub32_mips64el
|
|
#define helper_gvec_sssub64 helper_gvec_sssub64_mips64el
|
|
#define helper_gvec_usadd8 helper_gvec_usadd8_mips64el
|
|
#define helper_gvec_usadd16 helper_gvec_usadd16_mips64el
|
|
#define helper_gvec_usadd32 helper_gvec_usadd32_mips64el
|
|
#define helper_gvec_usadd64 helper_gvec_usadd64_mips64el
|
|
#define helper_gvec_ussub8 helper_gvec_ussub8_mips64el
|
|
#define helper_gvec_ussub16 helper_gvec_ussub16_mips64el
|
|
#define helper_gvec_ussub32 helper_gvec_ussub32_mips64el
|
|
#define helper_gvec_ussub64 helper_gvec_ussub64_mips64el
|
|
#define helper_gvec_smin8 helper_gvec_smin8_mips64el
|
|
#define helper_gvec_smin16 helper_gvec_smin16_mips64el
|
|
#define helper_gvec_smin32 helper_gvec_smin32_mips64el
|
|
#define helper_gvec_smin64 helper_gvec_smin64_mips64el
|
|
#define helper_gvec_smax8 helper_gvec_smax8_mips64el
|
|
#define helper_gvec_smax16 helper_gvec_smax16_mips64el
|
|
#define helper_gvec_smax32 helper_gvec_smax32_mips64el
|
|
#define helper_gvec_smax64 helper_gvec_smax64_mips64el
|
|
#define helper_gvec_umin8 helper_gvec_umin8_mips64el
|
|
#define helper_gvec_umin16 helper_gvec_umin16_mips64el
|
|
#define helper_gvec_umin32 helper_gvec_umin32_mips64el
|
|
#define helper_gvec_umin64 helper_gvec_umin64_mips64el
|
|
#define helper_gvec_umax8 helper_gvec_umax8_mips64el
|
|
#define helper_gvec_umax16 helper_gvec_umax16_mips64el
|
|
#define helper_gvec_umax32 helper_gvec_umax32_mips64el
|
|
#define helper_gvec_umax64 helper_gvec_umax64_mips64el
|
|
#define helper_gvec_bitsel helper_gvec_bitsel_mips64el
|
|
#define cpu_restore_state cpu_restore_state_mips64el
|
|
#define page_collection_lock page_collection_lock_mips64el
|
|
#define page_collection_unlock page_collection_unlock_mips64el
|
|
#define free_code_gen_buffer free_code_gen_buffer_mips64el
|
|
#define tcg_exec_init tcg_exec_init_mips64el
|
|
#define tb_cleanup tb_cleanup_mips64el
|
|
#define tb_flush tb_flush_mips64el
|
|
#define tb_phys_invalidate tb_phys_invalidate_mips64el
|
|
#define tb_gen_code tb_gen_code_mips64el
|
|
#define tb_exec_lock tb_exec_lock_mips64el
|
|
#define tb_exec_unlock tb_exec_unlock_mips64el
|
|
#define tb_invalidate_phys_page_range tb_invalidate_phys_page_range_mips64el
|
|
#define tb_invalidate_phys_range tb_invalidate_phys_range_mips64el
|
|
#define tb_invalidate_phys_page_fast tb_invalidate_phys_page_fast_mips64el
|
|
#define tb_check_watchpoint tb_check_watchpoint_mips64el
|
|
#define cpu_io_recompile cpu_io_recompile_mips64el
|
|
#define tb_flush_jmp_cache tb_flush_jmp_cache_mips64el
|
|
#define tcg_flush_softmmu_tlb tcg_flush_softmmu_tlb_mips64el
|
|
#define translator_loop_temp_check translator_loop_temp_check_mips64el
|
|
#define translator_loop translator_loop_mips64el
|
|
#define helper_atomic_cmpxchgo_le_mmu helper_atomic_cmpxchgo_le_mmu_mips64el
|
|
#define helper_atomic_cmpxchgo_be_mmu helper_atomic_cmpxchgo_be_mmu_mips64el
|
|
#define helper_atomic_ldo_le_mmu helper_atomic_ldo_le_mmu_mips64el
|
|
#define helper_atomic_ldo_be_mmu helper_atomic_ldo_be_mmu_mips64el
|
|
#define helper_atomic_sto_le_mmu helper_atomic_sto_le_mmu_mips64el
|
|
#define helper_atomic_sto_be_mmu helper_atomic_sto_be_mmu_mips64el
|
|
#define unassigned_mem_ops unassigned_mem_ops_mips64el
|
|
#define floatx80_infinity floatx80_infinity_mips64el
|
|
#define dup_const_func dup_const_func_mips64el
|
|
#define gen_helper_raise_exception gen_helper_raise_exception_mips64el
|
|
#define gen_helper_raise_interrupt gen_helper_raise_interrupt_mips64el
|
|
#define gen_helper_vfp_get_fpscr gen_helper_vfp_get_fpscr_mips64el
|
|
#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_mips64el
|
|
#define gen_helper_cpsr_read gen_helper_cpsr_read_mips64el
|
|
#define gen_helper_cpsr_write gen_helper_cpsr_write_mips64el
|
|
#define helper_mfc0_mvpcontrol helper_mfc0_mvpcontrol_mips64el
|
|
#define helper_mfc0_mvpconf0 helper_mfc0_mvpconf0_mips64el
|
|
#define helper_mfc0_mvpconf1 helper_mfc0_mvpconf1_mips64el
|
|
#define helper_mfc0_random helper_mfc0_random_mips64el
|
|
#define helper_mfc0_tcstatus helper_mfc0_tcstatus_mips64el
|
|
#define helper_mftc0_tcstatus helper_mftc0_tcstatus_mips64el
|
|
#define helper_mfc0_tcbind helper_mfc0_tcbind_mips64el
|
|
#define helper_mftc0_tcbind helper_mftc0_tcbind_mips64el
|
|
#define helper_mfc0_tcrestart helper_mfc0_tcrestart_mips64el
|
|
#define helper_mftc0_tcrestart helper_mftc0_tcrestart_mips64el
|
|
#define helper_mfc0_tchalt helper_mfc0_tchalt_mips64el
|
|
#define helper_mftc0_tchalt helper_mftc0_tchalt_mips64el
|
|
#define helper_mfc0_tccontext helper_mfc0_tccontext_mips64el
|
|
#define helper_mftc0_tccontext helper_mftc0_tccontext_mips64el
|
|
#define helper_mfc0_tcschedule helper_mfc0_tcschedule_mips64el
|
|
#define helper_mftc0_tcschedule helper_mftc0_tcschedule_mips64el
|
|
#define helper_mfc0_tcschefback helper_mfc0_tcschefback_mips64el
|
|
#define helper_mftc0_tcschefback helper_mftc0_tcschefback_mips64el
|
|
#define helper_mfc0_count helper_mfc0_count_mips64el
|
|
#define helper_mfc0_saar helper_mfc0_saar_mips64el
|
|
#define helper_mfhc0_saar helper_mfhc0_saar_mips64el
|
|
#define helper_mftc0_entryhi helper_mftc0_entryhi_mips64el
|
|
#define helper_mftc0_cause helper_mftc0_cause_mips64el
|
|
#define helper_mftc0_status helper_mftc0_status_mips64el
|
|
#define helper_mfc0_lladdr helper_mfc0_lladdr_mips64el
|
|
#define helper_mfc0_maar helper_mfc0_maar_mips64el
|
|
#define helper_mfhc0_maar helper_mfhc0_maar_mips64el
|
|
#define helper_mfc0_watchlo helper_mfc0_watchlo_mips64el
|
|
#define helper_mfc0_watchhi helper_mfc0_watchhi_mips64el
|
|
#define helper_mfhc0_watchhi helper_mfhc0_watchhi_mips64el
|
|
#define helper_mfc0_debug helper_mfc0_debug_mips64el
|
|
#define helper_mftc0_debug helper_mftc0_debug_mips64el
|
|
#define helper_dmfc0_tcrestart helper_dmfc0_tcrestart_mips64el
|
|
#define helper_dmfc0_tchalt helper_dmfc0_tchalt_mips64el
|
|
#define helper_dmfc0_tccontext helper_dmfc0_tccontext_mips64el
|
|
#define helper_dmfc0_tcschedule helper_dmfc0_tcschedule_mips64el
|
|
#define helper_dmfc0_tcschefback helper_dmfc0_tcschefback_mips64el
|
|
#define helper_dmfc0_lladdr helper_dmfc0_lladdr_mips64el
|
|
#define helper_dmfc0_maar helper_dmfc0_maar_mips64el
|
|
#define helper_dmfc0_watchlo helper_dmfc0_watchlo_mips64el
|
|
#define helper_dmfc0_watchhi helper_dmfc0_watchhi_mips64el
|
|
#define helper_dmfc0_saar helper_dmfc0_saar_mips64el
|
|
#define helper_mtc0_index helper_mtc0_index_mips64el
|
|
#define helper_mtc0_mvpcontrol helper_mtc0_mvpcontrol_mips64el
|
|
#define helper_mtc0_vpecontrol helper_mtc0_vpecontrol_mips64el
|
|
#define helper_mttc0_vpecontrol helper_mttc0_vpecontrol_mips64el
|
|
#define helper_mftc0_vpecontrol helper_mftc0_vpecontrol_mips64el
|
|
#define helper_mftc0_vpeconf0 helper_mftc0_vpeconf0_mips64el
|
|
#define helper_mtc0_vpeconf0 helper_mtc0_vpeconf0_mips64el
|
|
#define helper_mttc0_vpeconf0 helper_mttc0_vpeconf0_mips64el
|
|
#define helper_mtc0_vpeconf1 helper_mtc0_vpeconf1_mips64el
|
|
#define helper_mtc0_yqmask helper_mtc0_yqmask_mips64el
|
|
#define helper_mtc0_vpeopt helper_mtc0_vpeopt_mips64el
|
|
#define helper_mtc0_entrylo0 helper_mtc0_entrylo0_mips64el
|
|
#define helper_dmtc0_entrylo0 helper_dmtc0_entrylo0_mips64el
|
|
#define helper_mtc0_tcstatus helper_mtc0_tcstatus_mips64el
|
|
#define helper_mttc0_tcstatus helper_mttc0_tcstatus_mips64el
|
|
#define helper_mtc0_tcbind helper_mtc0_tcbind_mips64el
|
|
#define helper_mttc0_tcbind helper_mttc0_tcbind_mips64el
|
|
#define helper_mtc0_tcrestart helper_mtc0_tcrestart_mips64el
|
|
#define helper_mttc0_tcrestart helper_mttc0_tcrestart_mips64el
|
|
#define helper_mtc0_tchalt helper_mtc0_tchalt_mips64el
|
|
#define helper_mttc0_tchalt helper_mttc0_tchalt_mips64el
|
|
#define helper_mtc0_tccontext helper_mtc0_tccontext_mips64el
|
|
#define helper_mttc0_tccontext helper_mttc0_tccontext_mips64el
|
|
#define helper_mtc0_tcschedule helper_mtc0_tcschedule_mips64el
|
|
#define helper_mttc0_tcschedule helper_mttc0_tcschedule_mips64el
|
|
#define helper_mtc0_tcschefback helper_mtc0_tcschefback_mips64el
|
|
#define helper_mttc0_tcschefback helper_mttc0_tcschefback_mips64el
|
|
#define helper_mtc0_entrylo1 helper_mtc0_entrylo1_mips64el
|
|
#define helper_dmtc0_entrylo1 helper_dmtc0_entrylo1_mips64el
|
|
#define helper_mtc0_context helper_mtc0_context_mips64el
|
|
#define helper_mtc0_memorymapid helper_mtc0_memorymapid_mips64el
|
|
#define update_pagemask update_pagemask_mips64el
|
|
#define helper_mtc0_pagemask helper_mtc0_pagemask_mips64el
|
|
#define helper_mtc0_pagegrain helper_mtc0_pagegrain_mips64el
|
|
#define helper_mtc0_segctl0 helper_mtc0_segctl0_mips64el
|
|
#define helper_mtc0_segctl1 helper_mtc0_segctl1_mips64el
|
|
#define helper_mtc0_segctl2 helper_mtc0_segctl2_mips64el
|
|
#define helper_mtc0_pwfield helper_mtc0_pwfield_mips64el
|
|
#define helper_mtc0_pwsize helper_mtc0_pwsize_mips64el
|
|
#define helper_mtc0_wired helper_mtc0_wired_mips64el
|
|
#define helper_mtc0_pwctl helper_mtc0_pwctl_mips64el
|
|
#define helper_mtc0_srsconf0 helper_mtc0_srsconf0_mips64el
|
|
#define helper_mtc0_srsconf1 helper_mtc0_srsconf1_mips64el
|
|
#define helper_mtc0_srsconf2 helper_mtc0_srsconf2_mips64el
|
|
#define helper_mtc0_srsconf3 helper_mtc0_srsconf3_mips64el
|
|
#define helper_mtc0_srsconf4 helper_mtc0_srsconf4_mips64el
|
|
#define helper_mtc0_hwrena helper_mtc0_hwrena_mips64el
|
|
#define helper_mtc0_count helper_mtc0_count_mips64el
|
|
#define helper_mtc0_saari helper_mtc0_saari_mips64el
|
|
#define helper_mtc0_saar helper_mtc0_saar_mips64el
|
|
#define helper_mthc0_saar helper_mthc0_saar_mips64el
|
|
#define helper_mtc0_entryhi helper_mtc0_entryhi_mips64el
|
|
#define helper_mttc0_entryhi helper_mttc0_entryhi_mips64el
|
|
#define helper_mtc0_compare helper_mtc0_compare_mips64el
|
|
#define helper_mtc0_status helper_mtc0_status_mips64el
|
|
#define helper_mttc0_status helper_mttc0_status_mips64el
|
|
#define helper_mtc0_intctl helper_mtc0_intctl_mips64el
|
|
#define helper_mtc0_srsctl helper_mtc0_srsctl_mips64el
|
|
#define helper_mtc0_cause helper_mtc0_cause_mips64el
|
|
#define helper_mttc0_cause helper_mttc0_cause_mips64el
|
|
#define helper_mftc0_epc helper_mftc0_epc_mips64el
|
|
#define helper_mftc0_ebase helper_mftc0_ebase_mips64el
|
|
#define helper_mtc0_ebase helper_mtc0_ebase_mips64el
|
|
#define helper_mttc0_ebase helper_mttc0_ebase_mips64el
|
|
#define helper_mftc0_configx helper_mftc0_configx_mips64el
|
|
#define helper_mtc0_config0 helper_mtc0_config0_mips64el
|
|
#define helper_mtc0_config2 helper_mtc0_config2_mips64el
|
|
#define helper_mtc0_config3 helper_mtc0_config3_mips64el
|
|
#define helper_mtc0_config4 helper_mtc0_config4_mips64el
|
|
#define helper_mtc0_config5 helper_mtc0_config5_mips64el
|
|
#define helper_mtc0_lladdr helper_mtc0_lladdr_mips64el
|
|
#define helper_mtc0_maar helper_mtc0_maar_mips64el
|
|
#define helper_mthc0_maar helper_mthc0_maar_mips64el
|
|
#define helper_mtc0_maari helper_mtc0_maari_mips64el
|
|
#define helper_mtc0_watchlo helper_mtc0_watchlo_mips64el
|
|
#define helper_mtc0_watchhi helper_mtc0_watchhi_mips64el
|
|
#define helper_mthc0_watchhi helper_mthc0_watchhi_mips64el
|
|
#define helper_mtc0_xcontext helper_mtc0_xcontext_mips64el
|
|
#define helper_mtc0_framemask helper_mtc0_framemask_mips64el
|
|
#define helper_mtc0_debug helper_mtc0_debug_mips64el
|
|
#define helper_mttc0_debug helper_mttc0_debug_mips64el
|
|
#define helper_mtc0_performance0 helper_mtc0_performance0_mips64el
|
|
#define helper_mtc0_errctl helper_mtc0_errctl_mips64el
|
|
#define helper_mtc0_taglo helper_mtc0_taglo_mips64el
|
|
#define helper_mtc0_datalo helper_mtc0_datalo_mips64el
|
|
#define helper_mtc0_taghi helper_mtc0_taghi_mips64el
|
|
#define helper_mtc0_datahi helper_mtc0_datahi_mips64el
|
|
#define helper_mftgpr helper_mftgpr_mips64el
|
|
#define helper_mftlo helper_mftlo_mips64el
|
|
#define helper_mfthi helper_mfthi_mips64el
|
|
#define helper_mftacx helper_mftacx_mips64el
|
|
#define helper_mftdsp helper_mftdsp_mips64el
|
|
#define helper_mttgpr helper_mttgpr_mips64el
|
|
#define helper_mttlo helper_mttlo_mips64el
|
|
#define helper_mtthi helper_mtthi_mips64el
|
|
#define helper_mttacx helper_mttacx_mips64el
|
|
#define helper_mttdsp helper_mttdsp_mips64el
|
|
#define helper_dmt helper_dmt_mips64el
|
|
#define helper_emt helper_emt_mips64el
|
|
#define helper_dvpe helper_dvpe_mips64el
|
|
#define helper_evpe helper_evpe_mips64el
|
|
#define helper_dvp helper_dvp_mips64el
|
|
#define helper_evp helper_evp_mips64el
|
|
#define cpu_mips_get_random cpu_mips_get_random_mips64el
|
|
#define cpu_mips_init cpu_mips_init_mips64el
|
|
#define helper_absq_s_ph helper_absq_s_ph_mips64el
|
|
#define helper_absq_s_qb helper_absq_s_qb_mips64el
|
|
#define helper_absq_s_w helper_absq_s_w_mips64el
|
|
#define helper_absq_s_ob helper_absq_s_ob_mips64el
|
|
#define helper_absq_s_qh helper_absq_s_qh_mips64el
|
|
#define helper_absq_s_pw helper_absq_s_pw_mips64el
|
|
#define helper_addqh_ph helper_addqh_ph_mips64el
|
|
#define helper_addqh_r_ph helper_addqh_r_ph_mips64el
|
|
#define helper_addqh_r_w helper_addqh_r_w_mips64el
|
|
#define helper_addqh_w helper_addqh_w_mips64el
|
|
#define helper_adduh_qb helper_adduh_qb_mips64el
|
|
#define helper_adduh_r_qb helper_adduh_r_qb_mips64el
|
|
#define helper_subqh_ph helper_subqh_ph_mips64el
|
|
#define helper_subqh_r_ph helper_subqh_r_ph_mips64el
|
|
#define helper_subqh_r_w helper_subqh_r_w_mips64el
|
|
#define helper_subqh_w helper_subqh_w_mips64el
|
|
#define helper_addq_ph helper_addq_ph_mips64el
|
|
#define helper_addq_s_ph helper_addq_s_ph_mips64el
|
|
#define helper_addq_s_w helper_addq_s_w_mips64el
|
|
#define helper_addu_ph helper_addu_ph_mips64el
|
|
#define helper_addu_qb helper_addu_qb_mips64el
|
|
#define helper_addu_s_ph helper_addu_s_ph_mips64el
|
|
#define helper_addu_s_qb helper_addu_s_qb_mips64el
|
|
#define helper_subq_ph helper_subq_ph_mips64el
|
|
#define helper_subq_s_ph helper_subq_s_ph_mips64el
|
|
#define helper_subq_s_w helper_subq_s_w_mips64el
|
|
#define helper_subu_ph helper_subu_ph_mips64el
|
|
#define helper_subu_qb helper_subu_qb_mips64el
|
|
#define helper_subu_s_ph helper_subu_s_ph_mips64el
|
|
#define helper_subu_s_qb helper_subu_s_qb_mips64el
|
|
#define helper_adduh_ob helper_adduh_ob_mips64el
|
|
#define helper_adduh_r_ob helper_adduh_r_ob_mips64el
|
|
#define helper_subuh_ob helper_subuh_ob_mips64el
|
|
#define helper_subuh_r_ob helper_subuh_r_ob_mips64el
|
|
#define helper_addq_pw helper_addq_pw_mips64el
|
|
#define helper_addq_qh helper_addq_qh_mips64el
|
|
#define helper_addq_s_pw helper_addq_s_pw_mips64el
|
|
#define helper_addq_s_qh helper_addq_s_qh_mips64el
|
|
#define helper_addu_ob helper_addu_ob_mips64el
|
|
#define helper_addu_qh helper_addu_qh_mips64el
|
|
#define helper_addu_s_ob helper_addu_s_ob_mips64el
|
|
#define helper_addu_s_qh helper_addu_s_qh_mips64el
|
|
#define helper_subq_pw helper_subq_pw_mips64el
|
|
#define helper_subq_qh helper_subq_qh_mips64el
|
|
#define helper_subq_s_pw helper_subq_s_pw_mips64el
|
|
#define helper_subq_s_qh helper_subq_s_qh_mips64el
|
|
#define helper_subu_ob helper_subu_ob_mips64el
|
|
#define helper_subu_qh helper_subu_qh_mips64el
|
|
#define helper_subu_s_ob helper_subu_s_ob_mips64el
|
|
#define helper_subu_s_qh helper_subu_s_qh_mips64el
|
|
#define helper_subuh_qb helper_subuh_qb_mips64el
|
|
#define helper_subuh_r_qb helper_subuh_r_qb_mips64el
|
|
#define helper_addsc helper_addsc_mips64el
|
|
#define helper_addwc helper_addwc_mips64el
|
|
#define helper_modsub helper_modsub_mips64el
|
|
#define helper_raddu_w_qb helper_raddu_w_qb_mips64el
|
|
#define helper_raddu_l_ob helper_raddu_l_ob_mips64el
|
|
#define helper_precr_qb_ph helper_precr_qb_ph_mips64el
|
|
#define helper_precrq_qb_ph helper_precrq_qb_ph_mips64el
|
|
#define helper_precr_sra_ph_w helper_precr_sra_ph_w_mips64el
|
|
#define helper_precr_sra_r_ph_w helper_precr_sra_r_ph_w_mips64el
|
|
#define helper_precrq_ph_w helper_precrq_ph_w_mips64el
|
|
#define helper_precrq_rs_ph_w helper_precrq_rs_ph_w_mips64el
|
|
#define helper_precr_ob_qh helper_precr_ob_qh_mips64el
|
|
#define helper_precr_sra_qh_pw helper_precr_sra_qh_pw_mips64el
|
|
#define helper_precr_sra_r_qh_pw helper_precr_sra_r_qh_pw_mips64el
|
|
#define helper_precrq_ob_qh helper_precrq_ob_qh_mips64el
|
|
#define helper_precrq_qh_pw helper_precrq_qh_pw_mips64el
|
|
#define helper_precrq_rs_qh_pw helper_precrq_rs_qh_pw_mips64el
|
|
#define helper_precrq_pw_l helper_precrq_pw_l_mips64el
|
|
#define helper_precrqu_s_qb_ph helper_precrqu_s_qb_ph_mips64el
|
|
#define helper_precrqu_s_ob_qh helper_precrqu_s_ob_qh_mips64el
|
|
#define helper_preceq_pw_qhl helper_preceq_pw_qhl_mips64el
|
|
#define helper_preceq_pw_qhr helper_preceq_pw_qhr_mips64el
|
|
#define helper_preceq_pw_qhla helper_preceq_pw_qhla_mips64el
|
|
#define helper_preceq_pw_qhra helper_preceq_pw_qhra_mips64el
|
|
#define helper_precequ_ph_qbl helper_precequ_ph_qbl_mips64el
|
|
#define helper_precequ_ph_qbr helper_precequ_ph_qbr_mips64el
|
|
#define helper_precequ_ph_qbla helper_precequ_ph_qbla_mips64el
|
|
#define helper_precequ_ph_qbra helper_precequ_ph_qbra_mips64el
|
|
#define helper_precequ_qh_obl helper_precequ_qh_obl_mips64el
|
|
#define helper_precequ_qh_obr helper_precequ_qh_obr_mips64el
|
|
#define helper_precequ_qh_obla helper_precequ_qh_obla_mips64el
|
|
#define helper_precequ_qh_obra helper_precequ_qh_obra_mips64el
|
|
#define helper_preceu_ph_qbl helper_preceu_ph_qbl_mips64el
|
|
#define helper_preceu_ph_qbr helper_preceu_ph_qbr_mips64el
|
|
#define helper_preceu_ph_qbla helper_preceu_ph_qbla_mips64el
|
|
#define helper_preceu_ph_qbra helper_preceu_ph_qbra_mips64el
|
|
#define helper_preceu_qh_obl helper_preceu_qh_obl_mips64el
|
|
#define helper_preceu_qh_obr helper_preceu_qh_obr_mips64el
|
|
#define helper_preceu_qh_obla helper_preceu_qh_obla_mips64el
|
|
#define helper_preceu_qh_obra helper_preceu_qh_obra_mips64el
|
|
#define helper_shll_qb helper_shll_qb_mips64el
|
|
#define helper_shrl_qb helper_shrl_qb_mips64el
|
|
#define helper_shra_qb helper_shra_qb_mips64el
|
|
#define helper_shra_r_qb helper_shra_r_qb_mips64el
|
|
#define helper_shll_ob helper_shll_ob_mips64el
|
|
#define helper_shrl_ob helper_shrl_ob_mips64el
|
|
#define helper_shra_ob helper_shra_ob_mips64el
|
|
#define helper_shra_r_ob helper_shra_r_ob_mips64el
|
|
#define helper_shll_ph helper_shll_ph_mips64el
|
|
#define helper_shll_s_ph helper_shll_s_ph_mips64el
|
|
#define helper_shll_qh helper_shll_qh_mips64el
|
|
#define helper_shll_s_qh helper_shll_s_qh_mips64el
|
|
#define helper_shrl_qh helper_shrl_qh_mips64el
|
|
#define helper_shra_qh helper_shra_qh_mips64el
|
|
#define helper_shra_r_qh helper_shra_r_qh_mips64el
|
|
#define helper_shll_s_w helper_shll_s_w_mips64el
|
|
#define helper_shra_r_w helper_shra_r_w_mips64el
|
|
#define helper_shll_pw helper_shll_pw_mips64el
|
|
#define helper_shll_s_pw helper_shll_s_pw_mips64el
|
|
#define helper_shra_pw helper_shra_pw_mips64el
|
|
#define helper_shra_r_pw helper_shra_r_pw_mips64el
|
|
#define helper_shrl_ph helper_shrl_ph_mips64el
|
|
#define helper_shra_ph helper_shra_ph_mips64el
|
|
#define helper_shra_r_ph helper_shra_r_ph_mips64el
|
|
#define helper_muleu_s_ph_qbl helper_muleu_s_ph_qbl_mips64el
|
|
#define helper_muleu_s_ph_qbr helper_muleu_s_ph_qbr_mips64el
|
|
#define helper_mulq_rs_ph helper_mulq_rs_ph_mips64el
|
|
#define helper_mul_ph helper_mul_ph_mips64el
|
|
#define helper_mul_s_ph helper_mul_s_ph_mips64el
|
|
#define helper_mulq_s_ph helper_mulq_s_ph_mips64el
|
|
#define helper_muleq_s_w_phl helper_muleq_s_w_phl_mips64el
|
|
#define helper_muleq_s_w_phr helper_muleq_s_w_phr_mips64el
|
|
#define helper_mulsaq_s_w_ph helper_mulsaq_s_w_ph_mips64el
|
|
#define helper_mulsa_w_ph helper_mulsa_w_ph_mips64el
|
|
#define helper_muleu_s_qh_obl helper_muleu_s_qh_obl_mips64el
|
|
#define helper_muleu_s_qh_obr helper_muleu_s_qh_obr_mips64el
|
|
#define helper_mulq_rs_qh helper_mulq_rs_qh_mips64el
|
|
#define helper_muleq_s_pw_qhl helper_muleq_s_pw_qhl_mips64el
|
|
#define helper_muleq_s_pw_qhr helper_muleq_s_pw_qhr_mips64el
|
|
#define helper_mulsaq_s_w_qh helper_mulsaq_s_w_qh_mips64el
|
|
#define helper_dpau_h_qbl helper_dpau_h_qbl_mips64el
|
|
#define helper_dpau_h_qbr helper_dpau_h_qbr_mips64el
|
|
#define helper_dpsu_h_qbl helper_dpsu_h_qbl_mips64el
|
|
#define helper_dpsu_h_qbr helper_dpsu_h_qbr_mips64el
|
|
#define helper_dpau_h_obl helper_dpau_h_obl_mips64el
|
|
#define helper_dpau_h_obr helper_dpau_h_obr_mips64el
|
|
#define helper_dpsu_h_obl helper_dpsu_h_obl_mips64el
|
|
#define helper_dpsu_h_obr helper_dpsu_h_obr_mips64el
|
|
#define helper_dpa_w_ph helper_dpa_w_ph_mips64el
|
|
#define helper_dpax_w_ph helper_dpax_w_ph_mips64el
|
|
#define helper_dps_w_ph helper_dps_w_ph_mips64el
|
|
#define helper_dpsx_w_ph helper_dpsx_w_ph_mips64el
|
|
#define helper_dpaq_s_w_ph helper_dpaq_s_w_ph_mips64el
|
|
#define helper_dpaqx_s_w_ph helper_dpaqx_s_w_ph_mips64el
|
|
#define helper_dpsq_s_w_ph helper_dpsq_s_w_ph_mips64el
|
|
#define helper_dpsqx_s_w_ph helper_dpsqx_s_w_ph_mips64el
|
|
#define helper_dpaqx_sa_w_ph helper_dpaqx_sa_w_ph_mips64el
|
|
#define helper_dpsqx_sa_w_ph helper_dpsqx_sa_w_ph_mips64el
|
|
#define helper_dpa_w_qh helper_dpa_w_qh_mips64el
|
|
#define helper_dpaq_s_w_qh helper_dpaq_s_w_qh_mips64el
|
|
#define helper_dps_w_qh helper_dps_w_qh_mips64el
|
|
#define helper_dpsq_s_w_qh helper_dpsq_s_w_qh_mips64el
|
|
#define helper_dpaq_sa_l_w helper_dpaq_sa_l_w_mips64el
|
|
#define helper_dpsq_sa_l_w helper_dpsq_sa_l_w_mips64el
|
|
#define helper_dpaq_sa_l_pw helper_dpaq_sa_l_pw_mips64el
|
|
#define helper_dpsq_sa_l_pw helper_dpsq_sa_l_pw_mips64el
|
|
#define helper_mulsaq_s_l_pw helper_mulsaq_s_l_pw_mips64el
|
|
#define helper_maq_s_w_phl helper_maq_s_w_phl_mips64el
|
|
#define helper_maq_s_w_phr helper_maq_s_w_phr_mips64el
|
|
#define helper_maq_sa_w_phl helper_maq_sa_w_phl_mips64el
|
|
#define helper_maq_sa_w_phr helper_maq_sa_w_phr_mips64el
|
|
#define helper_mulq_s_w helper_mulq_s_w_mips64el
|
|
#define helper_mulq_rs_w helper_mulq_rs_w_mips64el
|
|
#define helper_maq_s_w_qhll helper_maq_s_w_qhll_mips64el
|
|
#define helper_maq_s_w_qhlr helper_maq_s_w_qhlr_mips64el
|
|
#define helper_maq_s_w_qhrl helper_maq_s_w_qhrl_mips64el
|
|
#define helper_maq_s_w_qhrr helper_maq_s_w_qhrr_mips64el
|
|
#define helper_maq_sa_w_qhll helper_maq_sa_w_qhll_mips64el
|
|
#define helper_maq_sa_w_qhlr helper_maq_sa_w_qhlr_mips64el
|
|
#define helper_maq_sa_w_qhrl helper_maq_sa_w_qhrl_mips64el
|
|
#define helper_maq_sa_w_qhrr helper_maq_sa_w_qhrr_mips64el
|
|
#define helper_maq_s_l_pwl helper_maq_s_l_pwl_mips64el
|
|
#define helper_maq_s_l_pwr helper_maq_s_l_pwr_mips64el
|
|
#define helper_dmadd helper_dmadd_mips64el
|
|
#define helper_dmaddu helper_dmaddu_mips64el
|
|
#define helper_dmsub helper_dmsub_mips64el
|
|
#define helper_dmsubu helper_dmsubu_mips64el
|
|
#define helper_bitrev helper_bitrev_mips64el
|
|
#define helper_insv helper_insv_mips64el
|
|
#define helper_dinsv helper_dinsv_mips64el
|
|
#define helper_cmpgu_eq_qb helper_cmpgu_eq_qb_mips64el
|
|
#define helper_cmpgu_lt_qb helper_cmpgu_lt_qb_mips64el
|
|
#define helper_cmpgu_le_qb helper_cmpgu_le_qb_mips64el
|
|
#define helper_cmpgu_eq_ob helper_cmpgu_eq_ob_mips64el
|
|
#define helper_cmpgu_lt_ob helper_cmpgu_lt_ob_mips64el
|
|
#define helper_cmpgu_le_ob helper_cmpgu_le_ob_mips64el
|
|
#define helper_cmpu_eq_qb helper_cmpu_eq_qb_mips64el
|
|
#define helper_cmpu_lt_qb helper_cmpu_lt_qb_mips64el
|
|
#define helper_cmpu_le_qb helper_cmpu_le_qb_mips64el
|
|
#define helper_cmp_eq_ph helper_cmp_eq_ph_mips64el
|
|
#define helper_cmp_lt_ph helper_cmp_lt_ph_mips64el
|
|
#define helper_cmp_le_ph helper_cmp_le_ph_mips64el
|
|
#define helper_cmpu_eq_ob helper_cmpu_eq_ob_mips64el
|
|
#define helper_cmpu_lt_ob helper_cmpu_lt_ob_mips64el
|
|
#define helper_cmpu_le_ob helper_cmpu_le_ob_mips64el
|
|
#define helper_cmp_eq_qh helper_cmp_eq_qh_mips64el
|
|
#define helper_cmp_lt_qh helper_cmp_lt_qh_mips64el
|
|
#define helper_cmp_le_qh helper_cmp_le_qh_mips64el
|
|
#define helper_cmp_eq_pw helper_cmp_eq_pw_mips64el
|
|
#define helper_cmp_lt_pw helper_cmp_lt_pw_mips64el
|
|
#define helper_cmp_le_pw helper_cmp_le_pw_mips64el
|
|
#define helper_cmpgdu_eq_ob helper_cmpgdu_eq_ob_mips64el
|
|
#define helper_cmpgdu_lt_ob helper_cmpgdu_lt_ob_mips64el
|
|
#define helper_cmpgdu_le_ob helper_cmpgdu_le_ob_mips64el
|
|
#define helper_pick_qb helper_pick_qb_mips64el
|
|
#define helper_pick_ph helper_pick_ph_mips64el
|
|
#define helper_pick_ob helper_pick_ob_mips64el
|
|
#define helper_pick_qh helper_pick_qh_mips64el
|
|
#define helper_pick_pw helper_pick_pw_mips64el
|
|
#define helper_packrl_ph helper_packrl_ph_mips64el
|
|
#define helper_packrl_pw helper_packrl_pw_mips64el
|
|
#define helper_extr_w helper_extr_w_mips64el
|
|
#define helper_extr_r_w helper_extr_r_w_mips64el
|
|
#define helper_extr_rs_w helper_extr_rs_w_mips64el
|
|
#define helper_dextr_w helper_dextr_w_mips64el
|
|
#define helper_dextr_r_w helper_dextr_r_w_mips64el
|
|
#define helper_dextr_rs_w helper_dextr_rs_w_mips64el
|
|
#define helper_dextr_l helper_dextr_l_mips64el
|
|
#define helper_dextr_r_l helper_dextr_r_l_mips64el
|
|
#define helper_dextr_rs_l helper_dextr_rs_l_mips64el
|
|
#define helper_extr_s_h helper_extr_s_h_mips64el
|
|
#define helper_dextr_s_h helper_dextr_s_h_mips64el
|
|
#define helper_extp helper_extp_mips64el
|
|
#define helper_extpdp helper_extpdp_mips64el
|
|
#define helper_dextp helper_dextp_mips64el
|
|
#define helper_dextpdp helper_dextpdp_mips64el
|
|
#define helper_shilo helper_shilo_mips64el
|
|
#define helper_dshilo helper_dshilo_mips64el
|
|
#define helper_mthlip helper_mthlip_mips64el
|
|
#define helper_dmthlip helper_dmthlip_mips64el
|
|
#define cpu_wrdsp cpu_wrdsp_mips64el
|
|
#define helper_wrdsp helper_wrdsp_mips64el
|
|
#define cpu_rddsp cpu_rddsp_mips64el
|
|
#define helper_rddsp helper_rddsp_mips64el
|
|
#define helper_cfc1 helper_cfc1_mips64el
|
|
#define helper_ctc1 helper_ctc1_mips64el
|
|
#define ieee_ex_to_mips ieee_ex_to_mips_mips64el
|
|
#define helper_float_sqrt_d helper_float_sqrt_d_mips64el
|
|
#define helper_float_sqrt_s helper_float_sqrt_s_mips64el
|
|
#define helper_float_cvtd_s helper_float_cvtd_s_mips64el
|
|
#define helper_float_cvtd_w helper_float_cvtd_w_mips64el
|
|
#define helper_float_cvtd_l helper_float_cvtd_l_mips64el
|
|
#define helper_float_cvt_l_d helper_float_cvt_l_d_mips64el
|
|
#define helper_float_cvt_l_s helper_float_cvt_l_s_mips64el
|
|
#define helper_float_cvtps_pw helper_float_cvtps_pw_mips64el
|
|
#define helper_float_cvtpw_ps helper_float_cvtpw_ps_mips64el
|
|
#define helper_float_cvts_d helper_float_cvts_d_mips64el
|
|
#define helper_float_cvts_w helper_float_cvts_w_mips64el
|
|
#define helper_float_cvts_l helper_float_cvts_l_mips64el
|
|
#define helper_float_cvts_pl helper_float_cvts_pl_mips64el
|
|
#define helper_float_cvts_pu helper_float_cvts_pu_mips64el
|
|
#define helper_float_cvt_w_s helper_float_cvt_w_s_mips64el
|
|
#define helper_float_cvt_w_d helper_float_cvt_w_d_mips64el
|
|
#define helper_float_round_l_d helper_float_round_l_d_mips64el
|
|
#define helper_float_round_l_s helper_float_round_l_s_mips64el
|
|
#define helper_float_round_w_d helper_float_round_w_d_mips64el
|
|
#define helper_float_round_w_s helper_float_round_w_s_mips64el
|
|
#define helper_float_trunc_l_d helper_float_trunc_l_d_mips64el
|
|
#define helper_float_trunc_l_s helper_float_trunc_l_s_mips64el
|
|
#define helper_float_trunc_w_d helper_float_trunc_w_d_mips64el
|
|
#define helper_float_trunc_w_s helper_float_trunc_w_s_mips64el
|
|
#define helper_float_ceil_l_d helper_float_ceil_l_d_mips64el
|
|
#define helper_float_ceil_l_s helper_float_ceil_l_s_mips64el
|
|
#define helper_float_ceil_w_d helper_float_ceil_w_d_mips64el
|
|
#define helper_float_ceil_w_s helper_float_ceil_w_s_mips64el
|
|
#define helper_float_floor_l_d helper_float_floor_l_d_mips64el
|
|
#define helper_float_floor_l_s helper_float_floor_l_s_mips64el
|
|
#define helper_float_floor_w_d helper_float_floor_w_d_mips64el
|
|
#define helper_float_floor_w_s helper_float_floor_w_s_mips64el
|
|
#define helper_float_cvt_2008_l_d helper_float_cvt_2008_l_d_mips64el
|
|
#define helper_float_cvt_2008_l_s helper_float_cvt_2008_l_s_mips64el
|
|
#define helper_float_cvt_2008_w_d helper_float_cvt_2008_w_d_mips64el
|
|
#define helper_float_cvt_2008_w_s helper_float_cvt_2008_w_s_mips64el
|
|
#define helper_float_round_2008_l_d helper_float_round_2008_l_d_mips64el
|
|
#define helper_float_round_2008_l_s helper_float_round_2008_l_s_mips64el
|
|
#define helper_float_round_2008_w_d helper_float_round_2008_w_d_mips64el
|
|
#define helper_float_round_2008_w_s helper_float_round_2008_w_s_mips64el
|
|
#define helper_float_trunc_2008_l_d helper_float_trunc_2008_l_d_mips64el
|
|
#define helper_float_trunc_2008_l_s helper_float_trunc_2008_l_s_mips64el
|
|
#define helper_float_trunc_2008_w_d helper_float_trunc_2008_w_d_mips64el
|
|
#define helper_float_trunc_2008_w_s helper_float_trunc_2008_w_s_mips64el
|
|
#define helper_float_ceil_2008_l_d helper_float_ceil_2008_l_d_mips64el
|
|
#define helper_float_ceil_2008_l_s helper_float_ceil_2008_l_s_mips64el
|
|
#define helper_float_ceil_2008_w_d helper_float_ceil_2008_w_d_mips64el
|
|
#define helper_float_ceil_2008_w_s helper_float_ceil_2008_w_s_mips64el
|
|
#define helper_float_floor_2008_l_d helper_float_floor_2008_l_d_mips64el
|
|
#define helper_float_floor_2008_l_s helper_float_floor_2008_l_s_mips64el
|
|
#define helper_float_floor_2008_w_d helper_float_floor_2008_w_d_mips64el
|
|
#define helper_float_floor_2008_w_s helper_float_floor_2008_w_s_mips64el
|
|
#define helper_float_abs_d helper_float_abs_d_mips64el
|
|
#define helper_float_abs_s helper_float_abs_s_mips64el
|
|
#define helper_float_abs_ps helper_float_abs_ps_mips64el
|
|
#define helper_float_chs_d helper_float_chs_d_mips64el
|
|
#define helper_float_chs_s helper_float_chs_s_mips64el
|
|
#define helper_float_chs_ps helper_float_chs_ps_mips64el
|
|
#define helper_float_recip_d helper_float_recip_d_mips64el
|
|
#define helper_float_recip_s helper_float_recip_s_mips64el
|
|
#define helper_float_rsqrt_d helper_float_rsqrt_d_mips64el
|
|
#define helper_float_rsqrt_s helper_float_rsqrt_s_mips64el
|
|
#define helper_float_recip1_d helper_float_recip1_d_mips64el
|
|
#define helper_float_recip1_s helper_float_recip1_s_mips64el
|
|
#define helper_float_recip1_ps helper_float_recip1_ps_mips64el
|
|
#define helper_float_rsqrt1_d helper_float_rsqrt1_d_mips64el
|
|
#define helper_float_rsqrt1_s helper_float_rsqrt1_s_mips64el
|
|
#define helper_float_rsqrt1_ps helper_float_rsqrt1_ps_mips64el
|
|
#define helper_float_rint_s helper_float_rint_s_mips64el
|
|
#define helper_float_rint_d helper_float_rint_d_mips64el
|
|
#define float_class_s float_class_s_mips64el
|
|
#define helper_float_class_s helper_float_class_s_mips64el
|
|
#define float_class_d float_class_d_mips64el
|
|
#define helper_float_class_d helper_float_class_d_mips64el
|
|
#define helper_float_add_d helper_float_add_d_mips64el
|
|
#define helper_float_add_s helper_float_add_s_mips64el
|
|
#define helper_float_add_ps helper_float_add_ps_mips64el
|
|
#define helper_float_sub_d helper_float_sub_d_mips64el
|
|
#define helper_float_sub_s helper_float_sub_s_mips64el
|
|
#define helper_float_sub_ps helper_float_sub_ps_mips64el
|
|
#define helper_float_mul_d helper_float_mul_d_mips64el
|
|
#define helper_float_mul_s helper_float_mul_s_mips64el
|
|
#define helper_float_mul_ps helper_float_mul_ps_mips64el
|
|
#define helper_float_div_d helper_float_div_d_mips64el
|
|
#define helper_float_div_s helper_float_div_s_mips64el
|
|
#define helper_float_div_ps helper_float_div_ps_mips64el
|
|
#define helper_float_recip2_d helper_float_recip2_d_mips64el
|
|
#define helper_float_recip2_s helper_float_recip2_s_mips64el
|
|
#define helper_float_recip2_ps helper_float_recip2_ps_mips64el
|
|
#define helper_float_rsqrt2_d helper_float_rsqrt2_d_mips64el
|
|
#define helper_float_rsqrt2_s helper_float_rsqrt2_s_mips64el
|
|
#define helper_float_rsqrt2_ps helper_float_rsqrt2_ps_mips64el
|
|
#define helper_float_addr_ps helper_float_addr_ps_mips64el
|
|
#define helper_float_mulr_ps helper_float_mulr_ps_mips64el
|
|
#define helper_float_max_s helper_float_max_s_mips64el
|
|
#define helper_float_max_d helper_float_max_d_mips64el
|
|
#define helper_float_maxa_s helper_float_maxa_s_mips64el
|
|
#define helper_float_maxa_d helper_float_maxa_d_mips64el
|
|
#define helper_float_min_s helper_float_min_s_mips64el
|
|
#define helper_float_min_d helper_float_min_d_mips64el
|
|
#define helper_float_mina_s helper_float_mina_s_mips64el
|
|
#define helper_float_mina_d helper_float_mina_d_mips64el
|
|
#define helper_float_madd_d helper_float_madd_d_mips64el
|
|
#define helper_float_madd_s helper_float_madd_s_mips64el
|
|
#define helper_float_madd_ps helper_float_madd_ps_mips64el
|
|
#define helper_float_msub_d helper_float_msub_d_mips64el
|
|
#define helper_float_msub_s helper_float_msub_s_mips64el
|
|
#define helper_float_msub_ps helper_float_msub_ps_mips64el
|
|
#define helper_float_nmadd_d helper_float_nmadd_d_mips64el
|
|
#define helper_float_nmadd_s helper_float_nmadd_s_mips64el
|
|
#define helper_float_nmadd_ps helper_float_nmadd_ps_mips64el
|
|
#define helper_float_nmsub_d helper_float_nmsub_d_mips64el
|
|
#define helper_float_nmsub_s helper_float_nmsub_s_mips64el
|
|
#define helper_float_nmsub_ps helper_float_nmsub_ps_mips64el
|
|
#define helper_float_maddf_s helper_float_maddf_s_mips64el
|
|
#define helper_float_maddf_d helper_float_maddf_d_mips64el
|
|
#define helper_float_msubf_s helper_float_msubf_s_mips64el
|
|
#define helper_float_msubf_d helper_float_msubf_d_mips64el
|
|
#define helper_cmp_d_f helper_cmp_d_f_mips64el
|
|
#define helper_cmpabs_d_f helper_cmpabs_d_f_mips64el
|
|
#define helper_cmp_d_un helper_cmp_d_un_mips64el
|
|
#define helper_cmpabs_d_un helper_cmpabs_d_un_mips64el
|
|
#define helper_cmp_d_eq helper_cmp_d_eq_mips64el
|
|
#define helper_cmpabs_d_eq helper_cmpabs_d_eq_mips64el
|
|
#define helper_cmp_d_ueq helper_cmp_d_ueq_mips64el
|
|
#define helper_cmpabs_d_ueq helper_cmpabs_d_ueq_mips64el
|
|
#define helper_cmp_d_olt helper_cmp_d_olt_mips64el
|
|
#define helper_cmpabs_d_olt helper_cmpabs_d_olt_mips64el
|
|
#define helper_cmp_d_ult helper_cmp_d_ult_mips64el
|
|
#define helper_cmpabs_d_ult helper_cmpabs_d_ult_mips64el
|
|
#define helper_cmp_d_ole helper_cmp_d_ole_mips64el
|
|
#define helper_cmpabs_d_ole helper_cmpabs_d_ole_mips64el
|
|
#define helper_cmp_d_ule helper_cmp_d_ule_mips64el
|
|
#define helper_cmpabs_d_ule helper_cmpabs_d_ule_mips64el
|
|
#define helper_cmp_d_sf helper_cmp_d_sf_mips64el
|
|
#define helper_cmpabs_d_sf helper_cmpabs_d_sf_mips64el
|
|
#define helper_cmp_d_ngle helper_cmp_d_ngle_mips64el
|
|
#define helper_cmpabs_d_ngle helper_cmpabs_d_ngle_mips64el
|
|
#define helper_cmp_d_seq helper_cmp_d_seq_mips64el
|
|
#define helper_cmpabs_d_seq helper_cmpabs_d_seq_mips64el
|
|
#define helper_cmp_d_ngl helper_cmp_d_ngl_mips64el
|
|
#define helper_cmpabs_d_ngl helper_cmpabs_d_ngl_mips64el
|
|
#define helper_cmp_d_lt helper_cmp_d_lt_mips64el
|
|
#define helper_cmpabs_d_lt helper_cmpabs_d_lt_mips64el
|
|
#define helper_cmp_d_nge helper_cmp_d_nge_mips64el
|
|
#define helper_cmpabs_d_nge helper_cmpabs_d_nge_mips64el
|
|
#define helper_cmp_d_le helper_cmp_d_le_mips64el
|
|
#define helper_cmpabs_d_le helper_cmpabs_d_le_mips64el
|
|
#define helper_cmp_d_ngt helper_cmp_d_ngt_mips64el
|
|
#define helper_cmpabs_d_ngt helper_cmpabs_d_ngt_mips64el
|
|
#define helper_cmp_s_f helper_cmp_s_f_mips64el
|
|
#define helper_cmpabs_s_f helper_cmpabs_s_f_mips64el
|
|
#define helper_cmp_s_un helper_cmp_s_un_mips64el
|
|
#define helper_cmpabs_s_un helper_cmpabs_s_un_mips64el
|
|
#define helper_cmp_s_eq helper_cmp_s_eq_mips64el
|
|
#define helper_cmpabs_s_eq helper_cmpabs_s_eq_mips64el
|
|
#define helper_cmp_s_ueq helper_cmp_s_ueq_mips64el
|
|
#define helper_cmpabs_s_ueq helper_cmpabs_s_ueq_mips64el
|
|
#define helper_cmp_s_olt helper_cmp_s_olt_mips64el
|
|
#define helper_cmpabs_s_olt helper_cmpabs_s_olt_mips64el
|
|
#define helper_cmp_s_ult helper_cmp_s_ult_mips64el
|
|
#define helper_cmpabs_s_ult helper_cmpabs_s_ult_mips64el
|
|
#define helper_cmp_s_ole helper_cmp_s_ole_mips64el
|
|
#define helper_cmpabs_s_ole helper_cmpabs_s_ole_mips64el
|
|
#define helper_cmp_s_ule helper_cmp_s_ule_mips64el
|
|
#define helper_cmpabs_s_ule helper_cmpabs_s_ule_mips64el
|
|
#define helper_cmp_s_sf helper_cmp_s_sf_mips64el
|
|
#define helper_cmpabs_s_sf helper_cmpabs_s_sf_mips64el
|
|
#define helper_cmp_s_ngle helper_cmp_s_ngle_mips64el
|
|
#define helper_cmpabs_s_ngle helper_cmpabs_s_ngle_mips64el
|
|
#define helper_cmp_s_seq helper_cmp_s_seq_mips64el
|
|
#define helper_cmpabs_s_seq helper_cmpabs_s_seq_mips64el
|
|
#define helper_cmp_s_ngl helper_cmp_s_ngl_mips64el
|
|
#define helper_cmpabs_s_ngl helper_cmpabs_s_ngl_mips64el
|
|
#define helper_cmp_s_lt helper_cmp_s_lt_mips64el
|
|
#define helper_cmpabs_s_lt helper_cmpabs_s_lt_mips64el
|
|
#define helper_cmp_s_nge helper_cmp_s_nge_mips64el
|
|
#define helper_cmpabs_s_nge helper_cmpabs_s_nge_mips64el
|
|
#define helper_cmp_s_le helper_cmp_s_le_mips64el
|
|
#define helper_cmpabs_s_le helper_cmpabs_s_le_mips64el
|
|
#define helper_cmp_s_ngt helper_cmp_s_ngt_mips64el
|
|
#define helper_cmpabs_s_ngt helper_cmpabs_s_ngt_mips64el
|
|
#define helper_cmp_ps_f helper_cmp_ps_f_mips64el
|
|
#define helper_cmpabs_ps_f helper_cmpabs_ps_f_mips64el
|
|
#define helper_cmp_ps_un helper_cmp_ps_un_mips64el
|
|
#define helper_cmpabs_ps_un helper_cmpabs_ps_un_mips64el
|
|
#define helper_cmp_ps_eq helper_cmp_ps_eq_mips64el
|
|
#define helper_cmpabs_ps_eq helper_cmpabs_ps_eq_mips64el
|
|
#define helper_cmp_ps_ueq helper_cmp_ps_ueq_mips64el
|
|
#define helper_cmpabs_ps_ueq helper_cmpabs_ps_ueq_mips64el
|
|
#define helper_cmp_ps_olt helper_cmp_ps_olt_mips64el
|
|
#define helper_cmpabs_ps_olt helper_cmpabs_ps_olt_mips64el
|
|
#define helper_cmp_ps_ult helper_cmp_ps_ult_mips64el
|
|
#define helper_cmpabs_ps_ult helper_cmpabs_ps_ult_mips64el
|
|
#define helper_cmp_ps_ole helper_cmp_ps_ole_mips64el
|
|
#define helper_cmpabs_ps_ole helper_cmpabs_ps_ole_mips64el
|
|
#define helper_cmp_ps_ule helper_cmp_ps_ule_mips64el
|
|
#define helper_cmpabs_ps_ule helper_cmpabs_ps_ule_mips64el
|
|
#define helper_cmp_ps_sf helper_cmp_ps_sf_mips64el
|
|
#define helper_cmpabs_ps_sf helper_cmpabs_ps_sf_mips64el
|
|
#define helper_cmp_ps_ngle helper_cmp_ps_ngle_mips64el
|
|
#define helper_cmpabs_ps_ngle helper_cmpabs_ps_ngle_mips64el
|
|
#define helper_cmp_ps_seq helper_cmp_ps_seq_mips64el
|
|
#define helper_cmpabs_ps_seq helper_cmpabs_ps_seq_mips64el
|
|
#define helper_cmp_ps_ngl helper_cmp_ps_ngl_mips64el
|
|
#define helper_cmpabs_ps_ngl helper_cmpabs_ps_ngl_mips64el
|
|
#define helper_cmp_ps_lt helper_cmp_ps_lt_mips64el
|
|
#define helper_cmpabs_ps_lt helper_cmpabs_ps_lt_mips64el
|
|
#define helper_cmp_ps_nge helper_cmp_ps_nge_mips64el
|
|
#define helper_cmpabs_ps_nge helper_cmpabs_ps_nge_mips64el
|
|
#define helper_cmp_ps_le helper_cmp_ps_le_mips64el
|
|
#define helper_cmpabs_ps_le helper_cmpabs_ps_le_mips64el
|
|
#define helper_cmp_ps_ngt helper_cmp_ps_ngt_mips64el
|
|
#define helper_cmpabs_ps_ngt helper_cmpabs_ps_ngt_mips64el
|
|
#define helper_r6_cmp_d_af helper_r6_cmp_d_af_mips64el
|
|
#define helper_r6_cmp_d_un helper_r6_cmp_d_un_mips64el
|
|
#define helper_r6_cmp_d_eq helper_r6_cmp_d_eq_mips64el
|
|
#define helper_r6_cmp_d_ueq helper_r6_cmp_d_ueq_mips64el
|
|
#define helper_r6_cmp_d_lt helper_r6_cmp_d_lt_mips64el
|
|
#define helper_r6_cmp_d_ult helper_r6_cmp_d_ult_mips64el
|
|
#define helper_r6_cmp_d_le helper_r6_cmp_d_le_mips64el
|
|
#define helper_r6_cmp_d_ule helper_r6_cmp_d_ule_mips64el
|
|
#define helper_r6_cmp_d_saf helper_r6_cmp_d_saf_mips64el
|
|
#define helper_r6_cmp_d_sun helper_r6_cmp_d_sun_mips64el
|
|
#define helper_r6_cmp_d_seq helper_r6_cmp_d_seq_mips64el
|
|
#define helper_r6_cmp_d_sueq helper_r6_cmp_d_sueq_mips64el
|
|
#define helper_r6_cmp_d_slt helper_r6_cmp_d_slt_mips64el
|
|
#define helper_r6_cmp_d_sult helper_r6_cmp_d_sult_mips64el
|
|
#define helper_r6_cmp_d_sle helper_r6_cmp_d_sle_mips64el
|
|
#define helper_r6_cmp_d_sule helper_r6_cmp_d_sule_mips64el
|
|
#define helper_r6_cmp_d_or helper_r6_cmp_d_or_mips64el
|
|
#define helper_r6_cmp_d_une helper_r6_cmp_d_une_mips64el
|
|
#define helper_r6_cmp_d_ne helper_r6_cmp_d_ne_mips64el
|
|
#define helper_r6_cmp_d_sor helper_r6_cmp_d_sor_mips64el
|
|
#define helper_r6_cmp_d_sune helper_r6_cmp_d_sune_mips64el
|
|
#define helper_r6_cmp_d_sne helper_r6_cmp_d_sne_mips64el
|
|
#define helper_r6_cmp_s_af helper_r6_cmp_s_af_mips64el
|
|
#define helper_r6_cmp_s_un helper_r6_cmp_s_un_mips64el
|
|
#define helper_r6_cmp_s_eq helper_r6_cmp_s_eq_mips64el
|
|
#define helper_r6_cmp_s_ueq helper_r6_cmp_s_ueq_mips64el
|
|
#define helper_r6_cmp_s_lt helper_r6_cmp_s_lt_mips64el
|
|
#define helper_r6_cmp_s_ult helper_r6_cmp_s_ult_mips64el
|
|
#define helper_r6_cmp_s_le helper_r6_cmp_s_le_mips64el
|
|
#define helper_r6_cmp_s_ule helper_r6_cmp_s_ule_mips64el
|
|
#define helper_r6_cmp_s_saf helper_r6_cmp_s_saf_mips64el
|
|
#define helper_r6_cmp_s_sun helper_r6_cmp_s_sun_mips64el
|
|
#define helper_r6_cmp_s_seq helper_r6_cmp_s_seq_mips64el
|
|
#define helper_r6_cmp_s_sueq helper_r6_cmp_s_sueq_mips64el
|
|
#define helper_r6_cmp_s_slt helper_r6_cmp_s_slt_mips64el
|
|
#define helper_r6_cmp_s_sult helper_r6_cmp_s_sult_mips64el
|
|
#define helper_r6_cmp_s_sle helper_r6_cmp_s_sle_mips64el
|
|
#define helper_r6_cmp_s_sule helper_r6_cmp_s_sule_mips64el
|
|
#define helper_r6_cmp_s_or helper_r6_cmp_s_or_mips64el
|
|
#define helper_r6_cmp_s_une helper_r6_cmp_s_une_mips64el
|
|
#define helper_r6_cmp_s_ne helper_r6_cmp_s_ne_mips64el
|
|
#define helper_r6_cmp_s_sor helper_r6_cmp_s_sor_mips64el
|
|
#define helper_r6_cmp_s_sune helper_r6_cmp_s_sune_mips64el
|
|
#define helper_r6_cmp_s_sne helper_r6_cmp_s_sne_mips64el
|
|
#define no_mmu_map_address no_mmu_map_address_mips64el
|
|
#define fixed_mmu_map_address fixed_mmu_map_address_mips64el
|
|
#define r4k_map_address r4k_map_address_mips64el
|
|
#define cpu_mips_tlb_flush cpu_mips_tlb_flush_mips64el
|
|
#define sync_c0_status sync_c0_status_mips64el
|
|
#define cpu_mips_store_status cpu_mips_store_status_mips64el
|
|
#define cpu_mips_store_cause cpu_mips_store_cause_mips64el
|
|
#define mips_cpu_get_phys_page_debug mips_cpu_get_phys_page_debug_mips64el
|
|
#define mips_cpu_tlb_fill mips_cpu_tlb_fill_mips64el
|
|
#define cpu_mips_translate_address cpu_mips_translate_address_mips64el
|
|
#define exception_resume_pc exception_resume_pc_mips64el
|
|
#define mips_cpu_do_interrupt mips_cpu_do_interrupt_mips64el
|
|
#define mips_cpu_exec_interrupt mips_cpu_exec_interrupt_mips64el
|
|
#define r4k_invalidate_tlb r4k_invalidate_tlb_mips64el
|
|
#define do_raise_exception_err do_raise_exception_err_mips64el
|
|
#define helper_paddsb helper_paddsb_mips64el
|
|
#define helper_paddusb helper_paddusb_mips64el
|
|
#define helper_paddsh helper_paddsh_mips64el
|
|
#define helper_paddush helper_paddush_mips64el
|
|
#define helper_paddb helper_paddb_mips64el
|
|
#define helper_paddh helper_paddh_mips64el
|
|
#define helper_paddw helper_paddw_mips64el
|
|
#define helper_psubsb helper_psubsb_mips64el
|
|
#define helper_psubusb helper_psubusb_mips64el
|
|
#define helper_psubsh helper_psubsh_mips64el
|
|
#define helper_psubush helper_psubush_mips64el
|
|
#define helper_psubb helper_psubb_mips64el
|
|
#define helper_psubh helper_psubh_mips64el
|
|
#define helper_psubw helper_psubw_mips64el
|
|
#define helper_pshufh helper_pshufh_mips64el
|
|
#define helper_packsswh helper_packsswh_mips64el
|
|
#define helper_packsshb helper_packsshb_mips64el
|
|
#define helper_packushb helper_packushb_mips64el
|
|
#define helper_punpcklwd helper_punpcklwd_mips64el
|
|
#define helper_punpckhwd helper_punpckhwd_mips64el
|
|
#define helper_punpcklhw helper_punpcklhw_mips64el
|
|
#define helper_punpckhhw helper_punpckhhw_mips64el
|
|
#define helper_punpcklbh helper_punpcklbh_mips64el
|
|
#define helper_punpckhbh helper_punpckhbh_mips64el
|
|
#define helper_pavgh helper_pavgh_mips64el
|
|
#define helper_pavgb helper_pavgb_mips64el
|
|
#define helper_pmaxsh helper_pmaxsh_mips64el
|
|
#define helper_pminsh helper_pminsh_mips64el
|
|
#define helper_pmaxub helper_pmaxub_mips64el
|
|
#define helper_pminub helper_pminub_mips64el
|
|
#define helper_pcmpeqw helper_pcmpeqw_mips64el
|
|
#define helper_pcmpgtw helper_pcmpgtw_mips64el
|
|
#define helper_pcmpeqh helper_pcmpeqh_mips64el
|
|
#define helper_pcmpgth helper_pcmpgth_mips64el
|
|
#define helper_pcmpeqb helper_pcmpeqb_mips64el
|
|
#define helper_pcmpgtb helper_pcmpgtb_mips64el
|
|
#define helper_psllw helper_psllw_mips64el
|
|
#define helper_psrlw helper_psrlw_mips64el
|
|
#define helper_psraw helper_psraw_mips64el
|
|
#define helper_psllh helper_psllh_mips64el
|
|
#define helper_psrlh helper_psrlh_mips64el
|
|
#define helper_psrah helper_psrah_mips64el
|
|
#define helper_pmullh helper_pmullh_mips64el
|
|
#define helper_pmulhh helper_pmulhh_mips64el
|
|
#define helper_pmulhuh helper_pmulhuh_mips64el
|
|
#define helper_pmaddhw helper_pmaddhw_mips64el
|
|
#define helper_pasubub helper_pasubub_mips64el
|
|
#define helper_biadd helper_biadd_mips64el
|
|
#define helper_pmovmskb helper_pmovmskb_mips64el
|
|
#define helper_msa_nloc_b helper_msa_nloc_b_mips64el
|
|
#define helper_msa_nloc_h helper_msa_nloc_h_mips64el
|
|
#define helper_msa_nloc_w helper_msa_nloc_w_mips64el
|
|
#define helper_msa_nloc_d helper_msa_nloc_d_mips64el
|
|
#define helper_msa_nlzc_b helper_msa_nlzc_b_mips64el
|
|
#define helper_msa_nlzc_h helper_msa_nlzc_h_mips64el
|
|
#define helper_msa_nlzc_w helper_msa_nlzc_w_mips64el
|
|
#define helper_msa_nlzc_d helper_msa_nlzc_d_mips64el
|
|
#define helper_msa_pcnt_b helper_msa_pcnt_b_mips64el
|
|
#define helper_msa_pcnt_h helper_msa_pcnt_h_mips64el
|
|
#define helper_msa_pcnt_w helper_msa_pcnt_w_mips64el
|
|
#define helper_msa_pcnt_d helper_msa_pcnt_d_mips64el
|
|
#define helper_msa_binsl_b helper_msa_binsl_b_mips64el
|
|
#define helper_msa_binsl_h helper_msa_binsl_h_mips64el
|
|
#define helper_msa_binsl_w helper_msa_binsl_w_mips64el
|
|
#define helper_msa_binsl_d helper_msa_binsl_d_mips64el
|
|
#define helper_msa_binsr_b helper_msa_binsr_b_mips64el
|
|
#define helper_msa_binsr_h helper_msa_binsr_h_mips64el
|
|
#define helper_msa_binsr_w helper_msa_binsr_w_mips64el
|
|
#define helper_msa_binsr_d helper_msa_binsr_d_mips64el
|
|
#define helper_msa_bmnz_v helper_msa_bmnz_v_mips64el
|
|
#define helper_msa_bmz_v helper_msa_bmz_v_mips64el
|
|
#define helper_msa_bsel_v helper_msa_bsel_v_mips64el
|
|
#define helper_msa_bclr_b helper_msa_bclr_b_mips64el
|
|
#define helper_msa_bclr_h helper_msa_bclr_h_mips64el
|
|
#define helper_msa_bclr_w helper_msa_bclr_w_mips64el
|
|
#define helper_msa_bclr_d helper_msa_bclr_d_mips64el
|
|
#define helper_msa_bneg_b helper_msa_bneg_b_mips64el
|
|
#define helper_msa_bneg_h helper_msa_bneg_h_mips64el
|
|
#define helper_msa_bneg_w helper_msa_bneg_w_mips64el
|
|
#define helper_msa_bneg_d helper_msa_bneg_d_mips64el
|
|
#define helper_msa_bset_b helper_msa_bset_b_mips64el
|
|
#define helper_msa_bset_h helper_msa_bset_h_mips64el
|
|
#define helper_msa_bset_w helper_msa_bset_w_mips64el
|
|
#define helper_msa_bset_d helper_msa_bset_d_mips64el
|
|
#define helper_msa_add_a_b helper_msa_add_a_b_mips64el
|
|
#define helper_msa_add_a_h helper_msa_add_a_h_mips64el
|
|
#define helper_msa_add_a_w helper_msa_add_a_w_mips64el
|
|
#define helper_msa_add_a_d helper_msa_add_a_d_mips64el
|
|
#define helper_msa_adds_a_b helper_msa_adds_a_b_mips64el
|
|
#define helper_msa_adds_a_h helper_msa_adds_a_h_mips64el
|
|
#define helper_msa_adds_a_w helper_msa_adds_a_w_mips64el
|
|
#define helper_msa_adds_a_d helper_msa_adds_a_d_mips64el
|
|
#define helper_msa_adds_s_b helper_msa_adds_s_b_mips64el
|
|
#define helper_msa_adds_s_h helper_msa_adds_s_h_mips64el
|
|
#define helper_msa_adds_s_w helper_msa_adds_s_w_mips64el
|
|
#define helper_msa_adds_s_d helper_msa_adds_s_d_mips64el
|
|
#define helper_msa_adds_u_b helper_msa_adds_u_b_mips64el
|
|
#define helper_msa_adds_u_h helper_msa_adds_u_h_mips64el
|
|
#define helper_msa_adds_u_w helper_msa_adds_u_w_mips64el
|
|
#define helper_msa_adds_u_d helper_msa_adds_u_d_mips64el
|
|
#define helper_msa_addv_b helper_msa_addv_b_mips64el
|
|
#define helper_msa_addv_h helper_msa_addv_h_mips64el
|
|
#define helper_msa_addv_w helper_msa_addv_w_mips64el
|
|
#define helper_msa_addv_d helper_msa_addv_d_mips64el
|
|
#define helper_msa_hadd_s_h helper_msa_hadd_s_h_mips64el
|
|
#define helper_msa_hadd_s_w helper_msa_hadd_s_w_mips64el
|
|
#define helper_msa_hadd_s_d helper_msa_hadd_s_d_mips64el
|
|
#define helper_msa_hadd_u_h helper_msa_hadd_u_h_mips64el
|
|
#define helper_msa_hadd_u_w helper_msa_hadd_u_w_mips64el
|
|
#define helper_msa_hadd_u_d helper_msa_hadd_u_d_mips64el
|
|
#define helper_msa_ave_s_b helper_msa_ave_s_b_mips64el
|
|
#define helper_msa_ave_s_h helper_msa_ave_s_h_mips64el
|
|
#define helper_msa_ave_s_w helper_msa_ave_s_w_mips64el
|
|
#define helper_msa_ave_s_d helper_msa_ave_s_d_mips64el
|
|
#define helper_msa_ave_u_b helper_msa_ave_u_b_mips64el
|
|
#define helper_msa_ave_u_h helper_msa_ave_u_h_mips64el
|
|
#define helper_msa_ave_u_w helper_msa_ave_u_w_mips64el
|
|
#define helper_msa_ave_u_d helper_msa_ave_u_d_mips64el
|
|
#define helper_msa_aver_s_b helper_msa_aver_s_b_mips64el
|
|
#define helper_msa_aver_s_h helper_msa_aver_s_h_mips64el
|
|
#define helper_msa_aver_s_w helper_msa_aver_s_w_mips64el
|
|
#define helper_msa_aver_s_d helper_msa_aver_s_d_mips64el
|
|
#define helper_msa_aver_u_b helper_msa_aver_u_b_mips64el
|
|
#define helper_msa_aver_u_h helper_msa_aver_u_h_mips64el
|
|
#define helper_msa_aver_u_w helper_msa_aver_u_w_mips64el
|
|
#define helper_msa_aver_u_d helper_msa_aver_u_d_mips64el
|
|
#define helper_msa_ceq_b helper_msa_ceq_b_mips64el
|
|
#define helper_msa_ceq_h helper_msa_ceq_h_mips64el
|
|
#define helper_msa_ceq_w helper_msa_ceq_w_mips64el
|
|
#define helper_msa_ceq_d helper_msa_ceq_d_mips64el
|
|
#define helper_msa_cle_s_b helper_msa_cle_s_b_mips64el
|
|
#define helper_msa_cle_s_h helper_msa_cle_s_h_mips64el
|
|
#define helper_msa_cle_s_w helper_msa_cle_s_w_mips64el
|
|
#define helper_msa_cle_s_d helper_msa_cle_s_d_mips64el
|
|
#define helper_msa_cle_u_b helper_msa_cle_u_b_mips64el
|
|
#define helper_msa_cle_u_h helper_msa_cle_u_h_mips64el
|
|
#define helper_msa_cle_u_w helper_msa_cle_u_w_mips64el
|
|
#define helper_msa_cle_u_d helper_msa_cle_u_d_mips64el
|
|
#define helper_msa_clt_s_b helper_msa_clt_s_b_mips64el
|
|
#define helper_msa_clt_s_h helper_msa_clt_s_h_mips64el
|
|
#define helper_msa_clt_s_w helper_msa_clt_s_w_mips64el
|
|
#define helper_msa_clt_s_d helper_msa_clt_s_d_mips64el
|
|
#define helper_msa_clt_u_b helper_msa_clt_u_b_mips64el
|
|
#define helper_msa_clt_u_h helper_msa_clt_u_h_mips64el
|
|
#define helper_msa_clt_u_w helper_msa_clt_u_w_mips64el
|
|
#define helper_msa_clt_u_d helper_msa_clt_u_d_mips64el
|
|
#define helper_msa_div_s_b helper_msa_div_s_b_mips64el
|
|
#define helper_msa_div_s_h helper_msa_div_s_h_mips64el
|
|
#define helper_msa_div_s_w helper_msa_div_s_w_mips64el
|
|
#define helper_msa_div_s_d helper_msa_div_s_d_mips64el
|
|
#define helper_msa_div_u_b helper_msa_div_u_b_mips64el
|
|
#define helper_msa_div_u_h helper_msa_div_u_h_mips64el
|
|
#define helper_msa_div_u_w helper_msa_div_u_w_mips64el
|
|
#define helper_msa_div_u_d helper_msa_div_u_d_mips64el
|
|
#define helper_msa_max_a_b helper_msa_max_a_b_mips64el
|
|
#define helper_msa_max_a_h helper_msa_max_a_h_mips64el
|
|
#define helper_msa_max_a_w helper_msa_max_a_w_mips64el
|
|
#define helper_msa_max_a_d helper_msa_max_a_d_mips64el
|
|
#define helper_msa_max_s_b helper_msa_max_s_b_mips64el
|
|
#define helper_msa_max_s_h helper_msa_max_s_h_mips64el
|
|
#define helper_msa_max_s_w helper_msa_max_s_w_mips64el
|
|
#define helper_msa_max_s_d helper_msa_max_s_d_mips64el
|
|
#define helper_msa_max_u_b helper_msa_max_u_b_mips64el
|
|
#define helper_msa_max_u_h helper_msa_max_u_h_mips64el
|
|
#define helper_msa_max_u_w helper_msa_max_u_w_mips64el
|
|
#define helper_msa_max_u_d helper_msa_max_u_d_mips64el
|
|
#define helper_msa_min_a_b helper_msa_min_a_b_mips64el
|
|
#define helper_msa_min_a_h helper_msa_min_a_h_mips64el
|
|
#define helper_msa_min_a_w helper_msa_min_a_w_mips64el
|
|
#define helper_msa_min_a_d helper_msa_min_a_d_mips64el
|
|
#define helper_msa_min_s_b helper_msa_min_s_b_mips64el
|
|
#define helper_msa_min_s_h helper_msa_min_s_h_mips64el
|
|
#define helper_msa_min_s_w helper_msa_min_s_w_mips64el
|
|
#define helper_msa_min_s_d helper_msa_min_s_d_mips64el
|
|
#define helper_msa_min_u_b helper_msa_min_u_b_mips64el
|
|
#define helper_msa_min_u_h helper_msa_min_u_h_mips64el
|
|
#define helper_msa_min_u_w helper_msa_min_u_w_mips64el
|
|
#define helper_msa_min_u_d helper_msa_min_u_d_mips64el
|
|
#define helper_msa_mod_s_b helper_msa_mod_s_b_mips64el
|
|
#define helper_msa_mod_s_h helper_msa_mod_s_h_mips64el
|
|
#define helper_msa_mod_s_w helper_msa_mod_s_w_mips64el
|
|
#define helper_msa_mod_s_d helper_msa_mod_s_d_mips64el
|
|
#define helper_msa_mod_u_b helper_msa_mod_u_b_mips64el
|
|
#define helper_msa_mod_u_h helper_msa_mod_u_h_mips64el
|
|
#define helper_msa_mod_u_w helper_msa_mod_u_w_mips64el
|
|
#define helper_msa_mod_u_d helper_msa_mod_u_d_mips64el
|
|
#define helper_msa_asub_s_b helper_msa_asub_s_b_mips64el
|
|
#define helper_msa_asub_s_h helper_msa_asub_s_h_mips64el
|
|
#define helper_msa_asub_s_w helper_msa_asub_s_w_mips64el
|
|
#define helper_msa_asub_s_d helper_msa_asub_s_d_mips64el
|
|
#define helper_msa_asub_u_b helper_msa_asub_u_b_mips64el
|
|
#define helper_msa_asub_u_h helper_msa_asub_u_h_mips64el
|
|
#define helper_msa_asub_u_w helper_msa_asub_u_w_mips64el
|
|
#define helper_msa_asub_u_d helper_msa_asub_u_d_mips64el
|
|
#define helper_msa_hsub_s_h helper_msa_hsub_s_h_mips64el
|
|
#define helper_msa_hsub_s_w helper_msa_hsub_s_w_mips64el
|
|
#define helper_msa_hsub_s_d helper_msa_hsub_s_d_mips64el
|
|
#define helper_msa_hsub_u_h helper_msa_hsub_u_h_mips64el
|
|
#define helper_msa_hsub_u_w helper_msa_hsub_u_w_mips64el
|
|
#define helper_msa_hsub_u_d helper_msa_hsub_u_d_mips64el
|
|
#define helper_msa_ilvev_b helper_msa_ilvev_b_mips64el
|
|
#define helper_msa_ilvev_h helper_msa_ilvev_h_mips64el
|
|
#define helper_msa_ilvev_w helper_msa_ilvev_w_mips64el
|
|
#define helper_msa_ilvev_d helper_msa_ilvev_d_mips64el
|
|
#define helper_msa_ilvod_b helper_msa_ilvod_b_mips64el
|
|
#define helper_msa_ilvod_h helper_msa_ilvod_h_mips64el
|
|
#define helper_msa_ilvod_w helper_msa_ilvod_w_mips64el
|
|
#define helper_msa_ilvod_d helper_msa_ilvod_d_mips64el
|
|
#define helper_msa_ilvl_b helper_msa_ilvl_b_mips64el
|
|
#define helper_msa_ilvl_h helper_msa_ilvl_h_mips64el
|
|
#define helper_msa_ilvl_w helper_msa_ilvl_w_mips64el
|
|
#define helper_msa_ilvl_d helper_msa_ilvl_d_mips64el
|
|
#define helper_msa_ilvr_b helper_msa_ilvr_b_mips64el
|
|
#define helper_msa_ilvr_h helper_msa_ilvr_h_mips64el
|
|
#define helper_msa_ilvr_w helper_msa_ilvr_w_mips64el
|
|
#define helper_msa_ilvr_d helper_msa_ilvr_d_mips64el
|
|
#define helper_msa_and_v helper_msa_and_v_mips64el
|
|
#define helper_msa_nor_v helper_msa_nor_v_mips64el
|
|
#define helper_msa_or_v helper_msa_or_v_mips64el
|
|
#define helper_msa_xor_v helper_msa_xor_v_mips64el
|
|
#define helper_msa_move_v helper_msa_move_v_mips64el
|
|
#define helper_msa_pckev_b helper_msa_pckev_b_mips64el
|
|
#define helper_msa_pckev_h helper_msa_pckev_h_mips64el
|
|
#define helper_msa_pckev_w helper_msa_pckev_w_mips64el
|
|
#define helper_msa_pckev_d helper_msa_pckev_d_mips64el
|
|
#define helper_msa_pckod_b helper_msa_pckod_b_mips64el
|
|
#define helper_msa_pckod_h helper_msa_pckod_h_mips64el
|
|
#define helper_msa_pckod_w helper_msa_pckod_w_mips64el
|
|
#define helper_msa_pckod_d helper_msa_pckod_d_mips64el
|
|
#define helper_msa_sll_b helper_msa_sll_b_mips64el
|
|
#define helper_msa_sll_h helper_msa_sll_h_mips64el
|
|
#define helper_msa_sll_w helper_msa_sll_w_mips64el
|
|
#define helper_msa_sll_d helper_msa_sll_d_mips64el
|
|
#define helper_msa_sra_b helper_msa_sra_b_mips64el
|
|
#define helper_msa_sra_h helper_msa_sra_h_mips64el
|
|
#define helper_msa_sra_w helper_msa_sra_w_mips64el
|
|
#define helper_msa_sra_d helper_msa_sra_d_mips64el
|
|
#define helper_msa_srar_b helper_msa_srar_b_mips64el
|
|
#define helper_msa_srar_h helper_msa_srar_h_mips64el
|
|
#define helper_msa_srar_w helper_msa_srar_w_mips64el
|
|
#define helper_msa_srar_d helper_msa_srar_d_mips64el
|
|
#define helper_msa_srl_b helper_msa_srl_b_mips64el
|
|
#define helper_msa_srl_h helper_msa_srl_h_mips64el
|
|
#define helper_msa_srl_w helper_msa_srl_w_mips64el
|
|
#define helper_msa_srl_d helper_msa_srl_d_mips64el
|
|
#define helper_msa_srlr_b helper_msa_srlr_b_mips64el
|
|
#define helper_msa_srlr_h helper_msa_srlr_h_mips64el
|
|
#define helper_msa_srlr_w helper_msa_srlr_w_mips64el
|
|
#define helper_msa_srlr_d helper_msa_srlr_d_mips64el
|
|
#define helper_msa_andi_b helper_msa_andi_b_mips64el
|
|
#define helper_msa_ori_b helper_msa_ori_b_mips64el
|
|
#define helper_msa_nori_b helper_msa_nori_b_mips64el
|
|
#define helper_msa_xori_b helper_msa_xori_b_mips64el
|
|
#define helper_msa_bmnzi_b helper_msa_bmnzi_b_mips64el
|
|
#define helper_msa_bmzi_b helper_msa_bmzi_b_mips64el
|
|
#define helper_msa_bseli_b helper_msa_bseli_b_mips64el
|
|
#define helper_msa_shf_df helper_msa_shf_df_mips64el
|
|
#define helper_msa_addvi_df helper_msa_addvi_df_mips64el
|
|
#define helper_msa_subvi_df helper_msa_subvi_df_mips64el
|
|
#define helper_msa_ceqi_df helper_msa_ceqi_df_mips64el
|
|
#define helper_msa_clei_s_df helper_msa_clei_s_df_mips64el
|
|
#define helper_msa_clei_u_df helper_msa_clei_u_df_mips64el
|
|
#define helper_msa_clti_s_df helper_msa_clti_s_df_mips64el
|
|
#define helper_msa_clti_u_df helper_msa_clti_u_df_mips64el
|
|
#define helper_msa_maxi_s_df helper_msa_maxi_s_df_mips64el
|
|
#define helper_msa_maxi_u_df helper_msa_maxi_u_df_mips64el
|
|
#define helper_msa_mini_s_df helper_msa_mini_s_df_mips64el
|
|
#define helper_msa_mini_u_df helper_msa_mini_u_df_mips64el
|
|
#define helper_msa_ldi_df helper_msa_ldi_df_mips64el
|
|
#define helper_msa_slli_df helper_msa_slli_df_mips64el
|
|
#define helper_msa_srai_df helper_msa_srai_df_mips64el
|
|
#define helper_msa_srli_df helper_msa_srli_df_mips64el
|
|
#define helper_msa_bclri_df helper_msa_bclri_df_mips64el
|
|
#define helper_msa_bseti_df helper_msa_bseti_df_mips64el
|
|
#define helper_msa_bnegi_df helper_msa_bnegi_df_mips64el
|
|
#define helper_msa_sat_s_df helper_msa_sat_s_df_mips64el
|
|
#define helper_msa_sat_u_df helper_msa_sat_u_df_mips64el
|
|
#define helper_msa_srari_df helper_msa_srari_df_mips64el
|
|
#define helper_msa_srlri_df helper_msa_srlri_df_mips64el
|
|
#define helper_msa_binsli_df helper_msa_binsli_df_mips64el
|
|
#define helper_msa_binsri_df helper_msa_binsri_df_mips64el
|
|
#define helper_msa_subv_df helper_msa_subv_df_mips64el
|
|
#define helper_msa_subs_s_df helper_msa_subs_s_df_mips64el
|
|
#define helper_msa_subs_u_df helper_msa_subs_u_df_mips64el
|
|
#define helper_msa_subsus_u_df helper_msa_subsus_u_df_mips64el
|
|
#define helper_msa_subsuu_s_df helper_msa_subsuu_s_df_mips64el
|
|
#define helper_msa_mulv_df helper_msa_mulv_df_mips64el
|
|
#define helper_msa_dotp_s_df helper_msa_dotp_s_df_mips64el
|
|
#define helper_msa_dotp_u_df helper_msa_dotp_u_df_mips64el
|
|
#define helper_msa_mul_q_df helper_msa_mul_q_df_mips64el
|
|
#define helper_msa_mulr_q_df helper_msa_mulr_q_df_mips64el
|
|
#define helper_msa_sld_df helper_msa_sld_df_mips64el
|
|
#define helper_msa_maddv_df helper_msa_maddv_df_mips64el
|
|
#define helper_msa_msubv_df helper_msa_msubv_df_mips64el
|
|
#define helper_msa_dpadd_s_df helper_msa_dpadd_s_df_mips64el
|
|
#define helper_msa_dpadd_u_df helper_msa_dpadd_u_df_mips64el
|
|
#define helper_msa_dpsub_s_df helper_msa_dpsub_s_df_mips64el
|
|
#define helper_msa_dpsub_u_df helper_msa_dpsub_u_df_mips64el
|
|
#define helper_msa_binsl_df helper_msa_binsl_df_mips64el
|
|
#define helper_msa_binsr_df helper_msa_binsr_df_mips64el
|
|
#define helper_msa_madd_q_df helper_msa_madd_q_df_mips64el
|
|
#define helper_msa_msub_q_df helper_msa_msub_q_df_mips64el
|
|
#define helper_msa_maddr_q_df helper_msa_maddr_q_df_mips64el
|
|
#define helper_msa_msubr_q_df helper_msa_msubr_q_df_mips64el
|
|
#define helper_msa_splat_df helper_msa_splat_df_mips64el
|
|
#define helper_msa_vshf_df helper_msa_vshf_df_mips64el
|
|
#define helper_msa_sldi_df helper_msa_sldi_df_mips64el
|
|
#define helper_msa_splati_df helper_msa_splati_df_mips64el
|
|
#define helper_msa_copy_s_b helper_msa_copy_s_b_mips64el
|
|
#define helper_msa_copy_s_h helper_msa_copy_s_h_mips64el
|
|
#define helper_msa_copy_s_w helper_msa_copy_s_w_mips64el
|
|
#define helper_msa_copy_s_d helper_msa_copy_s_d_mips64el
|
|
#define helper_msa_copy_u_b helper_msa_copy_u_b_mips64el
|
|
#define helper_msa_copy_u_h helper_msa_copy_u_h_mips64el
|
|
#define helper_msa_copy_u_w helper_msa_copy_u_w_mips64el
|
|
#define helper_msa_insert_b helper_msa_insert_b_mips64el
|
|
#define helper_msa_insert_h helper_msa_insert_h_mips64el
|
|
#define helper_msa_insert_w helper_msa_insert_w_mips64el
|
|
#define helper_msa_insert_d helper_msa_insert_d_mips64el
|
|
#define helper_msa_insve_df helper_msa_insve_df_mips64el
|
|
#define helper_msa_ctcmsa helper_msa_ctcmsa_mips64el
|
|
#define helper_msa_cfcmsa helper_msa_cfcmsa_mips64el
|
|
#define helper_msa_fill_df helper_msa_fill_df_mips64el
|
|
#define helper_msa_fcaf_df helper_msa_fcaf_df_mips64el
|
|
#define helper_msa_fcun_df helper_msa_fcun_df_mips64el
|
|
#define helper_msa_fceq_df helper_msa_fceq_df_mips64el
|
|
#define helper_msa_fcueq_df helper_msa_fcueq_df_mips64el
|
|
#define helper_msa_fclt_df helper_msa_fclt_df_mips64el
|
|
#define helper_msa_fcult_df helper_msa_fcult_df_mips64el
|
|
#define helper_msa_fcle_df helper_msa_fcle_df_mips64el
|
|
#define helper_msa_fcule_df helper_msa_fcule_df_mips64el
|
|
#define helper_msa_fsaf_df helper_msa_fsaf_df_mips64el
|
|
#define helper_msa_fsun_df helper_msa_fsun_df_mips64el
|
|
#define helper_msa_fseq_df helper_msa_fseq_df_mips64el
|
|
#define helper_msa_fsueq_df helper_msa_fsueq_df_mips64el
|
|
#define helper_msa_fslt_df helper_msa_fslt_df_mips64el
|
|
#define helper_msa_fsult_df helper_msa_fsult_df_mips64el
|
|
#define helper_msa_fsle_df helper_msa_fsle_df_mips64el
|
|
#define helper_msa_fsule_df helper_msa_fsule_df_mips64el
|
|
#define helper_msa_fcor_df helper_msa_fcor_df_mips64el
|
|
#define helper_msa_fcune_df helper_msa_fcune_df_mips64el
|
|
#define helper_msa_fcne_df helper_msa_fcne_df_mips64el
|
|
#define helper_msa_fsor_df helper_msa_fsor_df_mips64el
|
|
#define helper_msa_fsune_df helper_msa_fsune_df_mips64el
|
|
#define helper_msa_fsne_df helper_msa_fsne_df_mips64el
|
|
#define helper_msa_fadd_df helper_msa_fadd_df_mips64el
|
|
#define helper_msa_fsub_df helper_msa_fsub_df_mips64el
|
|
#define helper_msa_fmul_df helper_msa_fmul_df_mips64el
|
|
#define helper_msa_fdiv_df helper_msa_fdiv_df_mips64el
|
|
#define helper_msa_fmadd_df helper_msa_fmadd_df_mips64el
|
|
#define helper_msa_fmsub_df helper_msa_fmsub_df_mips64el
|
|
#define helper_msa_fexp2_df helper_msa_fexp2_df_mips64el
|
|
#define helper_msa_fexdo_df helper_msa_fexdo_df_mips64el
|
|
#define helper_msa_ftq_df helper_msa_ftq_df_mips64el
|
|
#define helper_msa_fmin_df helper_msa_fmin_df_mips64el
|
|
#define helper_msa_fmin_a_df helper_msa_fmin_a_df_mips64el
|
|
#define helper_msa_fmax_df helper_msa_fmax_df_mips64el
|
|
#define helper_msa_fmax_a_df helper_msa_fmax_a_df_mips64el
|
|
#define helper_msa_fclass_df helper_msa_fclass_df_mips64el
|
|
#define helper_msa_ftrunc_s_df helper_msa_ftrunc_s_df_mips64el
|
|
#define helper_msa_ftrunc_u_df helper_msa_ftrunc_u_df_mips64el
|
|
#define helper_msa_fsqrt_df helper_msa_fsqrt_df_mips64el
|
|
#define helper_msa_frsqrt_df helper_msa_frsqrt_df_mips64el
|
|
#define helper_msa_frcp_df helper_msa_frcp_df_mips64el
|
|
#define helper_msa_frint_df helper_msa_frint_df_mips64el
|
|
#define helper_msa_flog2_df helper_msa_flog2_df_mips64el
|
|
#define helper_msa_fexupl_df helper_msa_fexupl_df_mips64el
|
|
#define helper_msa_fexupr_df helper_msa_fexupr_df_mips64el
|
|
#define helper_msa_ffql_df helper_msa_ffql_df_mips64el
|
|
#define helper_msa_ffqr_df helper_msa_ffqr_df_mips64el
|
|
#define helper_msa_ftint_s_df helper_msa_ftint_s_df_mips64el
|
|
#define helper_msa_ftint_u_df helper_msa_ftint_u_df_mips64el
|
|
#define helper_msa_ffint_s_df helper_msa_ffint_s_df_mips64el
|
|
#define helper_msa_ffint_u_df helper_msa_ffint_u_df_mips64el
|
|
#define helper_raise_exception_err helper_raise_exception_err_mips64el
|
|
#define helper_raise_exception helper_raise_exception_mips64el
|
|
#define helper_raise_exception_debug helper_raise_exception_debug_mips64el
|
|
#define helper_muls helper_muls_mips64el
|
|
#define helper_mulsu helper_mulsu_mips64el
|
|
#define helper_macc helper_macc_mips64el
|
|
#define helper_macchi helper_macchi_mips64el
|
|
#define helper_maccu helper_maccu_mips64el
|
|
#define helper_macchiu helper_macchiu_mips64el
|
|
#define helper_msac helper_msac_mips64el
|
|
#define helper_msachi helper_msachi_mips64el
|
|
#define helper_msacu helper_msacu_mips64el
|
|
#define helper_msachiu helper_msachiu_mips64el
|
|
#define helper_mulhi helper_mulhi_mips64el
|
|
#define helper_mulhiu helper_mulhiu_mips64el
|
|
#define helper_mulshi helper_mulshi_mips64el
|
|
#define helper_mulshiu helper_mulshiu_mips64el
|
|
#define helper_dbitswap helper_dbitswap_mips64el
|
|
#define helper_bitswap helper_bitswap_mips64el
|
|
#define helper_rotx helper_rotx_mips64el
|
|
#define helper_ll helper_ll_mips64el
|
|
#define helper_lld helper_lld_mips64el
|
|
#define helper_swl helper_swl_mips64el
|
|
#define helper_swr helper_swr_mips64el
|
|
#define helper_sdl helper_sdl_mips64el
|
|
#define helper_sdr helper_sdr_mips64el
|
|
#define helper_lwm helper_lwm_mips64el
|
|
#define helper_swm helper_swm_mips64el
|
|
#define helper_ldm helper_ldm_mips64el
|
|
#define helper_sdm helper_sdm_mips64el
|
|
#define helper_fork helper_fork_mips64el
|
|
#define helper_yield helper_yield_mips64el
|
|
#define r4k_helper_tlbinv r4k_helper_tlbinv_mips64el
|
|
#define r4k_helper_tlbinvf r4k_helper_tlbinvf_mips64el
|
|
#define r4k_helper_tlbwi r4k_helper_tlbwi_mips64el
|
|
#define r4k_helper_tlbwr r4k_helper_tlbwr_mips64el
|
|
#define r4k_helper_tlbp r4k_helper_tlbp_mips64el
|
|
#define r4k_helper_tlbr r4k_helper_tlbr_mips64el
|
|
#define helper_tlbwi helper_tlbwi_mips64el
|
|
#define helper_tlbwr helper_tlbwr_mips64el
|
|
#define helper_tlbp helper_tlbp_mips64el
|
|
#define helper_tlbr helper_tlbr_mips64el
|
|
#define helper_tlbinv helper_tlbinv_mips64el
|
|
#define helper_tlbinvf helper_tlbinvf_mips64el
|
|
#define helper_ginvt helper_ginvt_mips64el
|
|
#define helper_di helper_di_mips64el
|
|
#define helper_ei helper_ei_mips64el
|
|
#define helper_eret helper_eret_mips64el
|
|
#define helper_eretnc helper_eretnc_mips64el
|
|
#define helper_deret helper_deret_mips64el
|
|
#define helper_rdhwr_cpunum helper_rdhwr_cpunum_mips64el
|
|
#define helper_rdhwr_synci_step helper_rdhwr_synci_step_mips64el
|
|
#define helper_rdhwr_cc helper_rdhwr_cc_mips64el
|
|
#define helper_rdhwr_ccres helper_rdhwr_ccres_mips64el
|
|
#define helper_rdhwr_performance helper_rdhwr_performance_mips64el
|
|
#define helper_rdhwr_xnp helper_rdhwr_xnp_mips64el
|
|
#define helper_pmon helper_pmon_mips64el
|
|
#define helper_wait helper_wait_mips64el
|
|
#define mips_cpu_do_unaligned_access mips_cpu_do_unaligned_access_mips64el
|
|
#define mips_cpu_do_transaction_failed mips_cpu_do_transaction_failed_mips64el
|
|
#define helper_msa_ld_b helper_msa_ld_b_mips64el
|
|
#define helper_msa_ld_h helper_msa_ld_h_mips64el
|
|
#define helper_msa_ld_w helper_msa_ld_w_mips64el
|
|
#define helper_msa_ld_d helper_msa_ld_d_mips64el
|
|
#define helper_msa_st_b helper_msa_st_b_mips64el
|
|
#define helper_msa_st_h helper_msa_st_h_mips64el
|
|
#define helper_msa_st_w helper_msa_st_w_mips64el
|
|
#define helper_msa_st_d helper_msa_st_d_mips64el
|
|
#define helper_cache helper_cache_mips64el
|
|
#define gen_intermediate_code gen_intermediate_code_mips64el
|
|
#define mips_tcg_init mips_tcg_init_mips64el
|
|
#define cpu_mips_realize_env cpu_mips_realize_env_mips64el
|
|
#define cpu_state_reset cpu_state_reset_mips64el
|
|
#define restore_state_to_opc restore_state_to_opc_mips64el
|
|
#define mips_reg_reset mips_reg_reset_mips64el
|
|
#define mips_reg_read mips_reg_read_mips64el
|
|
#define mips_reg_write mips_reg_write_mips64el
|
|
#define ieee_rm ieee_rm_mips64el
|
|
#define mips_defs mips_defs_mips64el
|
|
#define mips_defs_number mips_defs_number_mips64el
|
|
#define gen_helper_float_class_s gen_helper_float_class_s_mips64el
|
|
#define gen_helper_float_class_d gen_helper_float_class_d_mips64el
|
|
#endif
|