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536 Commits

Author SHA1 Message Date
Chen Huitao
7e4ac9e86e fix some oss-fuzz (#1184) 
* fix oss-fuzz 10419.

* fix oss-fuzz 10427.

* fix oss-fuzz 10421.

* fix oss-fuzz 10422.

* fix oss-fuzz 10425.

* fix oss-fuzz 10426.

* fix oss-fuzz 10426.

* fix oss-fuzz 10422.

* fix oss-fuzz  10426.

* fix oss-fuzz 10456.

* fix oss-fuzz 10428.

* fix oss-fuzz 10429.

* fix oss-fuzz 10431.

* fix oss-fuzz 10435.

* fix oss-fuzz 10430.

* fix oss-fuzz 10436.

* remove unused var.

* fix oss-fuzz 10449.

* fix oss-fuzz 10452.

* fix oss-fuzz 11792.

* fix oss-fuzz 10457.

* fix oss-fuzz 11737.

* fix oss-fuzz 10458.

* fix oss-fuzz 10565.

* fix oss-fuzz 11651.

* fix oss-fuzz 10497.

* fix oss-fuzz 10515.

* fix oss-fuzz 10586.

* fix oss-fuzz 10597.

* fiz oss-fuzz 11721.

* fix oss-fuzz 10718.

* fix oss-fuzz 15610.

* fix oss-fuzz 10512.

* fix oss-fuzz 10545.

* fix oss-fuzz 10598.

* fix oss-fuzz 11112.

* fix oss-fuzz 11589.

* fix oss-fuzz 10674.

* git fix oss-fuzz 19610.

* fix oss-fuzz 19848.

* fix oss-fuzz 19851.

* fix oss-fuzz 19852.

* fix oss-fuzz 10878.

* fix oss-fuzz 11655.

* fix oss-fuzz 19849.

* fix oss-fuzz 11765.

* fix oss-fuzz 10337.

* fix oss-fuzz 10575.

* fix oss-fuzz 19877.

* fix oss-fuzz 19895.

* fix oss-fuzz 19896.

* fix oss-fuzz 19897.

* remove verbose fprintf output.
 2020-01-10 23:05:44 +08:00
Chen Huitao
8621bca537 fix some oss-fuzz bugs (#1182) 
* fix oss-fuzz 10419.

* fix oss-fuzz 10427.

* fix oss-fuzz 10421.

* fix oss-fuzz 10422.

* fix oss-fuzz 10425.

* fix oss-fuzz 10426.

* fix oss-fuzz 10426.

* fix oss-fuzz 10422.

* fix oss-fuzz  10426.

* fix oss-fuzz 10456.

* fix oss-fuzz 10428.

* fix oss-fuzz 10429.

* fix oss-fuzz 10431.

* fix oss-fuzz 10435.

* fix oss-fuzz 10430.

* fix oss-fuzz 10436.

* remove unused var.

* fix oss-fuzz 10449.

* fix oss-fuzz 10452.

* fix oss-fuzz 11792.

* fix oss-fuzz 10457.

* fix oss-fuzz 11737.

* fix oss-fuzz 10458.

* fix oss-fuzz 10565.

* fix oss-fuzz 11651.

* fix oss-fuzz 10497.

* fix oss-fuzz 10515.

* fix oss-fuzz 10586.

* fix oss-fuzz 10597.

* fiz oss-fuzz 11721.

* fix oss-fuzz 10718.

* fix oss-fuzz 15610.

* fix oss-fuzz 10512.

* fix oss-fuzz 10545.
 2020-01-05 19:20:29 +08:00
Chen Huitao
68eb357984 fix some oss-fuzz bugs (#1180) 
* fix oss-fuzz 10419.

* fix oss-fuzz 10427.

* fix oss-fuzz 10421.

* fix oss-fuzz 10422.

* fix oss-fuzz 10425.

* fix oss-fuzz 10426.

* fix oss-fuzz 10426.

* fix oss-fuzz 10422.

* fix oss-fuzz  10426.

* fix oss-fuzz 10456.

* fix oss-fuzz 10428.

* fix oss-fuzz 10429.

* fix oss-fuzz 10431.

* fix oss-fuzz 10435.

* fix oss-fuzz 10430.

* fix oss-fuzz 10436.

* remove unused var.
 2020-01-04 23:42:02 +08:00
Charles Ferguson
99097cab4c Add implementation of access to the ARM SPSR register. (#1178) 
The SPSR register is named within the Unicorn headers, but the code
to access it is absent. This means that it will always read as 0 and
ignore writes. This makes it harder to work with changes in processor
mode, as the usual way to return from a CPU exception is a
`MOVS pc, lr` for undefined instructions or `SUBS pc, lr, #4`
for most other aborts - which implicitly restores the CPSR from SPSR.

This change adds the access to the SPSR so that it can be read and
written as the caller might expect.
 2020-01-02 09:42:01 +08:00
Nguyen Anh Quynh
fc8a42aeb8 spacing 2020-01-01 09:56:55 +08:00
Charles Ferguson
b59632fb64 Ensure that PC is not fixed up when code tracing or timing. (#1179) 
Under some circumstances, the PC is not fixed up properly when
returning from the execution of a block in cpu_tb_exec. This appears
to be caused by the resetting of the PC from the tb.

This change removes the additional fixup in the cases where there
is code tracing or timing active. Either of these cases would result
in the wrong PC being reported.

Closes unicorn-engine#1105.
 2020-01-01 09:55:08 +08:00
Chen Huitao
95890d593f fix oss-fuzz issue 10578. (#1159) 2019-12-29 00:14:05 +08:00
meta
ba74552199 Expose different 32-bit ARM CPU models to users via UC_MODE flags (#1165) 2019-10-26 05:01:00 +08:00
w1tcher
83887b8193 Fix the error in the hook_code of the arm, calling emu_stop and causing the pc value to be incorrect after the end of the run. (#1157) 2019-10-25 14:47:29 +08:00
Chen Huitao
c03f929c75 fix oss-fuzz issue 10334. (#1149) 2019-10-08 10:44:50 +08:00
Chen Huitao
79d89e5d3b fix a mem-leak (#1147) 
* fix a mem-leak.

* check the uc and l1_map before using them.

* fix multi-level free bug.

* Add pointer check.
 2019-10-05 15:11:46 +08:00
Azertinv
07f94ad1fc Added an invalid instruction hook (#1132) 
* first draft for an invalid instruction hook

* Fixed documentation on return value of invalid insn hook
 2019-09-23 01:53:06 +08:00
Chen Huitao
f4cc35a24a compatible with python2 and python3 (#1145) 
* compatible with python2 and python3.

* fix python version check in configure of qemu.

* allow python-2.4.

* add credit.
 2019-09-20 17:23:12 +08:00
Chen Huitao
ca6516ff79 Remove warnings (#1140) 
* remove warnings on windows with vs2019.

* remove warnings.
 2019-09-08 16:44:16 +08:00
Chen Huitao
60896de9f4 add CMakeList.txt. build windows binary by using vs2019. (#1134) 
* add CMakeList.txt. build windows binary by using vs2019.

* remove macro redefinition warning.

* add nmake.bat.

* update CMakeLists.txt. build successfully on Ubuntu-1804-amd64.

* add CMakeList.txt. build windows binary by using vs2019.

* remove macro redefinition warning.

* add nmake.bat.

* update CMakeLists.txt. build successfully on Ubuntu-1804-amd64.

* Add build specific arch option.

* fix old MSVC inline and mipsel macro.

* add install target and option of embeded MSVCRT lib.

* add cmake.sh and document.

* add xwings and chenhuitao as programmer.

* fix COMPILE-CMAKE. rename txt to md.
 2019-09-08 16:42:43 +08:00
Fish
626d72d6df Two fixes to get unicorn build better with MSVC. (#1136) 
* Change MSVC keywords.

typename, class, and class are all keywords for MSVC. Adding a suffix for
all of them allows a successful compilation under VC 2017 (15.9).

* Switch from /ZI to /Zi to avoid crashes at longjmp in debug builds.
 2019-09-05 00:53:37 +08:00
Chen Huitao
23a426625f check arguments, return error instead of raising exceptions. (#1125) 
* check arguments, return error instaed of raising exceptions. close #1117.

* remove empty lines. remove thr underscore prefix in function name.
 2019-08-23 17:05:13 +08:00
Daniel Deptford
bc572be472 Check for TLB invalidation after read callback(s). (#1122) 
* Adding regression test for issue where writing memory into a read only segment during a access callback fails.

* Check for TLB invalidation when calling read callbacks;  Writes to read-only memory by the callback cause a TLB flush which requires a re-read of the TLB.
 2019-08-22 17:54:24 +08:00
naq
9208a6f317 initialize ret=0 in cpu_exec(). issue #1115 2019-08-05 23:00:01 +08:00
naq
540c893157 cleanup qemu/cpus.c 2019-07-31 15:43:06 +08:00
kj.xwings.l
24f55a7973 Removed hardcoded CP0C3_ULRI (#1098) 
* activate CP0C3_ULRI for CONFIG3, mips

* updated with mips patches

* updated with mips patches

* remove hardcoded config3

* git ignore vscode

* fix spacing issue and turn on floating point
 2019-07-06 17:53:02 +08:00
kj.xwings.l
5efc0afd49 activate CP0C3_ULRI for CONFIG3, mips (#1097) 2019-06-24 20:58:53 +08:00
Ryan Houdek
ae6e3c193d Fixes register reading and writing for XMM8-15 on x86-64 (#1090) 2019-06-03 19:04:41 +08:00
Lukas Dresel
55d8d073bd support for YMM registers ymm8-ymm15 (#1079) 2019-04-01 11:00:34 +08:00
yhql
3185128031 Add ARM MSP, PSP and CONTROL register access (#1071) 
Necessary for NVIC exception emulation from user.
 2019-03-07 08:37:27 +08:00
cfrantz
6c319941a5 Add support for the ARM IPSR register. (#1067) 
1. Create an enum name for the IPSR register.
2. Implement read and write of the IPSR via the xpsr helper functions.

Fixes #1065
 2019-02-28 09:55:27 +08:00
dmarxn
5bf6d77e4e Fixed the decoding of opcodes after getting vex2 using 0xc5 (#1064) 
* Fixed the decoding of opcodes after getting vex2 using 0xc5

* Added testcase for vex. Can and should be expanded

* Fixed warning of testcase for vex (parentheses for assignment)
 2019-02-25 21:14:20 +08:00
dmarxn
256e7782ce Added MXCSR register, fixed writing to FPUCW. (#1059) 
* Added MXCSR register for reading and writing

* Changed writing for fpucw register, now the qemu rounding status is updated as well
 2019-02-15 12:59:49 +08:00
dmarxn
360e9c60e1 changed cpu_compue_eflags to use the updated eflags variable. Otherwise, cli/sti and popfl may break, as we get the non-updated eflags (#1057) 2019-02-07 23:10:01 +08:00
dmarxn
3df5ef8ab1 Fixed conditional move tcg bug (tcg_gen_movcond), which generated an ALWAYS / NEVER condition despite QEMU no supporting those conditions in the tcg_out part (#1054) 2019-01-31 09:59:51 +08:00
BrunoPujos
536c4e77c4 i386: set MSR IA32_EFER to correct value at init for IA32e Mode (#1047) 2018-11-30 11:42:19 +08:00
nanoric
a2493a0d41 [Fix] Fix a problem that use uc_reg_write to write fs, gs has no effets in x86 64-bit mode. (#984) 2018-11-10 21:24:11 +08:00
Catena cyber
400a0ab309 Uses latest qemu arm thumb load store stuff (#1021) 2018-09-27 10:32:48 +08:00
Catena cyber
333bfdf65e Removes accessible assert (#1022) 2018-09-24 20:21:30 +08:00
Catena cyber
46999575fb Mips undefined shift fix (#1011) 2018-09-16 21:51:03 +08:00
Catena cyber
910999d396 Prevents abort with m68K (#1012) 
* Prevents abort with m68K

Raises exception instead

* M68K remove one uses of abort

* Less aborts and logs instead for M68K
 2018-09-16 21:50:35 +08:00
Catena cyber
4a86318cf4 Initializes i386 prefix value (#1013) 2018-09-16 21:50:00 +08:00
Catena cyber
b8df067514 Sparc increase ttl number (#1016) 2018-09-16 21:49:34 +08:00
Catena cyber
12bcf3bea0 Fuzz builds ok (#1007) 
* Fuzzing M68K without abort

* UC_MODE_32 is not ok with sparc

use UC_MODE_SPARC32|UC_MODE_BIG_ENDIAN instead

* Temporary removing leaking on start targets

* Do not abort for m68K undef instructions
 2018-09-11 12:49:32 +08:00
toshiMSFT
0f14c47344 Makes SYSENTER hookable again on x86 (#996) 
Adds SYSENTER to the whitelist of supported hookable instructions in unicorn
as well as fixes up the existing sysenter_hook_x86 regression test which was
previously failing

Fixes unicorn-engine/unicorn#995
 2018-08-09 23:32:31 +08:00
Alex von Gluck IV
c7be4a2160 Haiku support patches (#989) 
* Haiku: fix broken gcc strong stack protector

* qemu: Backport minor Haiku fix

We need to push this fix upstream to qemu. If we don't
get it upstreamed, i'll circle back and patch it if
Unicorn updates its qemu version.
 2018-08-03 11:15:14 +08:00
Nguyen Anh Quynh
4d0157eb4a x86: fix #968. also fix potential bug of not clearing high bytes when updateing EIP 2018-07-26 15:19:23 +08:00
Nguyen Anh Quynh
86313650f9 fix some gcc warnings 2018-07-25 12:38:15 +08:00
nanoric
2a240079d8 [Fix] Add feature support for CMPXCHG16B instruction. (#983) 2018-07-25 15:00:41 +08:00
Nguyen Anh Quynh
d5f83a9c2e arm: cleanup for ARM_CPU 2017-12-21 09:43:33 +08:00
Nguyen Anh Quynh
e67be36c88 arm: remove unused variable in arm_cpu_get_phys_page_debug() 2017-12-20 22:12:35 +08:00
Nguyen Anh Quynh
3e0d0cfab7 i386: fix signed int overflow in #923 & #924 2017-12-16 10:28:45 +08:00
Andrew Dutcher
d7735487f7 Use the qemu helpers to get/set the x86 eflags (#878) 2017-09-15 22:18:38 +07:00
Andrew Dutcher
363cbacee4 Only set eip to the instruction pointer after an interrupt if the interrupt was user-generated (#875) 2017-08-29 17:14:36 +07:00
darkf
42d0632108 Fix typo in ARM tcg-target.c (#859) 2017-07-22 23:36:38 +08:00
vardyh
ad767abda8 x86::trans: handle illegal case for opc c6/c7 
Reference Intel software developer manual vol2 Appendix A Table A-6 for
detailed decoding information.

Signed-off-by: vardyh <vardyh.dev@gmail.com>
 2017-05-25 15:22:45 +08:00
misson20000
014ccfb94a Aarch64 add thread registers (#834) 
* add thread registers to AArch64

* update bindings to add AArch64 thread registers

* fix indentation for register read/write switch-case in unicorn_aarch64.c
 2017-05-14 14:42:49 +07:00
bulaza
4b9efdc986 Adding INSN hook checks for x86 (#833) 
* adding INSN hook checking for x86

* tabs to spaces

* need to return bool not uc_err

* fixed conditional after switching to bool
 2017-05-14 00:16:17 +07:00
Ryan Hileman
ae6ea3b91d fix arm64 hang (fix #827) (#828) 2017-05-09 20:19:32 +08:00
Samuel Groß
5385baba39 Implemented read and write access to the YMM registers (#819) 2017-05-05 09:02:58 +08:00
zhangwm
4a62409949 arm64eb: arm64 big endian also using little endian instructions. (#816) 
* arm64eb: arm64 big endian also using little endian instructions.

* arm64: using another example that depends on endians.

example:
1. store a word: 0x12345678
2. load a byte:
   * little endian : 0x78
   * big endian    : 0x12
 2017-05-04 20:00:48 +08:00
Ryan Hileman
1b00d3f89a remove slow cpu QOM casts (#815) 2017-05-02 14:56:39 +08:00
Ryan Hileman
187b470245 add arm64 CPACR_EL1 register support (#814) 2017-05-02 14:51:19 +08:00
zhangwm
2e973a13f0 arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
Nguyen Anh Quynh
513075e061 arm: fix an warning reported by GCC 2017-04-21 21:12:57 +08:00
Nguyen Anh Quynh
e917c9de10 Merge branch 'master' into msvc2 2017-04-21 01:17:00 +08:00
0xSeb
605400e10e determine correct Thumb/Thumb2 instruction size (16/32-bit) for code … (#796) 
* determine correct Thumb/Thumb2 instruction size (16/32-bit) for code hook

* determine correct Thumb/Thumb2 instruction size (16/32-bit) for code hook

* determine correct Thumb/Thumb2 instruction size (16/32-bit) for code hook
 2017-04-15 00:39:56 +08:00
Nguyen Anh Quynh
f915f14e74 Merge branch 'master' of https://github.com/unicorn-engine/unicorn 2017-04-12 22:06:40 +08:00
Nguyen Anh Quynh
cb44f77ac3 mips: fix uc_reg_read() for MIPS64 2017-04-12 22:06:26 +08:00
Nguyen Anh Quynh
3315f288d3 fix an warning in glib_compat.c 2017-04-12 14:01:58 +08:00
bunnei
4eca426fb6 unicorn_aarch64: Expose UC_ARM64_REG_NZCV register. (#791) 2017-03-31 10:21:45 +08:00
Nguyen Anh Quynh
094ca80092 fix conflicts 2017-03-30 12:23:24 +08:00
zhangwm
ccdb0ff523 armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition. 2017-03-15 22:25:35 +08:00
Nguyen Anh Quynh
a267af7d95 add arm_release to qemu/header_gen.py, and regenerate qemu/armeb.h 2017-03-14 23:41:31 +08:00
zhangwm
d8fe34a2e8 armeb: Add support for ARM big endian. 2017-03-13 22:32:44 +08:00
Nguyen Anh Quynh
c01dcf0a14 fix merge conflicts 2017-03-10 21:04:33 +08:00
feliam
0150ca24b1 Add support for ARM application flags - APSR register (#776) 2017-03-09 22:28:03 +08:00
Matt Thomas
2749b8412e fix register widths for MIPS64 reg_read/write (#775) 
* fix register widths for MIPS64 reg_read/write

* fix preprocessor typedef error for qemu/target-mips
 2017-03-08 08:40:30 +08:00
stevielavern
b3a5eae81c uc_reg_read & uc_reg_write now support ARM64 Neon registers (#774) 
* uc_reg_read & uc_reg_write now support ARM64 Neon registers

* Do not reuse uc_x86_xmm for uc_arm64_neon128. TODO: refactor both classes to use the same parent.
 2017-03-07 21:29:34 +08:00
Nguyen Anh Quynh
c3808179e1 another attempt to fix #766 2017-02-26 15:22:24 +08:00
Nguyen Anh Quynh
e65fef70dc add missing TCG context arg to few functions in tcg.c. see #766 2017-02-26 09:47:40 +08:00
Nguyen Anh Quynh
d52f85d16e add back missing ELF symbols reported in #766 2017-02-26 09:39:11 +08:00
Ahmed Samy
02e6c14e12 x86: add MSR API via reg API (#755) 
Writing / reading to model specific registers should be as easy as
calling a function, it's a bit stupid to write shell code and run them
just to write/read to a MSR, and even worse, you need more than just a
shellcode to read...

So, add a special register ID called UC_X86_REG_MSR, which should be
passed to uc_reg_write()/uc_reg_read() as the register ID, and then a
data structure which is uc_x86_msr (12 bytes), as the value (always), where:
	Byte	Value		Size
	0	MSR ID		4
	4       MSR val		8
 2017-02-24 21:37:19 +08:00
Nguyen Anh Quynh
f3ada41b99 fix the last fix that crashes samples 2017-02-24 20:34:52 +08:00
Nguyen Anh Quynh
7c29558a95 msvc: fix a warning in qemu/exec.c when merging master to msvc 2017-02-24 19:29:55 +08:00
Nguyen Anh Quynh
6ea39f7d5a merge msvc with master 2017-02-24 10:39:36 +08:00
Nguyen Anh Quynh
e7ecbf7889 m68k: fix a compilation warning 2017-02-23 20:34:17 +08:00
Nguyen Anh Quynh
714cf2c609 arm: fix a warning 2017-02-23 20:32:09 +08:00
Nguyen Anh Quynh
736d9857d2 recover some ELF symbols for building on Arm, PPC, Sparc & S390. issue #752 2017-02-20 15:16:50 +08:00
Chris Eagle
a03e908611 Fix initial state of segment registers (#751) 
* Remove glib from samples makefile

* changes to 16 bit segment registers needs to update segment base as well as segment selector

* change how x86 segment registers are set in 16-bit mode

* more appropriate solution to initial state of x86 segment registers in 16-bit mode

* remove commented lines
 2017-02-09 23:49:54 +08:00
Chris Eagle
f05984961b Fix 16-bit address computations (#747) 
* Remove glib from samples makefile

* changes to 16 bit segment registers needs to update segment base as well as segment selector

* change how x86 segment registers are set in 16-bit mode
 2017-02-08 09:37:41 +08:00
vardyh
7f9251511e MSVC port (vardyh) (#746) 
* unicorn: use waitable timer to implement usleep() on Windows

Signed-off-by: vardyh <vardyh.dev@gmail.com>

* atomic: implement barrier() for msvc

Signed-off-by: vardyh <vardyh.dev@gmail.com>
 2017-02-07 21:31:35 +08:00
Parker Thompson
053ecd7bf4 Added ARM coproc registers (#684) 
* Added ARM coproc registers

* Added regression test for vfp
 2017-01-25 11:56:19 +08:00
Nguyen Anh Quynh
ef52d9a9d1 cleanup qemu/include/qemu/module.h 2017-01-25 00:20:08 +08:00
xorstream
e08d1bf7c6 Arm issue fix. (#738) 
* Fix for MIPS issue.

* Sparc support added.

* M68K support added.

* Arm support ported.

* Fix issue with VS2015 shlobj.h file

* Arm issue fix.
 2017-01-24 17:45:01 +08:00
xorstream
8e45102b43 Arm support ported. (#736) 
* Fix for MIPS issue.

* Sparc support added.

* M68K support added.

* Arm support ported.

* Fix issue with VS2015 shlobj.h file
 2017-01-23 23:30:57 +08:00
xorstream
2695a0ffe8 M68K support added. (#735) 
* Fix for MIPS issue.

* Sparc support added.

* M68K support added.
 2017-01-23 14:40:02 +08:00
xorstream
a40921ce32 Sparc support added. (#734) 
* Fix for MIPS issue.

* Sparc support added.
 2017-01-23 13:29:41 +08:00
xorstream
69ae8f7987 Fix for MIPS issue. (#733) 2017-01-23 12:39:34 +08:00
Nguyen Anh Quynh
2ecbe89cc1 cleanup Sparc unused code 2017-01-23 12:34:00 +08:00
Nguyen Anh Quynh
e4c7c3dbe4 cleanup Sparc unused code 2017-01-23 12:33:39 +08:00
Nguyen Anh Quynh
0680b85920 cleanup Monitor related code 2017-01-23 10:07:01 +08:00
Nguyen Anh Quynh
81b8a685be cleanup 2017-01-23 10:06:49 +08:00
Nguyen Anh Quynh
55d472c62c cleanup Monitor related code 2017-01-23 00:53:31 +08:00
Nguyen Anh Quynh
b3faed1df9 cleanup 2017-01-23 00:30:13 +08:00