Commit Graph

454 Commits

Author SHA1 Message Date
mio fc193ffe24
Fix missing macros 2022-10-28 17:55:39 +02:00
mio a40bf26263
Disable test_x86_unaligned_access on be hosts 2022-10-28 17:53:20 +02:00
mio 428ed8fd21
Fix test_x86_unaligned_access for big endian hosts 2022-10-28 17:47:55 +02:00
mio 4b961a8ef6
Apply fix for big endian hosts per #1710 2022-10-28 16:20:20 +02:00
mio 47275c18f4
Fix a test bug 2022-10-28 15:02:59 +02:00
mio d80cd54b0f
Revert test_ctl endian changes 2022-10-27 23:39:43 +02:00
mio bb7b5bb64a
Use macro bswap 2022-10-27 23:32:15 +02:00
mio e01556557e
Fix endianess in test_ctl 2022-10-27 22:52:25 +02:00
mio fb8fb1ca7a
Add headers for endianess 2022-10-27 22:51:56 +02:00
mio da3999b6f0
Add tests for thumb2 2022-10-21 11:37:07 +02:00
mio 3ea7857be3
Exit early when invalid read happens
In this way, the target register won't be overwritten
2022-10-20 21:57:28 +02:00
mio a5d4d30a31
Sync PC for mem ldst on aarch64 2022-10-20 21:19:18 +02:00
Nguyen Anh Quynh b99ec09c90 tests: remove unused var 2022-10-12 14:43:01 +08:00
mio c144f06145
Format code 2022-10-01 00:14:08 +02:00
mio 19d8876e23
Deep copy for arm cpu state 2022-10-01 00:14:08 +02:00
relapids 1065c2dff4 Fix test_uc_hook_cached_uaf for MacOS M1 (aarch64). 2022-09-25 15:24:56 -07:00
Timo Röhling e1e7b25268
Adjust big memory test for host pagesize
On machines with a page size larger than 4K, the requested memory size
in `test_map_big_memory` gets rounded up and overflows to zero.

This PR adds some code to query the page size and adjust the requested
memory size accordingly.
2022-09-25 18:16:06 +02:00
Mio a0e119c6f0
Format code 2022-08-31 23:27:24 +08:00
Mio c4a0813f4a
Add a test for infinite loop when sync-ing pc for UC_HOOL_BLOCK #1661 2022-08-31 23:27:05 +08:00
relapids 154a21d6a3 Disable ARM-specific tests when ARM is unavailable. 2022-08-18 18:29:24 -07:00
relapids 2e8986174b Fix leak in test_mem_protect_map_ptr. 2022-08-15 05:38:29 -07:00
mio bdb141aeef
Disable unaligned access test on ppc and aarch64
The memoy read operations on these architectures are inlined

e.g. ldur on aarch64
2022-08-14 15:42:37 +02:00
mio 419d710c4a
Return true when we handled the memory events 2022-08-14 13:37:25 +02:00
mio 2c00546c6e
Merge rhelmot's fix 2022-08-14 13:35:54 +02:00
mio 6db6790ec2 Merge remote-tracking branch 'zachesez/ppc_cr_read_fix' into dev 2022-07-23 20:46:40 +08:00
Mio d6d57834b0
Format code 2022-07-23 19:27:37 +08:00
Mio c7ff9d66cf
Move vex.l test to test_x86 2022-07-23 19:26:35 +08:00
Zach Szczesniak 2b25867e4b Fixed endianness when writing PPC32 CR register. 2022-07-20 18:31:13 -04:00
Duncan Ogilvie e485f39846 Add a test to make sure VEX.L stops emulation with an error 2022-07-20 13:59:27 +02:00
lazymio 0ebac3b455
Fix typo 2022-06-02 15:06:50 +02:00
lazymio 6d61aec82f
Format code 2022-06-02 14:46:26 +02:00
lazymio 637dc8a8a0
Generate an extra block to trigger segfault 2022-06-02 14:45:38 +02:00
lazymio 40436e885b
Fix the cached hook test 2022-06-02 14:38:53 +02:00
lazymio 774c942143
Add a test for hook cache UAF
If a hook is deleted but wrongly cached, a UAP is probably triggered
2022-06-01 23:58:02 +02:00
lazymio e3613a9f59
Format code 2022-05-28 23:46:18 +02:00
lazymio 2a6529348c
Support uc_mem_protect on mmio regions
Also make mmio ranges return the correct errors on wrong protection
2022-05-28 23:33:43 +02:00
lazymio ba50035830
Format code 2022-05-23 12:30:44 +02:00
lazymio dae48aecee
Mem hook should return a bool 2022-05-20 13:31:54 +02:00
lazymio 0d41d4bbb2
Merge QDucasse:x86_hook_address for tests 2022-05-20 13:07:49 +02:00
lazymio f4f726d7fc
Add test for ensuring hooks are get called only once 2022-05-07 00:23:04 +02:00
Quentin DUCASSE 38dfd69309 Equivalent tests for arm64 2022-05-04 18:03:06 +02:00
Quentin DUCASSE f569417878 Equivalent tests for riscv 2022-05-04 17:18:47 +02:00
Quentin DUCASSE 8ee9e89f01 Fixed code comment for x86 tests 2022-05-04 17:06:48 +02:00
Quentin DUCASSE a3ed8bbce5 Tests for jump hook address 2022-05-04 16:51:43 +02:00
lazymio ba132b974d
Move tests to root directory
Reference: https://doc.rust-lang.org/stable/cargo/guide/project-layout.html
2022-04-29 23:40:03 +02:00
Eric Poole cfee2139a0
TriCore Support (#1568)
* TriCore Support

python sample

* Update sample_tricore.py

Correct attribution

* Update sample_tricore.py

Fixed byte code to execute properly.

* Update sample_tricore.py

Removed testing artifact

* Added tricore msvc config-file.h

* Added STATIC to tricore config and added helper methods to symbol file generation.

* Update op_helper.c

Use built in crc32

* Fix tricore samples and small code blocks are now handled properly

* Add CPU types

* Generate bindings

* Format code

Co-authored-by: lazymio <mio@lazym.io>
2022-04-29 23:11:34 +02:00
lazymio ed90e98d81
Generate a TB at least to make sure cahce is not cleared for ADD and DEC 2022-04-26 01:18:00 +02:00
lazymio d3f1ec1345
Add a test for count hook cache 2022-04-26 01:17:59 +02:00
lazymio 3d3deac5e6
Fix crash when mapping a big memory and calling uc_close 2022-04-16 19:17:41 +02:00
lazymio cf18982e1c
Add two tests for mem map wrap 2022-04-16 18:19:41 +02:00