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36 Commits

Author SHA1 Message Date
Chris Eagle
4c4203cec8 fix x86 segment setup by updating cached segment registers on reg_write 2016-03-22 23:54:30 -07:00
Nguyen Anh Quynh
859111f8f5 x86: return immediately after handling FPSW/FPCW/FPTAG registers 2016-03-20 18:15:41 +08:00
feliam
b43f89566f Bugfix 2016-03-15 12:17:40 -03:00
Nguyen Anh Quynh
75e5fb466c x86: fix writing to UC_X86_REG_FPCW 2016-03-14 09:27:46 +08:00
feliam
23b3f651f9 Indentation 2016-03-10 07:45:36 -03:00
feliam
0a3799eada FPU control word and tags 2016-03-09 19:14:33 -03:00
feliam
ff66a72d7b GDT/LDT/IDT/FPU access from python bingings 2016-03-09 18:07:38 -03:00
Hiroyuki UEKAWA
c5888e5670 move macros in qemu/target-*/unicorn*.c to uc_priv.h 2016-03-02 12:43:02 +09:00
Hiroyuki UEKAWA
1cd3c3093b fix WRITE_BYTE_H 2016-03-02 10:51:50 +09:00
Nguyen Anh Quynh
3bd7fa4bfe chmod -x qemu/target-i386/unicorn.c 2016-02-12 13:48:58 +08:00
Nguyen Anh Quynh
6478a24404 Merge branch 'gdt_idt' of https://github.com/cseagle/unicorn into cseagle-gdt_idt 2016-02-06 17:31:42 +08:00
Chris Eagle
dec3615d12 ldtr and tr limit is 20 bits, not 16 bits 2016-02-04 19:26:47 -08:00
Chris Eagle
b49358524f fix reg_read casting for x86 segment registers 2016-02-04 19:22:39 -08:00
Chris Eagle
4cb43be5bf fix reg_read casting for x86 segment registers 2016-02-04 19:20:59 -08:00
Chris Eagle
49b9f4f8da uc_x86_mmr type available in qemu/target-i386/unicorn.c 2016-02-04 19:09:41 -08:00
Chris Eagle
c339ced218 file perms 2016-02-04 17:18:24 -08:00
Chris Eagle
f3dc2522a0 read/write of x86 segment registers should modify selector field not base field 2016-02-04 17:17:40 -08:00
Chris Eagle
59f7bf3be7 file perms 2016-02-04 16:48:27 -08:00
Chris Eagle
e59382e030 updated gdtr/idtr/ldtr/tr read/write code 2016-02-04 16:44:52 -08:00
Chris Eagle
9977054a15 add support for setting gdtr, idtr, ldtr, and tr programatically 2016-02-03 09:22:29 -08:00
Nguyen Anh Quynh
5a04bcb115 allow to change PC during callback. this solves issue #210 2016-01-28 14:06:17 +08:00
Nguyen Anh Quynh
7695fb1578 x86: no need to reset env->invalid_error in x86_reg_reset() as we always do that in cpu_exec() 2016-01-12 01:01:11 +08:00
Spl3en
bb375e4fa9 Reset correctly the register CR0 in protected mode by calling cpu_x86_update_cr0 instead of setting it manually. 2015-12-25 04:55:15 +01:00
Nguyen Anh Quynh
51323c9c17 x86: properly calculate EFLAGS when UC_HOOK_CODE is used. this should fix issue #246 2015-11-05 20:26:39 +08:00
Ryan Hileman
8c60d0dca5 allow setting x86 segment base to host-sized value 2015-10-23 00:15:08 -07:00
Nguyen Anh Quynh
84e3b5c897 cast all the values to write to registers in uc_reg_write() to unsigned type. this fixes issue #98 2015-09-04 11:17:08 +08:00
Jonathon Reinhart
2c802a3e4b Merge remote-tracking branch 'upstream/master' into change-handle-based-api 
# Conflicts:
#	qemu/target-i386/unicorn.c
 2015-09-01 13:17:03 -04:00
Nguyen Anh Quynh
90fc201f8d x86: enable bunch of instructions via CPUID. this fixes issue #91 2015-09-02 00:16:45 +08:00
Jonathon Reinhart
b57662e43d change uch to uc_struct (target-i386) 2015-08-26 09:02:16 -04:00
Nguyen Anh Quynh
2fac7fc2e4 x86: better support for 16bit mode 2015-08-26 00:39:46 +08:00
Jonathon Reinhart
9163bba812 restore mode of .[ch] files 
These were marked as executable in 5c3b6819, likely due to a Windows
filesystem being involved. This can be avoided:
http://stackoverflow.com/q/1580596/119527
 2015-08-24 21:19:12 -04:00
Chris Eagle
5c3b681945 Add const to uc_reg_write and derivitives 2015-08-24 09:42:50 -07:00
Nguyen Anh Quynh
9d9c0d1a25 uc_emu_start() report error on illegal instruction at the output 2015-08-25 00:02:31 +08:00
mothran
a167f7c456 renames the register constants so unicorn and capstone can compile together 2015-08-23 21:36:33 -07:00
Nguyen Anh Quynh
7ca9a07e1b x86: enable SSE. this fixes issue #3 2015-08-23 10:41:14 +08:00
Nguyen Anh Quynh
344d016104 import 2015-08-21 15:04:50 +08:00