Merge pull request #34 from cseagle/master
Add const to uc_reg_write and derivitives
This commit is contained in:
commit
fc6712ee02
6
include/uc_priv.h
Normal file → Executable file
6
include/uc_priv.h
Normal file → Executable file
@ -24,7 +24,8 @@ typedef struct ModuleEntry {
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typedef QTAILQ_HEAD(, ModuleEntry) ModuleTypeList;
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// return 0 on success, -1 on failure
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typedef int (*reg_access_t)(uch handle, unsigned int regid, void *value);
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typedef int (*reg_read_t)(uch handle, unsigned int regid, void *value);
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typedef int (*reg_write_t)(uch handle, unsigned int regid, const void *value);
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typedef void (*reg_reset_t)(uch handle);
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@ -70,7 +71,8 @@ struct uc_struct {
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struct CPUTailQ cpus; // qemu/cpu-exec.c
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uc_err errnum; // qemu/cpu-exec.c
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AddressSpace as;
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reg_access_t reg_read, reg_write;
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reg_read_t reg_read;
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reg_write_t reg_write;
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reg_reset_t reg_reset;
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uc_write_mem_t write_mem;
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2
include/unicorn/unicorn.h
Normal file → Executable file
2
include/unicorn/unicorn.h
Normal file → Executable file
@ -274,7 +274,7 @@ const char *uc_strerror(uc_err code);
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for detailed error).
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*/
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UNICORN_EXPORT
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uc_err uc_reg_write(uch handle, int regid, void *value);
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uc_err uc_reg_write(uch handle, int regid, const void *value);
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/*
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Read register value.
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4
qemu/target-arm/unicorn.h
Normal file → Executable file
4
qemu/target-arm/unicorn.h
Normal file → Executable file
@ -6,9 +6,9 @@
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// functions to read & write registers
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int arm_reg_read(uch handle, unsigned int regid, void *value);
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int arm_reg_write(uch handle, unsigned int regid, void *value);
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int arm_reg_write(uch handle, unsigned int regid, const void *value);
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int arm64_reg_read(uch handle, unsigned int regid, void *value);
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int arm64_reg_write(uch handle, unsigned int regid, void *value);
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int arm64_reg_write(uch handle, unsigned int regid, const void *value);
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void arm_reg_reset(uch handle);
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void arm64_reg_reset(uch handle);
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2
qemu/target-arm/unicorn_aarch64.c
Normal file → Executable file
2
qemu/target-arm/unicorn_aarch64.c
Normal file → Executable file
@ -68,7 +68,7 @@ int arm64_reg_read(uch handle, unsigned int regid, void *value)
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#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
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#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
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int arm64_reg_write(uch handle, unsigned int regid, void *value)
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int arm64_reg_write(uch handle, unsigned int regid, const void *value)
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{
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CPUState *mycpu;
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struct uc_struct *uc = (struct uc_struct *) handle;
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2
qemu/target-arm/unicorn_arm.c
Normal file → Executable file
2
qemu/target-arm/unicorn_arm.c
Normal file → Executable file
@ -78,7 +78,7 @@ int arm_reg_read(uch handle, unsigned int regid, void *value)
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#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
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#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
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int arm_reg_write(uch handle, unsigned int regid, void *value)
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int arm_reg_write(uch handle, unsigned int regid, const void *value)
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{
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CPUState *mycpu;
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struct uc_struct *uc = (struct uc_struct *) handle;
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2
qemu/target-i386/unicorn.c
Normal file → Executable file
2
qemu/target-i386/unicorn.c
Normal file → Executable file
@ -536,7 +536,7 @@ int x86_reg_read(uch handle, unsigned int regid, void *value)
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#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
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#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
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int x86_reg_write(uch handle, unsigned int regid, void *value)
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int x86_reg_write(uch handle, unsigned int regid, const void *value)
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{
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CPUState *mycpu;
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struct uc_struct *uc = (struct uc_struct *) handle;
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2
qemu/target-i386/unicorn.h
Normal file → Executable file
2
qemu/target-i386/unicorn.h
Normal file → Executable file
@ -6,7 +6,7 @@
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// functions to read & write registers
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int x86_reg_read(uch handle, unsigned int regid, void *value);
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int x86_reg_write(uch handle, unsigned int regid, void *value);
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int x86_reg_write(uch handle, unsigned int regid, const void *value);
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void x86_reg_reset(uch handle);
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2
qemu/target-m68k/unicorn.c
Normal file → Executable file
2
qemu/target-m68k/unicorn.c
Normal file → Executable file
@ -60,7 +60,7 @@ int m68k_reg_read(uch handle, unsigned int regid, void *value)
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#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
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#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
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int m68k_reg_write(uch handle, unsigned int regid, void *value)
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int m68k_reg_write(uch handle, unsigned int regid, const void *value)
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{
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struct uc_struct *uc = (struct uc_struct *) handle;
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CPUState *mycpu = first_cpu;
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2
qemu/target-m68k/unicorn.h
Normal file → Executable file
2
qemu/target-m68k/unicorn.h
Normal file → Executable file
@ -6,7 +6,7 @@
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// functions to read & write registers
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int m68k_reg_read(uch handle, unsigned int regid, void *value);
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int m68k_reg_write(uch handle, unsigned int regid, void *value);
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int m68k_reg_write(uch handle, unsigned int regid, const void *value);
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void m68k_reg_reset(uch handle);
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2
qemu/target-mips/unicorn.c
Normal file → Executable file
2
qemu/target-mips/unicorn.c
Normal file → Executable file
@ -57,7 +57,7 @@ int mips_reg_read(uch handle, unsigned int regid, void *value)
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#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
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#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
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int mips_reg_write(uch handle, unsigned int regid, void *value)
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int mips_reg_write(uch handle, unsigned int regid, const void *value)
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{
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struct uc_struct *uc = (struct uc_struct *) handle;
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CPUState *mycpu = first_cpu;
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2
qemu/target-mips/unicorn.h
Normal file → Executable file
2
qemu/target-mips/unicorn.h
Normal file → Executable file
@ -6,7 +6,7 @@
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// functions to read & write registers
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int mips_reg_read(uch handle, unsigned int regid, void *value);
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int mips_reg_write(uch handle, unsigned int regid, void *value);
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int mips_reg_write(uch handle, unsigned int regid, const void *value);
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void mips_reg_reset(uch handle);
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2
qemu/target-sparc/unicorn.c
Normal file → Executable file
2
qemu/target-sparc/unicorn.c
Normal file → Executable file
@ -71,7 +71,7 @@ int sparc_reg_read(uch handle, unsigned int regid, void *value)
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#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
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#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
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int sparc_reg_write(uch handle, unsigned int regid, void *value)
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int sparc_reg_write(uch handle, unsigned int regid, const void *value)
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{
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struct uc_struct *uc = (struct uc_struct *) handle;
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CPUState *mycpu = first_cpu;
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2
qemu/target-sparc/unicorn.h
Normal file → Executable file
2
qemu/target-sparc/unicorn.h
Normal file → Executable file
@ -6,7 +6,7 @@
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// functions to read & write registers
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int sparc_reg_read(uch handle, unsigned int regid, void *value);
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int sparc_reg_write(uch handle, unsigned int regid, void *value);
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int sparc_reg_write(uch handle, unsigned int regid, const void *value);
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void sparc_reg_reset(uch handle);
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2
qemu/target-sparc/unicorn64.c
Normal file → Executable file
2
qemu/target-sparc/unicorn64.c
Normal file → Executable file
@ -54,7 +54,7 @@ int sparc_reg_read(uch handle, unsigned int regid, void *value)
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#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
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#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
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int sparc_reg_write(uch handle, unsigned int regid, void *value)
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int sparc_reg_write(uch handle, unsigned int regid, const void *value)
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{
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struct uc_struct *uc = (struct uc_struct *) handle;
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CPUState *mycpu = first_cpu;
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