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x86: support read/write to ST registers

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This commit is contained in:
Nguyen Anh Quynh 2020-05-11 00:24:58 +08:00
parent cf3451c37a
commit f988a41369
1 changed files with 28 additions and 0 deletions
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28
qemu/target-i386/unicorn.c
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@ -11,6 +11,8 @@
#include <unicorn/x86.h> /* needed for uc_x86_mmr */
#include "uc_priv.h"
#define FPST(n) (X86_CPU(uc, mycpu)->env.fpregs[(X86_CPU(uc, mycpu)->env.fpstt + (n)) & 7].d)
#define X86_NON_CS_FLAGS (DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | DESC_A_MASK)
static void load_seg_16_helper(CPUX86State *env, int seg, uint32_t selector)
{
@ -291,6 +293,19 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
dst[1] = reg->_d[1];
continue;
}
case UC_X86_REG_ST0:
case UC_X86_REG_ST1:
case UC_X86_REG_ST2:
case UC_X86_REG_ST3:
case UC_X86_REG_ST4:
case UC_X86_REG_ST5:
case UC_X86_REG_ST6:
case UC_X86_REG_ST7:
{
// value must be big enough to keep 80 bits (10 bytes)
memcpy(value, &FPST(regid - UC_X86_REG_ST0), 10);
continue;
}
case UC_X86_REG_YMM0:
case UC_X86_REG_YMM1:
case UC_X86_REG_YMM2:
@ -872,6 +887,19 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i
reg->_d[1] = src[1];
continue;
}
case UC_X86_REG_ST0:
case UC_X86_REG_ST1:
case UC_X86_REG_ST2:
case UC_X86_REG_ST3:
case UC_X86_REG_ST4:
case UC_X86_REG_ST5:
case UC_X86_REG_ST6:
case UC_X86_REG_ST7:
{
// value must be big enough to keep 80 bits (10 bytes)
memcpy(&FPST(regid - UC_X86_REG_ST0), value, 10);
continue;
}
case UC_X86_REG_YMM0:
case UC_X86_REG_YMM1:
case UC_X86_REG_YMM2: