diff --git a/qemu/target-ppc/Makefile.objs b/qemu/target-ppc/Makefile.objs
index ed3f91c6..a41c7177 100644
--- a/qemu/target-ppc/Makefile.objs
+++ b/qemu/target-ppc/Makefile.objs
@@ -1,8 +1,6 @@
obj-y += cpu-models.o
-ifeq ($(CONFIG_SOFTMMU),y)
obj-y += mmu_helper.o mmu-hash32.o
obj-$(TARGET_PPC64) += mmu-hash64.o
-endif
obj-y += dfp_helper.o
obj-y += excp_helper.o
obj-y += fpu_helper.o
@@ -10,8 +8,6 @@ obj-y += int_helper.o
obj-y += timebase_helper.o
obj-y += misc_helper.o
obj-y += mem_helper.o
-obj-$(CONFIG_USER_ONLY) += user_only_helper.o
-#obj-y += gdbstub.o
obj-y += translate.o
obj-y += unicorn.o
diff --git a/qemu/target-ppc/gdbstub.c b/qemu/target-ppc/gdbstub.c
deleted file mode 100644
index 786e1600..00000000
--- a/qemu/target-ppc/gdbstub.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/*
- * PowerPC gdb server stub
- *
- * Copyright (c) 2003-2005 Fabrice Bellard
- * Copyright (c) 2013 SUSE LINUX Products GmbH
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, see .
- */
-#include "config.h"
-#include "qemu-common.h"
-#include "exec/gdbstub.h"
-
-static int ppc_gdb_register_len_apple(int n)
-{
- switch (n) {
- case 0 ... 31:
- /* gprs */
- return 8;
- case 32 ... 63:
- /* fprs */
- return 8;
- case 64 ... 95:
- return 16;
- case 64+32: /* nip */
- case 65+32: /* msr */
- case 67+32: /* lr */
- case 68+32: /* ctr */
- case 69+32: /* xer */
- case 70+32: /* fpscr */
- return 8;
- case 66+32: /* cr */
- return 4;
- default:
- return 0;
- }
-}
-
-static int ppc_gdb_register_len(int n)
-{
- switch (n) {
- case 0 ... 31:
- /* gprs */
- return sizeof(target_ulong);
- case 32 ... 63:
- /* fprs */
- if (gdb_has_xml) {
- return 0;
- }
- return 8;
- case 66:
- /* cr */
- return 4;
- case 64:
- /* nip */
- case 65:
- /* msr */
- case 67:
- /* lr */
- case 68:
- /* ctr */
- case 69:
- /* xer */
- return sizeof(target_ulong);
- case 70:
- /* fpscr */
- if (gdb_has_xml) {
- return 0;
- }
- return sizeof(target_ulong);
- default:
- return 0;
- }
-}
-
-/* We need to present the registers to gdb in the "current" memory ordering.
- For user-only mode we get this for free; TARGET_WORDS_BIGENDIAN is set to
- the proper ordering for the binary, and cannot be changed.
- For system mode, TARGET_WORDS_BIGENDIAN is always set, and we must check
- the current mode of the chip to see if we're running in little-endian. */
-static void maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len)
-{
-#ifndef CONFIG_USER_ONLY
- if (!msr_le) {
- /* do nothing */
- } else if (len == 4) {
- bswap32s((uint32_t *)mem_buf);
- } else if (len == 8) {
- bswap64s((uint64_t *)mem_buf);
- } else {
- g_assert_not_reached();
- }
-#endif
-}
-
-/* Old gdb always expects FP registers. Newer (xml-aware) gdb only
- * expects whatever the target description contains. Due to a
- * historical mishap the FP registers appear in between core integer
- * regs and PC, MSR, CR, and so forth. We hack round this by giving the
- * FP regs zero size when talking to a newer gdb.
- */
-
-int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
-{
- PowerPCCPU *cpu = POWERPC_CPU(cs->uc, cs);
- CPUPPCState *env = &cpu->env;
- int r = ppc_gdb_register_len(n);
-
- if (!r) {
- return r;
- }
-
- if (n < 32) {
- /* gprs */
- gdb_get_regl(mem_buf, env->gpr[n]);
- } else if (n < 64) {
- /* fprs */
- stfq_p(mem_buf, env->fpr[n-32]);
- } else {
- switch (n) {
- case 64:
- gdb_get_regl(mem_buf, env->nip);
- break;
- case 65:
- gdb_get_regl(mem_buf, env->msr);
- break;
- case 66:
- {
- uint32_t cr = 0;
- int i;
- for (i = 0; i < 8; i++) {
- cr |= env->crf[i] << (32 - ((i + 1) * 4));
- }
- gdb_get_reg32(mem_buf, cr);
- break;
- }
- case 67:
- gdb_get_regl(mem_buf, env->lr);
- break;
- case 68:
- gdb_get_regl(mem_buf, env->ctr);
- break;
- case 69:
- gdb_get_regl(mem_buf, env->xer);
- break;
- case 70:
- gdb_get_reg32(mem_buf, env->fpscr);
- break;
- }
- }
- maybe_bswap_register(env, mem_buf, r);
- return r;
-}
-
-int ppc_cpu_gdb_read_register_apple(CPUState *cs, uint8_t *mem_buf, int n)
-{
- PowerPCCPU *cpu = POWERPC_CPU(cs->uc, cs);
- CPUPPCState *env = &cpu->env;
- int r = ppc_gdb_register_len_apple(n);
-
- if (!r) {
- return r;
- }
-
- if (n < 32) {
- /* gprs */
- gdb_get_reg64(mem_buf, env->gpr[n]);
- } else if (n < 64) {
- /* fprs */
- stfq_p(mem_buf, env->fpr[n-32]);
- } else if (n < 96) {
- /* Altivec */
- stq_p(mem_buf, n - 64);
- stq_p(mem_buf + 8, 0);
- } else {
- switch (n) {
- case 64 + 32:
- gdb_get_reg64(mem_buf, env->nip);
- break;
- case 65 + 32:
- gdb_get_reg64(mem_buf, env->msr);
- break;
- case 66 + 32:
- {
- uint32_t cr = 0;
- int i;
- for (i = 0; i < 8; i++) {
- cr |= env->crf[i] << (32 - ((i + 1) * 4));
- }
- gdb_get_reg32(mem_buf, cr);
- break;
- }
- case 67 + 32:
- gdb_get_reg64(mem_buf, env->lr);
- break;
- case 68 + 32:
- gdb_get_reg64(mem_buf, env->ctr);
- break;
- case 69 + 32:
- gdb_get_reg64(mem_buf, env->xer);
- break;
- case 70 + 32:
- gdb_get_reg64(mem_buf, env->fpscr);
- break;
- }
- }
- maybe_bswap_register(env, mem_buf, r);
- return r;
-}
-
-int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
-{
- PowerPCCPU *cpu = POWERPC_CPU(cs->uc, cs);
- CPUPPCState *env = &cpu->env;
- int r = ppc_gdb_register_len(n);
-
- if (!r) {
- return r;
- }
- maybe_bswap_register(env, mem_buf, r);
- if (n < 32) {
- /* gprs */
- env->gpr[n] = ldtul_p(mem_buf);
- } else if (n < 64) {
- /* fprs */
- env->fpr[n-32] = ldfq_p(mem_buf);
- } else {
- switch (n) {
- case 64:
- env->nip = ldtul_p(mem_buf);
- break;
- case 65:
- ppc_store_msr(env, ldtul_p(mem_buf));
- break;
- case 66:
- {
- uint32_t cr = ldl_p(mem_buf);
- int i;
- for (i = 0; i < 8; i++) {
- env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
- }
- break;
- }
- case 67:
- env->lr = ldtul_p(mem_buf);
- break;
- case 68:
- env->ctr = ldtul_p(mem_buf);
- break;
- case 69:
- env->xer = ldtul_p(mem_buf);
- break;
- case 70:
- /* fpscr */
- store_fpscr(env, ldtul_p(mem_buf), 0xffffffff);
- break;
- }
- }
- return r;
-}
-int ppc_cpu_gdb_write_register_apple(CPUState *cs, uint8_t *mem_buf, int n)
-{
- PowerPCCPU *cpu = POWERPC_CPU(cs->uc, cs);
- CPUPPCState *env = &cpu->env;
- int r = ppc_gdb_register_len_apple(n);
-
- if (!r) {
- return r;
- }
- maybe_bswap_register(env, mem_buf, r);
- if (n < 32) {
- /* gprs */
- env->gpr[n] = ldq_p(mem_buf);
- } else if (n < 64) {
- /* fprs */
- env->fpr[n-32] = ldfq_p(mem_buf);
- } else {
- switch (n) {
- case 64 + 32:
- env->nip = ldq_p(mem_buf);
- break;
- case 65 + 32:
- ppc_store_msr(env, ldq_p(mem_buf));
- break;
- case 66 + 32:
- {
- uint32_t cr = ldl_p(mem_buf);
- int i;
- for (i = 0; i < 8; i++) {
- env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
- }
- break;
- }
- case 67 + 32:
- env->lr = ldq_p(mem_buf);
- break;
- case 68 + 32:
- env->ctr = ldq_p(mem_buf);
- break;
- case 69 + 32:
- env->xer = ldq_p(mem_buf);
- break;
- case 70 + 32:
- /* fpscr */
- store_fpscr(env, ldq_p(mem_buf), 0xffffffff);
- break;
- }
- }
- return r;
-}
diff --git a/qemu/target-ppc/machine.c b/qemu/target-ppc/machine.c
deleted file mode 100644
index c801b822..00000000
--- a/qemu/target-ppc/machine.c
+++ /dev/null
@@ -1,564 +0,0 @@
-#include "hw/hw.h"
-#include "hw/boards.h"
-#include "sysemu/kvm.h"
-#include "helper_regs.h"
-
-static int cpu_load_old(QEMUFile *f, void *opaque, int version_id)
-{
- PowerPCCPU *cpu = opaque;
- CPUPPCState *env = &cpu->env;
- unsigned int i, j;
- target_ulong sdr1;
- uint32_t fpscr;
- target_ulong xer;
-
- for (i = 0; i < 32; i++)
- qemu_get_betls(f, &env->gpr[i]);
-#if !defined(TARGET_PPC64)
- for (i = 0; i < 32; i++)
- qemu_get_betls(f, &env->gprh[i]);
-#endif
- qemu_get_betls(f, &env->lr);
- qemu_get_betls(f, &env->ctr);
- for (i = 0; i < 8; i++)
- qemu_get_be32s(f, &env->crf[i]);
- qemu_get_betls(f, &xer);
- cpu_write_xer(env, xer);
- qemu_get_betls(f, &env->reserve_addr);
- qemu_get_betls(f, &env->msr);
- for (i = 0; i < 4; i++)
- qemu_get_betls(f, &env->tgpr[i]);
- for (i = 0; i < 32; i++) {
- union {
- float64 d;
- uint64_t l;
- } u;
- u.l = qemu_get_be64(f);
- env->fpr[i] = u.d;
- }
- qemu_get_be32s(f, &fpscr);
- env->fpscr = fpscr;
- qemu_get_sbe32s(f, &env->access_type);
-#if defined(TARGET_PPC64)
- qemu_get_betls(f, &env->spr[SPR_ASR]);
- qemu_get_sbe32s(f, &env->slb_nr);
-#endif
- qemu_get_betls(f, &sdr1);
- for (i = 0; i < 32; i++)
- qemu_get_betls(f, &env->sr[i]);
- for (i = 0; i < 2; i++)
- for (j = 0; j < 8; j++)
- qemu_get_betls(f, &env->DBAT[i][j]);
- for (i = 0; i < 2; i++)
- for (j = 0; j < 8; j++)
- qemu_get_betls(f, &env->IBAT[i][j]);
- qemu_get_sbe32s(f, &env->nb_tlb);
- qemu_get_sbe32s(f, &env->tlb_per_way);
- qemu_get_sbe32s(f, &env->nb_ways);
- qemu_get_sbe32s(f, &env->last_way);
- qemu_get_sbe32s(f, &env->id_tlbs);
- qemu_get_sbe32s(f, &env->nb_pids);
- if (env->tlb.tlb6) {
- // XXX assumes 6xx
- for (i = 0; i < env->nb_tlb; i++) {
- qemu_get_betls(f, &env->tlb.tlb6[i].pte0);
- qemu_get_betls(f, &env->tlb.tlb6[i].pte1);
- qemu_get_betls(f, &env->tlb.tlb6[i].EPN);
- }
- }
- for (i = 0; i < 4; i++)
- qemu_get_betls(f, &env->pb[i]);
- for (i = 0; i < 1024; i++)
- qemu_get_betls(f, &env->spr[i]);
- if (!env->external_htab) {
- ppc_store_sdr1(env, sdr1);
- }
- qemu_get_be32s(f, &env->vscr);
- qemu_get_be64s(f, &env->spe_acc);
- qemu_get_be32s(f, &env->spe_fscr);
- qemu_get_betls(f, &env->msr_mask);
- qemu_get_be32s(f, &env->flags);
- qemu_get_sbe32s(f, &env->error_code);
- qemu_get_be32s(f, &env->pending_interrupts);
- qemu_get_be32s(f, &env->irq_input_state);
- for (i = 0; i < POWERPC_EXCP_NB; i++)
- qemu_get_betls(f, &env->excp_vectors[i]);
- qemu_get_betls(f, &env->excp_prefix);
- qemu_get_betls(f, &env->ivor_mask);
- qemu_get_betls(f, &env->ivpr_mask);
- qemu_get_betls(f, &env->hreset_vector);
- qemu_get_betls(f, &env->nip);
- qemu_get_betls(f, &env->hflags);
- qemu_get_betls(f, &env->hflags_nmsr);
- qemu_get_sbe32s(f, &env->mmu_idx);
- qemu_get_sbe32(f); /* Discard unused power_mode */
-
- return 0;
-}
-
-static int get_avr(QEMUFile *f, void *pv, size_t size)
-{
- ppc_avr_t *v = pv;
-
- v->u64[0] = qemu_get_be64(f);
- v->u64[1] = qemu_get_be64(f);
-
- return 0;
-}
-
-static void put_avr(QEMUFile *f, void *pv, size_t size)
-{
- ppc_avr_t *v = pv;
-
- qemu_put_be64(f, v->u64[0]);
- qemu_put_be64(f, v->u64[1]);
-}
-
-static const VMStateInfo vmstate_info_avr = {
- .name = "avr",
- .get = get_avr,
- .put = put_avr,
-};
-
-#define VMSTATE_AVR_ARRAY_V(_f, _s, _n, _v) \
- VMSTATE_ARRAY(_f, _s, _n, _v, vmstate_info_avr, ppc_avr_t)
-
-#define VMSTATE_AVR_ARRAY(_f, _s, _n) \
- VMSTATE_AVR_ARRAY_V(_f, _s, _n, 0)
-
-static void cpu_pre_save(void *opaque)
-{
- PowerPCCPU *cpu = opaque;
- CPUPPCState *env = &cpu->env;
- int i;
-
- env->spr[SPR_LR] = env->lr;
- env->spr[SPR_CTR] = env->ctr;
- env->spr[SPR_XER] = env->xer;
-#if defined(TARGET_PPC64)
- env->spr[SPR_CFAR] = env->cfar;
-#endif
- env->spr[SPR_BOOKE_SPEFSCR] = env->spe_fscr;
-
- for (i = 0; (i < 4) && (i < env->nb_BATs); i++) {
- env->spr[SPR_DBAT0U + 2*i] = env->DBAT[0][i];
- env->spr[SPR_DBAT0U + 2*i + 1] = env->DBAT[1][i];
- env->spr[SPR_IBAT0U + 2*i] = env->IBAT[0][i];
- env->spr[SPR_IBAT0U + 2*i + 1] = env->IBAT[1][i];
- }
- for (i = 0; (i < 4) && ((i+4) < env->nb_BATs); i++) {
- env->spr[SPR_DBAT4U + 2*i] = env->DBAT[0][i+4];
- env->spr[SPR_DBAT4U + 2*i + 1] = env->DBAT[1][i+4];
- env->spr[SPR_IBAT4U + 2*i] = env->IBAT[0][i+4];
- env->spr[SPR_IBAT4U + 2*i + 1] = env->IBAT[1][i+4];
- }
-}
-
-static int cpu_post_load(void *opaque, int version_id)
-{
- PowerPCCPU *cpu = opaque;
- CPUPPCState *env = &cpu->env;
- int i;
-
- /*
- * We always ignore the source PVR. The user or management
- * software has to take care of running QEMU in a compatible mode.
- */
- env->spr[SPR_PVR] = env->spr_cb[SPR_PVR].default_value;
- env->lr = env->spr[SPR_LR];
- env->ctr = env->spr[SPR_CTR];
- env->xer = env->spr[SPR_XER];
-#if defined(TARGET_PPC64)
- env->cfar = env->spr[SPR_CFAR];
-#endif
- env->spe_fscr = env->spr[SPR_BOOKE_SPEFSCR];
-
- for (i = 0; (i < 4) && (i < env->nb_BATs); i++) {
- env->DBAT[0][i] = env->spr[SPR_DBAT0U + 2*i];
- env->DBAT[1][i] = env->spr[SPR_DBAT0U + 2*i + 1];
- env->IBAT[0][i] = env->spr[SPR_IBAT0U + 2*i];
- env->IBAT[1][i] = env->spr[SPR_IBAT0U + 2*i + 1];
- }
- for (i = 0; (i < 4) && ((i+4) < env->nb_BATs); i++) {
- env->DBAT[0][i+4] = env->spr[SPR_DBAT4U + 2*i];
- env->DBAT[1][i+4] = env->spr[SPR_DBAT4U + 2*i + 1];
- env->IBAT[0][i+4] = env->spr[SPR_IBAT4U + 2*i];
- env->IBAT[1][i+4] = env->spr[SPR_IBAT4U + 2*i + 1];
- }
-
- if (!env->external_htab) {
- /* Restore htab_base and htab_mask variables */
- ppc_store_sdr1(env, env->spr[SPR_SDR1]);
- }
- hreg_compute_hflags(env);
- hreg_compute_mem_idx(env);
-
- return 0;
-}
-
-static bool fpu_needed(void *opaque)
-{
- PowerPCCPU *cpu = opaque;
-
- return (cpu->env.insns_flags & PPC_FLOAT);
-}
-
-static const VMStateDescription vmstate_fpu = {
- .name = "cpu/fpu",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (VMStateField[]) {
- VMSTATE_FLOAT64_ARRAY(env.fpr, PowerPCCPU, 32),
- VMSTATE_UINTTL(env.fpscr, PowerPCCPU),
- VMSTATE_END_OF_LIST()
- },
-};
-
-static bool altivec_needed(void *opaque)
-{
- PowerPCCPU *cpu = opaque;
-
- return (cpu->env.insns_flags & PPC_ALTIVEC);
-}
-
-static const VMStateDescription vmstate_altivec = {
- .name = "cpu/altivec",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (VMStateField[]) {
- VMSTATE_AVR_ARRAY(env.avr, PowerPCCPU, 32),
- VMSTATE_UINT32(env.vscr, PowerPCCPU),
- VMSTATE_END_OF_LIST()
- },
-};
-
-static bool vsx_needed(void *opaque)
-{
- PowerPCCPU *cpu = opaque;
-
- return (cpu->env.insns_flags2 & PPC2_VSX);
-}
-
-static const VMStateDescription vmstate_vsx = {
- .name = "cpu/vsx",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (VMStateField[]) {
- VMSTATE_UINT64_ARRAY(env.vsr, PowerPCCPU, 32),
- VMSTATE_END_OF_LIST()
- },
-};
-
-#ifdef TARGET_PPC64
-/* Transactional memory state */
-static bool tm_needed(void *opaque)
-{
- PowerPCCPU *cpu = opaque;
- CPUPPCState *env = &cpu->env;
- return msr_ts;
-}
-
-static const VMStateDescription vmstate_tm = {
- .name = "cpu/tm",
- .version_id = 1,
- .minimum_version_id = 1,
- .minimum_version_id_old = 1,
- .fields = (VMStateField []) {
- VMSTATE_UINTTL_ARRAY(env.tm_gpr, PowerPCCPU, 32),
- VMSTATE_AVR_ARRAY(env.tm_vsr, PowerPCCPU, 64),
- VMSTATE_UINT64(env.tm_cr, PowerPCCPU),
- VMSTATE_UINT64(env.tm_lr, PowerPCCPU),
- VMSTATE_UINT64(env.tm_ctr, PowerPCCPU),
- VMSTATE_UINT64(env.tm_fpscr, PowerPCCPU),
- VMSTATE_UINT64(env.tm_amr, PowerPCCPU),
- VMSTATE_UINT64(env.tm_ppr, PowerPCCPU),
- VMSTATE_UINT64(env.tm_vrsave, PowerPCCPU),
- VMSTATE_UINT32(env.tm_vscr, PowerPCCPU),
- VMSTATE_UINT64(env.tm_dscr, PowerPCCPU),
- VMSTATE_UINT64(env.tm_tar, PowerPCCPU),
- VMSTATE_END_OF_LIST()
- },
-};
-#endif
-
-static bool sr_needed(void *opaque)
-{
-#ifdef TARGET_PPC64
- PowerPCCPU *cpu = opaque;
-
- return !(cpu->env.mmu_model & POWERPC_MMU_64);
-#else
- return true;
-#endif
-}
-
-static const VMStateDescription vmstate_sr = {
- .name = "cpu/sr",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (VMStateField[]) {
- VMSTATE_UINTTL_ARRAY(env.sr, PowerPCCPU, 32),
- VMSTATE_END_OF_LIST()
- },
-};
-
-#ifdef TARGET_PPC64
-static int get_slbe(QEMUFile *f, void *pv, size_t size)
-{
- ppc_slb_t *v = pv;
-
- v->esid = qemu_get_be64(f);
- v->vsid = qemu_get_be64(f);
-
- return 0;
-}
-
-static void put_slbe(QEMUFile *f, void *pv, size_t size)
-{
- ppc_slb_t *v = pv;
-
- qemu_put_be64(f, v->esid);
- qemu_put_be64(f, v->vsid);
-}
-
-static const VMStateInfo vmstate_info_slbe = {
- .name = "slbe",
- .get = get_slbe,
- .put = put_slbe,
-};
-
-#define VMSTATE_SLB_ARRAY_V(_f, _s, _n, _v) \
- VMSTATE_ARRAY(_f, _s, _n, _v, vmstate_info_slbe, ppc_slb_t)
-
-#define VMSTATE_SLB_ARRAY(_f, _s, _n) \
- VMSTATE_SLB_ARRAY_V(_f, _s, _n, 0)
-
-static bool slb_needed(void *opaque)
-{
- PowerPCCPU *cpu = opaque;
-
- /* We don't support any of the old segment table based 64-bit CPUs */
- return (cpu->env.mmu_model & POWERPC_MMU_64);
-}
-
-static const VMStateDescription vmstate_slb = {
- .name = "cpu/slb",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (VMStateField[]) {
- VMSTATE_INT32_EQUAL(env.slb_nr, PowerPCCPU),
- VMSTATE_SLB_ARRAY(env.slb, PowerPCCPU, MAX_SLB_ENTRIES),
- VMSTATE_END_OF_LIST()
- }
-};
-#endif /* TARGET_PPC64 */
-
-static const VMStateDescription vmstate_tlb6xx_entry = {
- .name = "cpu/tlb6xx_entry",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (VMStateField[]) {
- VMSTATE_UINTTL(pte0, ppc6xx_tlb_t),
- VMSTATE_UINTTL(pte1, ppc6xx_tlb_t),
- VMSTATE_UINTTL(EPN, ppc6xx_tlb_t),
- VMSTATE_END_OF_LIST()
- },
-};
-
-static bool tlb6xx_needed(void *opaque)
-{
- PowerPCCPU *cpu = opaque;
- CPUPPCState *env = &cpu->env;
-
- return env->nb_tlb && (env->tlb_type == TLB_6XX);
-}
-
-static const VMStateDescription vmstate_tlb6xx = {
- .name = "cpu/tlb6xx",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (VMStateField[]) {
- VMSTATE_INT32_EQUAL(env.nb_tlb, PowerPCCPU),
- VMSTATE_STRUCT_VARRAY_POINTER_INT32(env.tlb.tlb6, PowerPCCPU,
- env.nb_tlb,
- vmstate_tlb6xx_entry,
- ppc6xx_tlb_t),
- VMSTATE_UINTTL_ARRAY(env.tgpr, PowerPCCPU, 4),
- VMSTATE_END_OF_LIST()
- }
-};
-
-static const VMStateDescription vmstate_tlbemb_entry = {
- .name = "cpu/tlbemb_entry",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (VMStateField[]) {
- VMSTATE_UINT64(RPN, ppcemb_tlb_t),
- VMSTATE_UINTTL(EPN, ppcemb_tlb_t),
- VMSTATE_UINTTL(PID, ppcemb_tlb_t),
- VMSTATE_UINTTL(size, ppcemb_tlb_t),
- VMSTATE_UINT32(prot, ppcemb_tlb_t),
- VMSTATE_UINT32(attr, ppcemb_tlb_t),
- VMSTATE_END_OF_LIST()
- },
-};
-
-static bool tlbemb_needed(void *opaque)
-{
- PowerPCCPU *cpu = opaque;
- CPUPPCState *env = &cpu->env;
-
- return env->nb_tlb && (env->tlb_type == TLB_EMB);
-}
-
-static bool pbr403_needed(void *opaque)
-{
- PowerPCCPU *cpu = opaque;
- uint32_t pvr = cpu->env.spr[SPR_PVR];
-
- return (pvr & 0xffff0000) == 0x00200000;
-}
-
-static const VMStateDescription vmstate_pbr403 = {
- .name = "cpu/pbr403",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (VMStateField[]) {
- VMSTATE_UINTTL_ARRAY(env.pb, PowerPCCPU, 4),
- VMSTATE_END_OF_LIST()
- },
-};
-
-static const VMStateDescription vmstate_tlbemb = {
- .name = "cpu/tlb6xx",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (VMStateField[]) {
- VMSTATE_INT32_EQUAL(env.nb_tlb, PowerPCCPU),
- VMSTATE_STRUCT_VARRAY_POINTER_INT32(env.tlb.tlbe, PowerPCCPU,
- env.nb_tlb,
- vmstate_tlbemb_entry,
- ppcemb_tlb_t),
- /* 403 protection registers */
- VMSTATE_END_OF_LIST()
- },
- .subsections = (VMStateSubsection []) {
- {
- .vmsd = &vmstate_pbr403,
- .needed = pbr403_needed,
- } , {
- /* empty */
- }
- }
-};
-
-static const VMStateDescription vmstate_tlbmas_entry = {
- .name = "cpu/tlbmas_entry",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (VMStateField[]) {
- VMSTATE_UINT32(mas8, ppcmas_tlb_t),
- VMSTATE_UINT32(mas1, ppcmas_tlb_t),
- VMSTATE_UINT64(mas2, ppcmas_tlb_t),
- VMSTATE_UINT64(mas7_3, ppcmas_tlb_t),
- VMSTATE_END_OF_LIST()
- },
-};
-
-static bool tlbmas_needed(void *opaque)
-{
- PowerPCCPU *cpu = opaque;
- CPUPPCState *env = &cpu->env;
-
- return env->nb_tlb && (env->tlb_type == TLB_MAS);
-}
-
-static const VMStateDescription vmstate_tlbmas = {
- .name = "cpu/tlbmas",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (VMStateField[]) {
- VMSTATE_INT32_EQUAL(env.nb_tlb, PowerPCCPU),
- VMSTATE_STRUCT_VARRAY_POINTER_INT32(env.tlb.tlbm, PowerPCCPU,
- env.nb_tlb,
- vmstate_tlbmas_entry,
- ppcmas_tlb_t),
- VMSTATE_END_OF_LIST()
- }
-};
-
-const VMStateDescription vmstate_ppc_cpu = {
- .name = "cpu",
- .version_id = 5,
- .minimum_version_id = 5,
- .minimum_version_id_old = 4,
- .load_state_old = cpu_load_old,
- .pre_save = cpu_pre_save,
- .post_load = cpu_post_load,
- .fields = (VMStateField[]) {
- VMSTATE_UNUSED(sizeof(target_ulong)), /* was _EQUAL(env.spr[SPR_PVR]) */
-
- /* User mode architected state */
- VMSTATE_UINTTL_ARRAY(env.gpr, PowerPCCPU, 32),
-#if !defined(TARGET_PPC64)
- VMSTATE_UINTTL_ARRAY(env.gprh, PowerPCCPU, 32),
-#endif
- VMSTATE_UINT32_ARRAY(env.crf, PowerPCCPU, 8),
- VMSTATE_UINTTL(env.nip, PowerPCCPU),
-
- /* SPRs */
- VMSTATE_UINTTL_ARRAY(env.spr, PowerPCCPU, 1024),
- VMSTATE_UINT64(env.spe_acc, PowerPCCPU),
-
- /* Reservation */
- VMSTATE_UINTTL(env.reserve_addr, PowerPCCPU),
-
- /* Supervisor mode architected state */
- VMSTATE_UINTTL(env.msr, PowerPCCPU),
-
- /* Internal state */
- VMSTATE_UINTTL(env.hflags_nmsr, PowerPCCPU),
- /* FIXME: access_type? */
-
- /* Sanity checking */
- VMSTATE_UINTTL_EQUAL(env.msr_mask, PowerPCCPU),
- VMSTATE_UINT64_EQUAL(env.insns_flags, PowerPCCPU),
- VMSTATE_UINT64_EQUAL(env.insns_flags2, PowerPCCPU),
- VMSTATE_UINT32_EQUAL(env.nb_BATs, PowerPCCPU),
- VMSTATE_END_OF_LIST()
- },
- .subsections = (VMStateSubsection []) {
- {
- .vmsd = &vmstate_fpu,
- .needed = fpu_needed,
- } , {
- .vmsd = &vmstate_altivec,
- .needed = altivec_needed,
- } , {
- .vmsd = &vmstate_vsx,
- .needed = vsx_needed,
- } , {
- .vmsd = &vmstate_sr,
- .needed = sr_needed,
- } , {
-#ifdef TARGET_PPC64
- .vmsd = &vmstate_tm,
- .needed = tm_needed,
- } , {
- .vmsd = &vmstate_slb,
- .needed = slb_needed,
- } , {
-#endif /* TARGET_PPC64 */
- .vmsd = &vmstate_tlb6xx,
- .needed = tlb6xx_needed,
- } , {
- .vmsd = &vmstate_tlbemb,
- .needed = tlbemb_needed,
- } , {
- .vmsd = &vmstate_tlbmas,
- .needed = tlbmas_needed,
- } , {
- /* empty */
- }
- }
-};
diff --git a/qemu/target-ppc/mfrom_table_gen.c b/qemu/target-ppc/mfrom_table_gen.c
deleted file mode 100644
index a140ded4..00000000
--- a/qemu/target-ppc/mfrom_table_gen.c
+++ /dev/null
@@ -1,33 +0,0 @@
-#define _GNU_SOURCE
-#include
-#include
-#include
-
-int main (void)
-{
- double d;
- uint8_t n;
- int i;
-
- printf("static const uint8_t mfrom_ROM_table[602] =\n{\n ");
- for (i = 0; i < 602; i++) {
- /* Extremely decomposed:
- * -T0 / 256
- * T0 = 256 * log10(10 + 1.0) + 0.5
- */
- d = -i;
- d /= 256.0;
- d = exp10(d);
- d += 1.0;
- d = log10(d);
- d *= 256;
- d += 0.5;
- n = d;
- printf("%3d, ", n);
- if ((i & 7) == 7)
- printf("\n ");
- }
- printf("\n};\n");
-
- return 0;
-}
diff --git a/qemu/target-ppc/user_only_helper.c b/qemu/target-ppc/user_only_helper.c
deleted file mode 100644
index 07f27418..00000000
--- a/qemu/target-ppc/user_only_helper.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * PowerPC MMU stub handling for user mode emulation
- *
- * Copyright (c) 2003-2007 Jocelyn Mayer
- * Copyright (c) 2013 David Gibson, IBM Corporation.
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, see .
- */
-
-#include "cpu.h"
-
-int ppc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
- int mmu_idx)
-{
- PowerPCCPU *cpu = POWERPC_CPU(cs->uc, cs);
- CPUPPCState *env = &cpu->env;
- int exception, error_code;
-
- if (rw == 2) {
- exception = POWERPC_EXCP_ISI;
- error_code = 0x40000000;
- } else {
- exception = POWERPC_EXCP_DSI;
- error_code = 0x40000000;
- if (rw) {
- error_code |= 0x02000000;
- }
- env->spr[SPR_DAR] = address;
- env->spr[SPR_DSISR] = error_code;
- }
- cs->exception_index = exception;
- env->error_code = error_code;
-
- return 1;
-}