From f4325f8c4e546f357bd8b2b747fc5d3d15ebb3b6 Mon Sep 17 00:00:00 2001 From: Nguyen Anh Quynh Date: Fri, 24 Feb 2017 21:51:01 +0800 Subject: [PATCH] bindings: update to support X86 MSR id --- bindings/dotnet/UnicornManaged/Const/X86.fs | 3 ++- bindings/go/unicorn/x86_const.go | 3 ++- bindings/java/unicorn/X86Const.java | 3 ++- bindings/python/unicorn/unicorn.py | 4 ++-- bindings/ruby/unicorn_gem/lib/unicorn/x86_const.rb | 3 ++- include/unicorn/x86.h | 7 ++++--- 6 files changed, 14 insertions(+), 9 deletions(-) diff --git a/bindings/dotnet/UnicornManaged/Const/X86.fs b/bindings/dotnet/UnicornManaged/Const/X86.fs index d0526f87..2dc3f61f 100644 --- a/bindings/dotnet/UnicornManaged/Const/X86.fs +++ b/bindings/dotnet/UnicornManaged/Const/X86.fs @@ -257,7 +257,8 @@ module X86 = let UC_X86_REG_TR = 245 let UC_X86_REG_FPCW = 246 let UC_X86_REG_FPTAG = 247 - let UC_X86_REG_ENDING = 248 + let UC_X86_REG_MSR = 248 + let UC_X86_REG_ENDING = 249 // X86 instructions diff --git a/bindings/go/unicorn/x86_const.go b/bindings/go/unicorn/x86_const.go index ef18c08e..bd47e3e2 100644 --- a/bindings/go/unicorn/x86_const.go +++ b/bindings/go/unicorn/x86_const.go @@ -252,7 +252,8 @@ const ( X86_REG_TR = 245 X86_REG_FPCW = 246 X86_REG_FPTAG = 247 - X86_REG_ENDING = 248 + X86_REG_MSR = 248 + X86_REG_ENDING = 249 // X86 instructions diff --git a/bindings/java/unicorn/X86Const.java b/bindings/java/unicorn/X86Const.java index 7afed1f9..c41ccfc9 100644 --- a/bindings/java/unicorn/X86Const.java +++ b/bindings/java/unicorn/X86Const.java @@ -254,7 +254,8 @@ public interface X86Const { public static final int UC_X86_REG_TR = 245; public static final int UC_X86_REG_FPCW = 246; public static final int UC_X86_REG_FPTAG = 247; - public static final int UC_X86_REG_ENDING = 248; + public static final int UC_X86_REG_MSR = 248; + public static final int UC_X86_REG_ENDING = 249; // X86 instructions diff --git a/bindings/python/unicorn/unicorn.py b/bindings/python/unicorn/unicorn.py index 7bd297b6..e2cb6a5d 100644 --- a/bindings/python/unicorn/unicorn.py +++ b/bindings/python/unicorn/unicorn.py @@ -357,11 +357,11 @@ class Uc(object): if status != uc.UC_ERR_OK: raise UcError(status) - # read from MSR + # read from MSR - X86 only def msr_read(self, msr_id): return self.reg_read(x86_const.UC_X86_REG_MSR, msr_id) - # write to MSR + # write to MSR - X86 only def msr_write(self, msr_id, value): return self.reg_write(x86_const.UC_X86_REG_MSR, (msr_id, value)) diff --git a/bindings/ruby/unicorn_gem/lib/unicorn/x86_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn/x86_const.rb index 2226de17..f85ae21a 100644 --- a/bindings/ruby/unicorn_gem/lib/unicorn/x86_const.rb +++ b/bindings/ruby/unicorn_gem/lib/unicorn/x86_const.rb @@ -252,7 +252,8 @@ module Unicorn UC_X86_REG_TR = 245 UC_X86_REG_FPCW = 246 UC_X86_REG_FPTAG = 247 - UC_X86_REG_ENDING = 248 + UC_X86_REG_MSR = 248 + UC_X86_REG_ENDING = 249 # X86 instructions diff --git a/include/unicorn/x86.h b/include/unicorn/x86.h index 59fd17e5..e4b1a3b2 100644 --- a/include/unicorn/x86.h +++ b/include/unicorn/x86.h @@ -22,8 +22,8 @@ typedef struct uc_x86_mmr { // Model-Specific Register structure, use this with UC_X86_REG_MSR (as the register ID) in // call to uc_reg_write/uc_reg_read() to manipulate MSRs. typedef struct uc_x86_msr { - uint32_t rid; - uint64_t value; + uint32_t rid; // MSR id + uint64_t value; // MSR value } uc_x86_msr; // Callback function for tracing SYSCALL/SYSENTER (for uc_hook_intr()) @@ -83,7 +83,8 @@ typedef enum uc_x86_reg { UC_X86_REG_R14D, UC_X86_REG_R15D, UC_X86_REG_R8W, UC_X86_REG_R9W, UC_X86_REG_R10W, UC_X86_REG_R11W, UC_X86_REG_R12W, UC_X86_REG_R13W, UC_X86_REG_R14W, UC_X86_REG_R15W, UC_X86_REG_IDTR, UC_X86_REG_GDTR, UC_X86_REG_LDTR, UC_X86_REG_TR, UC_X86_REG_FPCW, - UC_X86_REG_FPTAG, UC_X86_REG_MSR, + UC_X86_REG_FPTAG, + UC_X86_REG_MSR, // Model-Specific Register UC_X86_REG_ENDING // <-- mark the end of the list of registers } uc_x86_reg;