Merge branch 'master' into msvc2

ChangeLog

@@ -1,5 +1,23 @@
 This file details the changelog of Unicorn Engine.
 
+----------------------------------
+[Version 1.0.1]: April 20th, 2017
+
+- Properly handle selected-architecture build.
+- Fix compilation issues on PPC & S390x.
+- Fix a memory leak on uc_mem_protect().
+- ARM:
+    - Support big-endian mode.
+    - Correct instruction size of Thumb/Thumb2 code.
+    - Support read/write APSR register.
+- ARM64:
+    - Support read/write NEON registers.
+    - Support read/write NZCV registers.
+- Mips: Support read/write Mips64 registers.
+- X86: Support read/write MSR.
+- Haskell binding: update to the latest API.
+- Python: allow not having PATH setup.
+
 ----------------------------------
 [Version 1.0]: February 23rd, 2017
 

bindings/dotnet/UnicornManaged/Const/Common.fs

@@ -12,8 +12,7 @@ module Common =
     let UC_VERSION_MAJOR = 1
 
     let UC_VERSION_MINOR = 0
-
+    let UC_VERSION_EXTRA = 1
-    let UC_VERSION_EXTRA = 0
     let UC_SECOND_SCALE = 1000000
     let UC_MILISECOND_SCALE = 1000
     let UC_ARCH_ARM = 1

bindings/go/unicorn/unicorn_const.go

@@ -7,8 +7,7 @@ const (
 	VERSION_MAJOR = 1
 
 	VERSION_MINOR = 0
-
+	VERSION_EXTRA = 1
-	VERSION_EXTRA = 0
 	SECOND_SCALE = 1000000
 	MILISECOND_SCALE = 1000
 	ARCH_ARM = 1

bindings/java/unicorn/UnicornConst.java

@@ -9,8 +9,7 @@ public interface UnicornConst {
    public static final int UC_VERSION_MAJOR = 1;
 
    public static final int UC_VERSION_MINOR = 0;
-
+   public static final int UC_VERSION_EXTRA = 1;
-   public static final int UC_VERSION_EXTRA = 0;
    public static final int UC_SECOND_SCALE = 1000000;
    public static final int UC_MILISECOND_SCALE = 1000;
    public static final int UC_ARCH_ARM = 1;

bindings/python/unicorn/unicorn.py

@@ -82,7 +82,7 @@ _path_list = [pkg_resources.resource_filename(__name__, 'lib'),
               '',
               distutils.sysconfig.get_python_lib(),
               "/usr/local/lib/" if sys.platform == 'darwin' else '/usr/lib64',
-              os.environ['PATH']]
+              os.getenv('PATH', '')]
 
 #print(_path_list)
 #print("-" * 80)

bindings/python/unicorn/unicorn_const.py

@@ -5,8 +5,7 @@ UC_API_MINOR = 0
 UC_VERSION_MAJOR = 1
 
 UC_VERSION_MINOR = 0
-
+UC_VERSION_EXTRA = 1
-UC_VERSION_EXTRA = 0
 UC_SECOND_SCALE = 1000000
 UC_MILISECOND_SCALE = 1000
 UC_ARCH_ARM = 1

bindings/ruby/unicorn_gem/lib/unicorn/unicorn_const.rb

@@ -7,8 +7,7 @@ module Unicorn
 	UC_VERSION_MAJOR = 1
 
 	UC_VERSION_MINOR = 0
-
+	UC_VERSION_EXTRA = 1
-	UC_VERSION_EXTRA = 0
 	UC_SECOND_SCALE = 1000000
 	UC_MILISECOND_SCALE = 1000
 	UC_ARCH_ARM = 1

docs/COMPILE-WINDOWS.md

@@ -85,6 +85,9 @@ For each option, refer to docs/README for more details.
 [2] Compile from source on Windows - with MinGW (MSYS2)
 
 To compile with MinGW, install MSYS2 as instructed in the first section.
+
+Note: After MSYS2 is installed, you will have 3 shortcuts to open the command prompt: "MSYS2 MSYS", "MSYS2 MinGW-32 bit" and "MSYS2 MinGW 64-bit". Use the MinGW shortcut so that compilation succeeds.
+
 Then, build Unicorn with the next steps:
 
 - To compile Windows 32-bit binary with MinGW, run:

include/uc_priv.h

@@ -60,8 +60,6 @@ typedef int (*uc_args_int_uc_t)(struct uc_struct*);
 
 typedef bool (*uc_args_tcg_enable_t)(struct uc_struct*);
 
-typedef void (*uc_minit_t)(struct uc_struct*, ram_addr_t);
-
 typedef void (*uc_args_uc_long_t)(struct uc_struct*, unsigned long);
 
 typedef void (*uc_args_uc_u64_t)(struct uc_struct *, uint64_t addr);

include/unicorn/unicorn.h

@@ -68,7 +68,7 @@ typedef size_t uc_hook;
 // Unicorn package version
 #define UC_VERSION_MAJOR UC_API_MAJOR
 #define UC_VERSION_MINOR UC_API_MINOR
-#define UC_VERSION_EXTRA 0
+#define UC_VERSION_EXTRA 1
 
 
 /*

pkgconfig.mk

@@ -7,7 +7,7 @@ PKG_MAJOR = 1
 PKG_MINOR = 0
 
 # version bugfix level. Example: PKG_EXTRA = 1
-PKG_EXTRA = 0
+PKG_EXTRA = 1
 
 # version tag. Examples: rc1, b2, post1
 PKG_TAG =

qemu/glib_compat.c

@@ -33,7 +33,7 @@ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 
 #define MAX(a, b)  (((a) > (b)) ? (a) : (b))
 #ifndef _WIN64
-#define GPOINTER_TO_UINT(p) ((guint) (p))
+#define GPOINTER_TO_UINT(p) ((guint)(uintptr_t)(p))
 #else
 #define GPOINTER_TO_UINT(p) ((guint) (guint64) (p))
 #endif

qemu/target-arm/translate.c

@@ -10418,14 +10418,27 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s) // qq
         }
     }
 
+    insn = arm_lduw_code(env, s->pc, s->bswap_code);
+
     // Unicorn: trace this instruction on request
     if (HOOK_EXISTS_BOUNDED(s->uc, UC_HOOK_CODE, s->pc)) {
-        gen_uc_tracecode(tcg_ctx, 2, UC_HOOK_CODE_IDX, s->uc, s->pc);
+        // determine instruction size (Thumb/Thumb2)
+        switch(insn & 0xf800) {
+            // Thumb2: 32-bit
+            case 0xe800:
+            case 0xf000:
+            case 0xf800:
+                gen_uc_tracecode(tcg_ctx, 4, UC_HOOK_CODE_IDX, s->uc, s->pc);
+                break;
+            // Thumb: 16-bit
+            default:
+                gen_uc_tracecode(tcg_ctx, 2, UC_HOOK_CODE_IDX, s->uc, s->pc);
+                break;
+        }
         // the callback might want to stop emulation immediately
         check_exit_request(tcg_ctx);
     }
 
-    insn = arm_lduw_code(env, s->pc, s->bswap_code);
     s->pc += 2;
 
     switch (insn >> 12) {

qemu/target-arm/unicorn_aarch64.c

@@ -88,6 +88,9 @@ int arm64_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int co
                 case UC_ARM64_REG_SP:
                          *(int64_t *)value = ARM_CPU(uc, mycpu)->env.xregs[31];
                          break;
+                case UC_ARM64_REG_NZCV:
+                         *(int32_t *)value = cpsr_read(&ARM_CPU(uc, mycpu)->env) & CPSR_NZCV;
+                         break;
             }
         }
     }
@@ -141,6 +144,9 @@ int arm64_reg_write(struct uc_struct *uc, unsigned int *regs, void* const* vals,
                 case UC_ARM64_REG_SP:
                          ARM_CPU(uc, mycpu)->env.xregs[31] = *(uint64_t *)value;
                          break;
+                case UC_ARM64_REG_NZCV:
+                         cpsr_write(&ARM_CPU(uc, mycpu)->env, *(uint32_t *) value, CPSR_NZCV);
+                         break;
             }
         }
     }

qemu/target-mips/unicorn.c

@@ -89,7 +89,7 @@ int mips_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int cou
         unsigned int regid = regs[i];
         void *value = vals[i];
         if (regid >= UC_MIPS_REG_0 && regid <= UC_MIPS_REG_31)
-            *(int32_t *)value = MIPS_CPU(uc, mycpu)->env.active_tc.gpr[regid - UC_MIPS_REG_0];
+            *(mipsreg_t *)value = MIPS_CPU(uc, mycpu)->env.active_tc.gpr[regid - UC_MIPS_REG_0];
         else {
             switch(regid) {
                 default: break;

samples/msvc/.gitignore

@@ -0,0 +1,2 @@
+*.VC.db
+*.VC.opendb