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sparc: add SPARC32 mode (= UC_MODE_32)

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This commit is contained in:
Nguyen Anh Quynh 2016-01-23 10:48:18 +08:00
parent ca79d11211
commit d79925f477
11 changed files with 13 additions and 8 deletions
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1
bindings/dotnet/UnicornManaged/Const/Common.fs
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@ -37,6 +37,7 @@ module Common =
let UC_MODE_64 = 8
let UC_MODE_PPC64 = 8
let UC_MODE_QPX = 16
let UC_MODE_SPARC32 = 4
let UC_MODE_SPARC64 = 8
let UC_MODE_V9 = 16

1
bindings/go/unicorn/unicorn_const.go
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@ -32,6 +32,7 @@ const (
MODE_64 = 8
MODE_PPC64 = 8
MODE_QPX = 16
MODE_SPARC32 = 4
MODE_SPARC64 = 8
MODE_V9 = 16

1
bindings/java/unicorn/UnicornConst.java
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@ -34,6 +34,7 @@ public interface UnicornConst {
public static final int UC_MODE_64 = 8;
public static final int UC_MODE_PPC64 = 8;
public static final int UC_MODE_QPX = 16;
public static final int UC_MODE_SPARC32 = 4;
public static final int UC_MODE_SPARC64 = 8;
public static final int UC_MODE_V9 = 16;

2
bindings/python/sample_sparc.py
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@ -28,7 +28,7 @@ def test_sparc():
print("Emulate SPARC code")
try:
# Initialize emulator in SPARC EB mode
mu = Uc(UC_ARCH_SPARC, UC_MODE_32)
mu = Uc(UC_ARCH_SPARC, UC_MODE_SPARC32)
# map 2MB memory for this emulation
mu.mem_map(ADDRESS, 2 * 1024 * 1024)

1
bindings/python/unicorn/unicorn_const.py
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@ -30,6 +30,7 @@ UC_MODE_32 = 4
UC_MODE_64 = 8
UC_MODE_PPC64 = 8
UC_MODE_QPX = 16
UC_MODE_SPARC32 = 4
UC_MODE_SPARC64 = 8
UC_MODE_V9 = 16

2
include/uc_priv.h
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@ -17,7 +17,7 @@
#define UC_MODE_MIPS_MASK (UC_MODE_MIPS32|UC_MODE_MIPS64|UC_MODE_LITTLE_ENDIAN|UC_MODE_BIG_ENDIAN)
#define UC_MODE_X86_MASK (UC_MODE_16|UC_MODE_32|UC_MODE_64|UC_MODE_LITTLE_ENDIAN)
#define UC_MODE_PPC_MASK (UC_MODE_PPC64|UC_MODE_BIG_ENDIAN)
#define UC_MODE_SPARC_MASK (UC_MODE_SPARC64|UC_MODE_BIG_ENDIAN)
#define UC_MODE_SPARC_MASK (UC_MODE_SPARC32|UC_MODE_SPARC64|UC_MODE_BIG_ENDIAN)
#define UC_MODE_M68K_MASK (UC_MODE_BIG_ENDIAN)
#define ARR_SIZE(a) (sizeof(a)/sizeof(a[0]))

5
include/unicorn/unicorn.h
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@ -89,8 +89,8 @@ typedef enum uc_mode {
UC_MODE_LITTLE_ENDIAN = 0, // little-endian mode (default mode)
UC_MODE_BIG_ENDIAN = 1 << 30, // big-endian mode
// arm / arm64
UC_MODE_ARM = 0, // Start executing in ARM mode
UC_MODE_THUMB = 1 << 4, // Start executing in THUMB mode (including Thumb-2)
UC_MODE_ARM = 0, // ARM mode
UC_MODE_THUMB = 1 << 4, // THUMB mode (including Thumb-2)
UC_MODE_MCLASS = 1 << 5, // ARM's Cortex-M series (currently unsupported)
UC_MODE_V8 = 1 << 6, // ARMv8 A32 encodings for ARM (currently unsupported)
// mips
@ -107,6 +107,7 @@ typedef enum uc_mode {
UC_MODE_PPC64 = 1 << 3, // 64-bit mode (currently unsupported)
UC_MODE_QPX = 1 << 4, // Quad Processing eXtensions mode (currently unsupported)
// sparc
UC_MODE_SPARC32 = 1 << 2, // 32-bit mode
UC_MODE_SPARC64 = 1 << 3, // 64-bit mode
UC_MODE_V9 = 1 << 4, // SparcV9 mode (currently unsupported)
// m68k

2
samples/sample_sparc.c
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@ -57,7 +57,7 @@ static void test_sparc(void)
printf("Emulate SPARC code\n");
// Initialize emulator in Sparc mode
err = uc_open(UC_ARCH_SPARC, 0, &uc);
err = uc_open(UC_ARCH_SPARC, UC_MODE_SPARC32, &uc);
if (err) {
printf("Failed on uc_open() with error returned: %u (%s)\n",
err, uc_strerror(err));

2
tests/regress/sparc64.py
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@ -5,7 +5,7 @@ from unicorn.sparc_const import *
PAGE_SIZE = 1 * 1024 * 1024
uc = Uc(UC_ARCH_SPARC, UC_MODE_64)
uc = Uc(UC_ARCH_SPARC, UC_MODE_SPARC64)
uc.reg_write(UC_SPARC_REG_SP, 100)
print 'writing sp = 100'

2
tests/regress/sparc_jump_to_zero.c
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@ -1,7 +1,7 @@
#include <unicorn/unicorn.h>
#define HARDWARE_ARCHITECTURE UC_ARCH_SPARC
#define HARDWARE_MODE 0
#define HARDWARE_MODE UC_ARCH_SPARC32
#define MEMORY_STARTING_ADDRESS 0x1000000
#define MEMORY_SIZE 2 * 1024 * 1024

2
tests/regress/sparc_reg.py
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@ -5,7 +5,7 @@ from unicorn.sparc_const import *
PAGE_SIZE = 1 * 1024 * 1024
uc = Uc(UC_ARCH_SPARC, 0)
uc = Uc(UC_ARCH_SPARC, UC_MODE_SPARC32)
uc.reg_write(UC_SPARC_REG_SP, 100)
uc.reg_write(UC_SPARC_REG_FP, 200)