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Don't cache S390SkeyState and S390SkeysClass

This commit is contained in:
lazymio 2022-01-10 19:18:52 +01:00
parent 980eae7f44
commit 9ac796531a
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GPG Key ID: DFF27E34A47CB873
4 changed files with 9 additions and 38 deletions
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7
qemu/hw/s390x/s390-skeys.c
View File

@ -24,13 +24,6 @@ static void qemu_s390_skeys_class_init(uc_engine *uc, S390SKeysClass* skeyclass)
static void s390_skeys_instance_init(uc_engine *uc, S390SKeysState* ss);
static void qemu_s390_skeys_init(uc_engine *uc, QEMUS390SKeysState *skey);
S390SKeysState *s390_get_skeys_device(uc_engine *uc)
{
S390CPU *cpu = S390_CPU(uc->cpu);
return (S390SKeysState*)&cpu->ss;
}
void s390_skeys_init(uc_engine *uc)
{
S390CPU *cpu = S390_CPU(uc->cpu);

2
qemu/include/hw/s390x/storage-keys.h
View File

@ -66,6 +66,4 @@ typedef struct QEMUS390SKeysState {
void s390_skeys_init(uc_engine *uc);
S390SKeysState *s390_get_skeys_device(uc_engine *uc);
#endif /* S390_STORAGE_KEYS_H */

27
qemu/target/s390x/mem_helper.c
View File

@ -2061,8 +2061,8 @@ uint32_t HELPER(tprot)(CPUS390XState *env, uint64_t a1, uint64_t a2)
/* insert storage key extended */
uint64_t HELPER(iske)(CPUS390XState *env, uint64_t r2)
{
static S390SKeysState *ss;
static S390SKeysClass *skeyclass;
S390SKeysState *ss = (S390SKeysState *)(&((S390CPU *)env->uc->cpu)->ss);
S390SKeysClass *skeyclass = S390_SKEYS_GET_CLASS(ss);
uint64_t addr = wrap_address(env, r2);
uint8_t key;
@ -2072,11 +2072,6 @@ uint64_t HELPER(iske)(CPUS390XState *env, uint64_t r2)
}
#endif
if (unlikely(!ss)) {
ss = s390_get_skeys_device(env->uc);
skeyclass = S390_SKEYS_GET_CLASS(ss);
}
if (skeyclass->get_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key)) {
return 0;
}
@ -2086,8 +2081,8 @@ uint64_t HELPER(iske)(CPUS390XState *env, uint64_t r2)
/* set storage key extended */
void HELPER(sske)(CPUS390XState *env, uint64_t r1, uint64_t r2)
{
static S390SKeysState *ss;
static S390SKeysClass *skeyclass;
S390SKeysState *ss = (S390SKeysState *)(&((S390CPU *)env->uc->cpu)->ss);
S390SKeysClass *skeyclass = S390_SKEYS_GET_CLASS(ss);
uint64_t addr = wrap_address(env, r2);
uint8_t key;
@ -2097,11 +2092,6 @@ void HELPER(sske)(CPUS390XState *env, uint64_t r1, uint64_t r2)
}
#endif
if (unlikely(!ss)) {
ss = s390_get_skeys_device(env->uc);
skeyclass = S390_SKEYS_GET_CLASS(ss);
}
key = (uint8_t) r1;
skeyclass->set_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key);
/*
@ -2114,8 +2104,8 @@ void HELPER(sske)(CPUS390XState *env, uint64_t r1, uint64_t r2)
/* reset reference bit extended */
uint32_t HELPER(rrbe)(CPUS390XState *env, uint64_t r2)
{
static S390SKeysState *ss;
static S390SKeysClass *skeyclass;
S390SKeysState *ss = (S390SKeysState *)(&((S390CPU *)env->uc->cpu)->ss);
S390SKeysClass *skeyclass = S390_SKEYS_GET_CLASS(ss);
uint8_t re, key;
#if 0
@ -2124,11 +2114,6 @@ uint32_t HELPER(rrbe)(CPUS390XState *env, uint64_t r2)
}
#endif
if (unlikely(!ss)) {
ss = s390_get_skeys_device(env->uc);
skeyclass = S390_SKEYS_GET_CLASS(ss);
}
if (skeyclass->get_skeys(ss, r2 / TARGET_PAGE_SIZE, 1, &key)) {
return 0;
}

11
qemu/target/s390x/mmu_helper.c
View File

@ -283,9 +283,9 @@ static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr,
}
static void mmu_handle_skey(uc_engine *uc, target_ulong addr, int rw, int *flags)
{
static S390SKeysClass *skeyclass;
static S390SKeysState *ss;
{
S390SKeysState *ss = (S390SKeysState *)(&((S390CPU *)uc->cpu)->ss);
S390SKeysClass *skeyclass = S390_SKEYS_GET_CLASS(ss);
uint8_t key;
int rc;
@ -295,11 +295,6 @@ static void mmu_handle_skey(uc_engine *uc, target_ulong addr, int rw, int *flags
}
#endif
if (unlikely(!ss)) {
ss = s390_get_skeys_device(uc);
skeyclass = S390_SKEYS_GET_CLASS(ss);
}
/*
* Whenever we create a new TLB entry, we set the storage key reference
* bit. In case we allow write accesses, we set the storage key change