Rename unhandled CPU exception
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@ -63,7 +63,7 @@ module Common =
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let UC_ERR_FETCH_UNALIGNED = 18
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let UC_ERR_FETCH_UNALIGNED = 18
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let UC_ERR_HOOK_EXIST = 19
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let UC_ERR_HOOK_EXIST = 19
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let UC_ERR_RESOURCE = 20
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let UC_ERR_RESOURCE = 20
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let UC_ERR_UNHANDLED_INTERRUPT = 21
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let UC_ERR_EXCEPTION = 21
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let UC_MEM_READ = 16
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let UC_MEM_READ = 16
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let UC_MEM_WRITE = 17
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let UC_MEM_WRITE = 17
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let UC_MEM_FETCH = 18
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let UC_MEM_FETCH = 18
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@ -58,7 +58,7 @@ const (
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ERR_FETCH_UNALIGNED = 18
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ERR_FETCH_UNALIGNED = 18
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ERR_HOOK_EXIST = 19
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ERR_HOOK_EXIST = 19
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ERR_RESOURCE = 20
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ERR_RESOURCE = 20
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ERR_UNHANDLED_INTERRUPT = 21
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ERR_EXCEPTION = 21
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MEM_READ = 16
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MEM_READ = 16
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MEM_WRITE = 17
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MEM_WRITE = 17
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MEM_FETCH = 18
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MEM_FETCH = 18
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@ -60,7 +60,7 @@ public interface UnicornConst {
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public static final int UC_ERR_FETCH_UNALIGNED = 18;
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public static final int UC_ERR_FETCH_UNALIGNED = 18;
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public static final int UC_ERR_HOOK_EXIST = 19;
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public static final int UC_ERR_HOOK_EXIST = 19;
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public static final int UC_ERR_RESOURCE = 20;
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public static final int UC_ERR_RESOURCE = 20;
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public static final int UC_ERR_UNHANDLED_INTERRUPT = 21;
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public static final int UC_ERR_EXCEPTION = 21;
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public static final int UC_MEM_READ = 16;
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public static final int UC_MEM_READ = 16;
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public static final int UC_MEM_WRITE = 17;
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public static final int UC_MEM_WRITE = 17;
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public static final int UC_MEM_FETCH = 18;
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public static final int UC_MEM_FETCH = 18;
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@ -56,7 +56,7 @@ UC_ERR_WRITE_UNALIGNED = 17
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UC_ERR_FETCH_UNALIGNED = 18
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UC_ERR_FETCH_UNALIGNED = 18
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UC_ERR_HOOK_EXIST = 19
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UC_ERR_HOOK_EXIST = 19
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UC_ERR_RESOURCE = 20
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UC_ERR_RESOURCE = 20
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UC_ERR_UNHANDLED_INTERRUPT = 21
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UC_ERR_EXCEPTION = 21
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UC_MEM_READ = 16
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UC_MEM_READ = 16
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UC_MEM_WRITE = 17
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UC_MEM_WRITE = 17
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UC_MEM_FETCH = 18
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UC_MEM_FETCH = 18
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@ -145,7 +145,7 @@ typedef enum uc_err {
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UC_ERR_FETCH_UNALIGNED, // Unaligned fetch
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UC_ERR_FETCH_UNALIGNED, // Unaligned fetch
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UC_ERR_HOOK_EXIST, // hook for this event already existed
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UC_ERR_HOOK_EXIST, // hook for this event already existed
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UC_ERR_RESOURCE, // Insufficient resource: uc_emu_start()
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UC_ERR_RESOURCE, // Insufficient resource: uc_emu_start()
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UC_ERR_UNHANDLED_INTERRUPT // Unhandled CPU interrupt.
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UC_ERR_EXCEPTION // Unhandled CPU exception
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} uc_err;
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} uc_err;
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@ -139,7 +139,7 @@ int cpu_exec(struct uc_struct *uc, CPUArchState *env) // qq
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// Unicorn: If un-catched interrupt, stop executions.
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// Unicorn: If un-catched interrupt, stop executions.
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if (!catched) {
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if (!catched) {
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cpu->halted = 1;
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cpu->halted = 1;
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uc->invalid_error = UC_ERR_UNHANDLED_INTERRUPT;
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uc->invalid_error = UC_ERR_EXCEPTION;
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ret = EXCP_HLT;
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ret = EXCP_HLT;
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break;
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break;
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}
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}
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@ -18,7 +18,7 @@ class VldrPcInsn(regress.RegressTest):
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with self.assertRaises(UcError) as ex_ctx:
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with self.assertRaises(UcError) as ex_ctx:
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uc.emu_start(0x1000, 0x1000 + len(code))
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uc.emu_start(0x1000, 0x1000 + len(code))
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self.assertEquals(ex_ctx.exception.errno, UC_ERR_UNHANDLED_INTERRUPT)
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self.assertEquals(ex_ctx.exception.errno, UC_ERR_EXCEPTION)
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if __name__ == '__main__':
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if __name__ == '__main__':
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regress.main()
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regress.main()
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4
uc.c
4
uc.c
@ -96,8 +96,8 @@ const char *uc_strerror(uc_err code)
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return "Fetch from unaligned memory (UC_ERR_FETCH_UNALIGNED)";
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return "Fetch from unaligned memory (UC_ERR_FETCH_UNALIGNED)";
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case UC_ERR_RESOURCE:
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case UC_ERR_RESOURCE:
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return "Insufficient resource (UC_ERR_RESOURCE)";
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return "Insufficient resource (UC_ERR_RESOURCE)";
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case UC_ERR_UNHANDLED_INTERRUPT:
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case UC_ERR_EXCEPTION:
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return "Unhandled machine interrupt (UC_ERR_UNHANDLED_INTERRUPT)";
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return "Unhandled CPU exception (UC_ERR_EXCEPTION)";
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}
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}
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}
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}
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