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fix aarch64 cpu init error. (#1307)

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Chen Huitao 2020-09-17 18:03:36 +08:00 committed by GitHub
parent 3f56323fef
commit 848d52033e
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GPG Key ID: 4AEE18F83AFDEB23
7 changed files with 38 additions and 15 deletions
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1
qemu/aarch64.h
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@ -3025,6 +3025,7 @@
#define arm64_reg_reset arm64_reg_reset_aarch64 #define arm64_reg_reset arm64_reg_reset_aarch64
#define arm64_reg_read arm64_reg_read_aarch64 #define arm64_reg_read arm64_reg_read_aarch64
#define arm64_reg_write arm64_reg_write_aarch64 #define arm64_reg_write arm64_reg_write_aarch64
#define arm_cpu_class_init arm_cpu_class_init_aarch64
#define gen_a64_set_pc_im gen_a64_set_pc_im_aarch64 #define gen_a64_set_pc_im gen_a64_set_pc_im_aarch64
#define aarch64_cpu_register_types aarch64_cpu_register_types_aarch64 #define aarch64_cpu_register_types aarch64_cpu_register_types_aarch64
#define helper_udiv64 helper_udiv64_aarch64 #define helper_udiv64 helper_udiv64_aarch64

1
qemu/aarch64eb.h
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@ -3025,6 +3025,7 @@
#define arm64_reg_reset arm64_reg_reset_aarch64eb #define arm64_reg_reset arm64_reg_reset_aarch64eb
#define arm64_reg_read arm64_reg_read_aarch64eb #define arm64_reg_read arm64_reg_read_aarch64eb
#define arm64_reg_write arm64_reg_write_aarch64eb #define arm64_reg_write arm64_reg_write_aarch64eb
#define arm_cpu_class_init arm_cpu_class_init_aarch64eb
#define gen_a64_set_pc_im gen_a64_set_pc_im_aarch64eb #define gen_a64_set_pc_im gen_a64_set_pc_im_aarch64eb
#define aarch64_cpu_register_types aarch64_cpu_register_types_aarch64eb #define aarch64_cpu_register_types aarch64_cpu_register_types_aarch64eb
#define helper_udiv64 helper_udiv64_aarch64eb #define helper_udiv64 helper_udiv64_aarch64eb

1
qemu/arm.h
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@ -3021,4 +3021,5 @@
#define xscale_cpar_write xscale_cpar_write_arm #define xscale_cpar_write xscale_cpar_write_arm
#define xscale_cp_reginfo xscale_cp_reginfo_arm #define xscale_cp_reginfo xscale_cp_reginfo_arm
#define ARM_REGS_STORAGE_SIZE ARM_REGS_STORAGE_SIZE_arm #define ARM_REGS_STORAGE_SIZE ARM_REGS_STORAGE_SIZE_arm
#define arm_cpu_class_init arm_cpu_class_init_arm
#endif #endif

1
qemu/armeb.h
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@ -3021,4 +3021,5 @@
#define xscale_cpar_write xscale_cpar_write_armeb #define xscale_cpar_write xscale_cpar_write_armeb
#define xscale_cp_reginfo xscale_cp_reginfo_armeb #define xscale_cp_reginfo xscale_cp_reginfo_armeb
#define ARM_REGS_STORAGE_SIZE ARM_REGS_STORAGE_SIZE_armeb #define ARM_REGS_STORAGE_SIZE ARM_REGS_STORAGE_SIZE_armeb
#define arm_cpu_class_init arm_cpu_class_init_armeb
#endif #endif

2
qemu/header_gen.py
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@ -3031,6 +3031,7 @@ symbols = (
arm_symbols = ( arm_symbols = (
'ARM_REGS_STORAGE_SIZE', 'ARM_REGS_STORAGE_SIZE',
'arm_cpu_class_init',
) )
aarch64_symbols = ( aarch64_symbols = (
@ -3039,6 +3040,7 @@ aarch64_symbols = (
'arm64_reg_reset', 'arm64_reg_reset',
'arm64_reg_read', 'arm64_reg_read',
'arm64_reg_write', 'arm64_reg_write',
'arm_cpu_class_init',
'gen_a64_set_pc_im', 'gen_a64_set_pc_im',
'aarch64_cpu_register_types', 'aarch64_cpu_register_types',
'helper_udiv64', 'helper_udiv64',

18
qemu/target-arm/cpu.c
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@ -209,7 +209,6 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
return ret; return ret;
} }
#ifndef TARGET_AARCH64
#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request) static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{ {
@ -244,14 +243,13 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
return ret; return ret;
} }
#endif #endif
#endif
static inline void set_feature(CPUARMState *env, int feature) static inline void set_feature(CPUARMState *env, int feature)
{ {
env->features |= 1ULL << feature; env->features |= 1ULL << feature;
} }
static void arm_cpu_initfn(struct uc_struct *uc, CPUState *obj, void *opaque) void arm_cpu_initfn(struct uc_struct *uc, CPUState *obj, void *opaque)
{ {
CPUState *cs = CPU(obj); CPUState *cs = CPU(obj);
ARMCPU *cpu = ARM_CPU(uc, obj); ARMCPU *cpu = ARM_CPU(uc, obj);
@ -275,7 +273,7 @@ static void arm_cpu_initfn(struct uc_struct *uc, CPUState *obj, void *opaque)
} }
} }
static void arm_cpu_post_init(struct uc_struct *uc, CPUState *obj) void arm_cpu_post_init(struct uc_struct *uc, CPUState *obj)
{ {
ARMCPU *cpu = ARM_CPU(uc, obj); ARMCPU *cpu = ARM_CPU(uc, obj);
@ -296,7 +294,7 @@ static void arm_cpu_post_init(struct uc_struct *uc, CPUState *obj)
} }
} }
static int arm_cpu_realizefn(struct uc_struct *uc, CPUState *dev) int arm_cpu_realizefn(struct uc_struct *uc, CPUState *dev)
{ {
CPUState *cs = CPU(dev); CPUState *cs = CPU(dev);
ARMCPU *cpu = ARM_CPU(uc, dev); ARMCPU *cpu = ARM_CPU(uc, dev);
@ -368,7 +366,6 @@ static int arm_cpu_realizefn(struct uc_struct *uc, CPUState *dev)
} }
/* CPU models. These are not needed for the AArch64 linux-user build. */ /* CPU models. These are not needed for the AArch64 linux-user build. */
#ifndef TARGET_AARCH64
#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
static void arm926_initfn(struct uc_struct *uc, CPUState *obj, void *opaque) static void arm926_initfn(struct uc_struct *uc, CPUState *obj, void *opaque)
@ -944,7 +941,6 @@ static void arm_any_initfn(struct uc_struct *uc, CPUState *obj, void *opaque)
#endif #endif
#endif /* !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) */ #endif /* !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) */
#endif
typedef struct ARMCPUInfo { typedef struct ARMCPUInfo {
const char *name; const char *name;
@ -952,7 +948,6 @@ typedef struct ARMCPUInfo {
void (*class_init)(struct uc_struct *uc, CPUClass *oc, void *data); void (*class_init)(struct uc_struct *uc, CPUClass *oc, void *data);
} ARMCPUInfo; } ARMCPUInfo;
#ifndef TARGET_AARCH64
static const ARMCPUInfo arm_cpus[] = { static const ARMCPUInfo arm_cpus[] = {
#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
{ "arm926", arm926_initfn }, { "arm926", arm926_initfn },
@ -992,9 +987,8 @@ static const ARMCPUInfo arm_cpus[] = {
#endif #endif
{ NULL } { NULL }
}; };
#endif
static void arm_cpu_class_init(struct uc_struct *uc, CPUClass *oc, void *data) void arm_cpu_class_init(struct uc_struct *uc, CPUClass *oc, void *data)
{ {
ARMCPUClass *acc = ARM_CPU_CLASS(uc, oc); ARMCPUClass *acc = ARM_CPU_CLASS(uc, oc);
CPUClass *cc = CPU_CLASS(uc, acc); CPUClass *cc = CPU_CLASS(uc, acc);
@ -1016,9 +1010,7 @@ static void arm_cpu_class_init(struct uc_struct *uc, CPUClass *oc, void *data)
ARMCPU *cpu_arm_init(struct uc_struct *uc, const char *cpu_model) ARMCPU *cpu_arm_init(struct uc_struct *uc, const char *cpu_model)
{ {
#ifndef TARGET_AARCH64
int i; int i;
#endif
ARMCPU *cpu; ARMCPU *cpu;
CPUState *cs; CPUState *cs;
CPUClass *cc; CPUClass *cc;
@ -1055,7 +1047,6 @@ ARMCPU *cpu_arm_init(struct uc_struct *uc, const char *cpu_model)
#endif #endif
/* init ARMCPU */ /* init ARMCPU */
arm_cpu_initfn(uc, cs, uc); arm_cpu_initfn(uc, cs, uc);
#ifndef TARGET_AARCH64
/* init ARM types */ /* init ARM types */
for (i = 0; i < ARRAY_SIZE(arm_cpus); i++) { for (i = 0; i < ARRAY_SIZE(arm_cpus); i++) {
if (strcmp(cpu_model, arm_cpus[i].name) == 0) { if (strcmp(cpu_model, arm_cpus[i].name) == 0) {
@ -1068,7 +1059,6 @@ ARMCPU *cpu_arm_init(struct uc_struct *uc, const char *cpu_model)
break; break;
} }
} }
#endif
/* postinit ARMCPU */ /* postinit ARMCPU */
arm_cpu_post_init(uc, cs); arm_cpu_post_init(uc, cs);
/* realize ARMCPU */ /* realize ARMCPU */

29
qemu/target-arm/cpu64.c
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@ -182,6 +182,11 @@ static void aarch64_cpu_class_init(struct uc_struct *uc, CPUClass *oc, void *dat
cc->set_pc = aarch64_cpu_set_pc; cc->set_pc = aarch64_cpu_set_pc;
} }
void arm_cpu_class_init(struct uc_struct *uc, CPUClass *oc, void *data);
void arm_cpu_initfn(struct uc_struct *uc, CPUState *obj, void *opaque);
void arm_cpu_post_init(struct uc_struct *uc, CPUState *obj);
int arm_cpu_realizefn(struct uc_struct *uc, CPUState *dev);
#ifdef TARGET_WORDS_BIGENDIAN #ifdef TARGET_WORDS_BIGENDIAN
ARMCPU *cpu_aarch64eb_init(struct uc_struct *uc, const char *cpu_model) ARMCPU *cpu_aarch64eb_init(struct uc_struct *uc, const char *cpu_model)
#else #else
@ -197,14 +202,28 @@ ARMCPU *cpu_aarch64_init(struct uc_struct *uc, const char *cpu_model)
cpu_model = "cortex-a57"; cpu_model = "cortex-a57";
} }
cpu = cpu_arm_init(uc, cpu_model); cpu = malloc(sizeof(*cpu));
if (cpu == NULL) {
return NULL;
}
memset(cpu, 0, sizeof(*cpu));
cs = (CPUState *)cpu; cs = (CPUState *)cpu;
cc = (CPUClass *)&cpu->cc; cc = (CPUClass *)&cpu->cc;
cs->cc = cc; cs->cc = cc;
cs->uc = uc; cs->uc = uc;
/* init CPUClass */
cpu_klass_init(uc, cc);
/* init ARMCPUClass */
arm_cpu_class_init(uc, cc, NULL);
/* init Aarch64CPUClass */ /* init Aarch64CPUClass */
aarch64_cpu_class_init(uc, cc, NULL); aarch64_cpu_class_init(uc, cc, NULL);
/* init CPUState */
#ifdef NEED_CPU_INIT_REALIZE
cpu_object_init(uc, cs);
#endif
/* init ARMCPU */
arm_cpu_initfn(uc, cs, uc);
/* init Aarch64CPU */ /* init Aarch64CPU */
aarch64_cpu_initfn(uc, cs, uc); aarch64_cpu_initfn(uc, cs, uc);
/* init Aarch64 types */ /* init Aarch64 types */
@ -219,6 +238,14 @@ ARMCPU *cpu_aarch64_init(struct uc_struct *uc, const char *cpu_model)
break; break;
} }
} }
/* postinit ARMCPU, do nothing. */
arm_cpu_post_init(uc, cs);
/* realize ARMCPU */
arm_cpu_realizefn(uc, cs);
/* realize CPUState */
#ifdef NEED_CPU_INIT_REALIZE
cpu_object_realize(uc, cs);
#endif
return cpu; return cpu;
} }