From 84220d83601ba929c56b9e1fadd1686e02cbb93c Mon Sep 17 00:00:00 2001 From: Coldzer0 Date: Fri, 3 Aug 2018 14:33:25 +0200 Subject: [PATCH] Pascal/Delphi binding (#987) * Pascal/Delphi binding Pascal/Delphi language binding * update credits --- CREDITS.TXT | 1 + bindings/Makefile | 1 + bindings/README | 1 + bindings/const_generator.py | 16 + bindings/pascal/LICENSE | 339 +++++ bindings/pascal/README.md | 52 + bindings/pascal/examples/x86.lpi | 105 ++ bindings/pascal/examples/x86.lpr | 1001 ++++++++++++++ bindings/pascal/examples/x86.lps | 197 +++ bindings/pascal/unicorn/Arm64Const.pas | 288 ++++ bindings/pascal/unicorn/ArmConst.pas | 136 ++ bindings/pascal/unicorn/M68kConst.pas | 32 + bindings/pascal/unicorn/MipsConst.pas | 203 +++ bindings/pascal/unicorn/SparcConst.pas | 104 ++ bindings/pascal/unicorn/UnicornConst.pas | 111 ++ bindings/pascal/unicorn/Unicorn_dyn.pas | 673 +++++++++ bindings/pascal/unicorn/X86Const.pas | 1604 ++++++++++++++++++++++ 17 files changed, 4864 insertions(+) create mode 100644 bindings/pascal/LICENSE create mode 100644 bindings/pascal/README.md create mode 100644 bindings/pascal/examples/x86.lpi create mode 100644 bindings/pascal/examples/x86.lpr create mode 100644 bindings/pascal/examples/x86.lps create mode 100644 bindings/pascal/unicorn/Arm64Const.pas create mode 100644 bindings/pascal/unicorn/ArmConst.pas create mode 100644 bindings/pascal/unicorn/M68kConst.pas create mode 100644 bindings/pascal/unicorn/MipsConst.pas create mode 100644 bindings/pascal/unicorn/SparcConst.pas create mode 100644 bindings/pascal/unicorn/UnicornConst.pas create mode 100755 bindings/pascal/unicorn/Unicorn_dyn.pas create mode 100644 bindings/pascal/unicorn/X86Const.pas diff --git a/CREDITS.TXT b/CREDITS.TXT index 152b8c2c..edc61aac 100644 --- a/CREDITS.TXT +++ b/CREDITS.TXT @@ -67,3 +67,4 @@ Andrew Dutcher: uc_context_{save, restore} API. Stephen Groat: improved CI setup. David Zimmer: VB6 binding. zhangwm: ARM & ARM64 big endian. +Mohamed Osama: FreePascal/Delphi binding. diff --git a/bindings/Makefile b/bindings/Makefile index 02b3a814..296b44f3 100644 --- a/bindings/Makefile +++ b/bindings/Makefile @@ -25,6 +25,7 @@ build: $(MAKE) -C java gen_const $(MAKE) -C ruby gen_const python const_generator.py dotnet + python const_generator.py pascal install: build $(MAKE) -C python install diff --git a/bindings/README b/bindings/README index d1140a0b..f9835187 100644 --- a/bindings/README +++ b/bindings/README @@ -9,6 +9,7 @@ The following bindings are contributed by community. - Ruby binding: by Sascha Schirra - Haskell binding: by Adrian Herrera. - VB6 binding: David Zimmer. +- FreePascal/Delphi binding: Mohamed Osama. More bindings created & maintained externally by community are available as follows. diff --git a/bindings/const_generator.py b/bindings/const_generator.py index 73f67937..2d11505a 100644 --- a/bindings/const_generator.py +++ b/bindings/const_generator.py @@ -88,6 +88,22 @@ template = { 'comment_open': ' //', 'comment_close': '', }, + 'pascal': { + 'header': "// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT\n\nunit %sConst;\n\ninterface\n\nconst", + 'footer': "\nimplementation\nend.", + 'line_format': ' UC_%s = %s;\n', + 'out_file': os.path.join('pascal', 'unicorn', '%sConst.pas'), + # prefixes for constant filenames of all archs - case sensitive + 'arm.h': 'Arm', + 'arm64.h': 'Arm64', + 'mips.h': 'Mips', + 'x86.h': 'X86', + 'sparc.h': 'Sparc', + 'm68k.h': 'M68k', + 'unicorn.h': 'Unicorn', + 'comment_open': '//', + 'comment_close': '', + }, } # markup for comments to be added to autogen files diff --git a/bindings/pascal/LICENSE b/bindings/pascal/LICENSE new file mode 100644 index 00000000..61a3fc5a --- /dev/null +++ b/bindings/pascal/LICENSE @@ -0,0 +1,339 @@ +GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. 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If this is what you want to do, use the GNU Lesser General +Public License instead of this License. \ No newline at end of file diff --git a/bindings/pascal/README.md b/bindings/pascal/README.md new file mode 100644 index 00000000..8096d0ff --- /dev/null +++ b/bindings/pascal/README.md @@ -0,0 +1,52 @@ +# unicorn-engine-pascal + +Pascal/Delphi language binding for the [Unicorn emulator](http://www.unicorn-engine.org/) +([GitHub](https://github.com/unicorn-engine/unicorn)). + +*Unicorn* is a lightweight multi-platform, multi-architecture CPU emulator framework +based on [QEMU](http://www.qemu.org/). + +## License + +`GPLv2` + +## Compilers Compatibility + +#### Free Pascal >= v3 + - `Mac OS` + - `Windows` + - `Linux` +#### Delphi + - `Windows` +## Features + +* Same API as the C core + - with some workarounds for Pascals case insensitivity: + + + `uc_mem_write()` -> `uc_mem_write_()`, `uc_mem_read()` -> `uc_mem_read_()` + - and the missing feature passing variable number of arguments to functions (`...`): + + i solve it by using -> `args : Array of Const;` + you can pass args inside [] like : + ```pascal + uc_hook_add(uc, trace, UC_HOOK_INSN, @HookIn, nil, 1,0,[UC_X86_INS_IN]; + ``` + the main loader in `Unicorn_dyn.pas` , check X86 example for more info . + + +* Multiplatform (Mac OS , Windows and Linux are tested) + +## Examples +* `X86` Emulate 16, 32, 64 Bit x86 + + +## Version History +* `1.1` + * Add Delphi Compatibility [ Windows ] +* `1.0` + * this is the first version it has all APIs of UNICORN v1.0.1 + +## TODO + - Add more Examples + - Add Mac , Linux Support for Delphi \ No newline at end of file diff --git a/bindings/pascal/examples/x86.lpi b/bindings/pascal/examples/x86.lpi new file mode 100644 index 00000000..289ab232 --- /dev/null +++ b/bindings/pascal/examples/x86.lpi @@ -0,0 +1,105 @@ + + + + + + + + + + + + + + <UseAppBundle Value="False"/> + <ResourceType Value="res"/> + </General> + <BuildModes Count="3"> + <Item1 Name="Default" Default="True"/> + <Item2 Name="Debug"> + <CompilerOptions> + <Version Value="11"/> + <Target> + <Filename Value="x86"/> + </Target> + <SearchPaths> + <IncludeFiles Value="$(ProjOutDir)"/> + <OtherUnitFiles Value="../unicorn"/> + <UnitOutputDirectory Value="lib/$(TargetCPU)-$(TargetOS)"/> + </SearchPaths> + <Linking> + <Debugging> + <UseHeaptrc Value="True"/> + <TrashVariables Value="True"/> + <UseExternalDbgSyms Value="True"/> + </Debugging> + </Linking> + </CompilerOptions> + </Item2> + <Item3 Name="Release"> + <CompilerOptions> + <Version Value="11"/> + <Target> + <Filename Value="x86"/> + </Target> + <SearchPaths> + <IncludeFiles Value="$(ProjOutDir)"/> + <OtherUnitFiles Value="../unicorn"/> + <UnitOutputDirectory Value="lib/$(TargetCPU)-$(TargetOS)"/> + </SearchPaths> + <CodeGeneration> + <SmartLinkUnit Value="True"/> + <Optimizations> + <OptimizationLevel Value="3"/> + </Optimizations> + </CodeGeneration> + <Linking> + <Debugging> + <GenerateDebugInfo Value="False"/> + </Debugging> + <LinkSmart Value="True"/> + </Linking> + </CompilerOptions> + </Item3> + </BuildModes> + <PublishOptions> + <Version Value="2"/> + </PublishOptions> + <RunParams> + <local> + <FormatVersion Value="1"/> + <CommandLineParams Value="-32"/> + </local> + </RunParams> + <Units Count="1"> + <Unit0> + <Filename Value="x86.lpr"/> + <IsPartOfProject Value="True"/> + </Unit0> + </Units> + </ProjectOptions> + <CompilerOptions> + <Version Value="11"/> + <Target> + <Filename Value="x86"/> + </Target> + <SearchPaths> + <IncludeFiles Value="$(ProjOutDir)"/> + <OtherUnitFiles Value="../unicorn"/> + <UnitOutputDirectory Value="lib/$(TargetCPU)-$(TargetOS)"/> + </SearchPaths> + </CompilerOptions> + <Debugging> + <Exceptions Count="3"> + <Item1> + <Name Value="EAbort"/> + </Item1> + <Item2> + <Name Value="ECodetoolError"/> + </Item2> + <Item3> + <Name Value="EFOpenError"/> + </Item3> + </Exceptions> + </Debugging> +</CONFIG> diff --git a/bindings/pascal/examples/x86.lpr b/bindings/pascal/examples/x86.lpr new file mode 100644 index 00000000..6a24f68e --- /dev/null +++ b/bindings/pascal/examples/x86.lpr @@ -0,0 +1,1001 @@ +{ + FreePascal/Delphi bindings for the UnicornEngine Emulator Engine . + + Copyright(c) 2018 Coldzer0 . + + License : GPLv2 . +} + +program x86; + +{$IFDEF FPC} + {$MODE Delphi} +{$ENDIF} + +{$ifdef MSWINDOWS} + {$apptype CONSOLE} +{$endif} + +uses + SysUtils, + Unicorn_dyn, + UnicornConst, + X86Const; + +const + // code to be emulated . + X86_CODE32: array[0..6] of Byte = ($41, $4a,$66,$0f,$ef,$c1, $00); // INC ecx; DEC edx ; PXOR xmm0, xmm1 ; + X86_CODE32_JUMP: array[0..8] of Byte = ($eb, $02, $90, $90, $90, $90, $90, $90, $00); // jmp 4; nop; nop; nop; nop; nop; nop ; + X86_CODE32_LOOP: array[0..4] of Byte = ($41, $4a, $eb, $fe, $00); // INC ecx; DEC edx; JMP self-loop + X86_CODE32_MEM_WRITE: array[0..8] of Byte = ($89, $0d, $aa, $aa, $aa, $aa, $41, $4a, $00); // mov [0xaaaaaaaa], ecx; INC ecx; DEC edx ; + X86_CODE32_MEM_READ: array[0..8] of Byte = ($8b, $0d, $aa, $aa, $aa, $aa, $41, $4a, $00); // mov ecx,[0xaaaaaaaa]; INC ecx; DEC edx ; + + X86_CODE32_JMP_INVALID: array[0..6] of Byte = ($e9, $e9, $ee, $ee, $41, $4a, $00); // JMP outside; INC ecx; DEC edx ; + X86_CODE32_INOUT: array[0..7] of Byte = ($41, $E4, $3F, $4a, $E6, $46, $43, $00); // INC ecx; IN AL, 0x3f; DEC edx; OUT 0x46, AL; INC ebx ; + X86_CODE32_INC : array[0..1] of byte = ($40,$00); // INC eax . + + X86_CODE64: array[0..75] of Byte = ( + $41, $BC, $3B, $B0, $28, $2A, $49, $0F, $C9, $90, $4D, $0F, $AD, $CF, $49, $87, $FD, $90, $48, $81, + $D2, $8A, $CE, $77, $35, $48, $F7, $D9, $4D, $29, $F4, $49, $81, $C9, $F6, $8A, $C6, $53, $4D, $87, + $ED, $48, $0F, $AD, $D2, $49, $F7, $D4, $48, $F7, $E1, $4D, $19, $C5, $4D, $89, $C5, $48, $F7, $D6, + $41, $B8, $4F, $8D, $6B, $59, $4D, $87, $D0, $68, $6A, $1E, $09, $3C, $59, $00); + X86_CODE16: array[0..2] of Byte = ($00, $00, $00); // add byte ptr [bx + si], al + X86_CODE64_SYSCALL: array[0..2] of Byte = ($0f, $05, $00); // SYSCALL + + // memory address where emulation starts + ADDRESS = $1000000; + +// callback for tracing basic blocks +procedure HookBlock(uc: uc_engine; address: UInt64; size: Cardinal; user_data: Pointer); cdecl; +begin + WriteLn(Format('>>> Tracing basic block at 0x%x, block size = 0x%x', [address, size])); +end; + +// callback for tracing instruction +procedure HookCode(uc: uc_engine; address: UInt64; size: Cardinal; user_data: Pointer); cdecl; +var + eflags: integer; +begin + WriteLn(Format('>>> Tracing instruction at 0x%x, instruction size = 0x%x', [address, size])); + uc_reg_read(uc, UC_X86_REG_EFLAGS, @eflags); + WriteLn(Format('>>> --- EFLAGS is 0x%x', [eflags])); +end; + +// callback for tracing instruction +procedure HookCode64(uc: uc_engine; address: UInt64; size: Cardinal; user_data: Pointer); cdecl; +var + rip: UInt64; +begin + WriteLn(Format('>>> Tracing instruction at 0x%x, instruction size = 0x%x', [address, size])); + uc_reg_read(uc, UC_X86_REG_RIP, @rip); + WriteLn(Format('>>> --- RIP is 0x%x', [rip])); +end; + +function HookMemInvalid(uc: uc_engine; _type: uc_mem_type; address: UInt64; size: Cardinal; value: Int64; user_data: Pointer): LongBool; cdecl; +begin + case _type of + UC_MEM_WRITE_UNMAPPED: + begin + WriteLn(Format('>>> Missing memory is being WRITE at 0x%x, data size = %u, data value = 0x%x', [address, size, value])); + // map this memory in with 2MB in size + uc_mem_map(uc, $aaaa0000, 2 * 1024*1024, UC_PROT_ALL); + // return true to indicate we want to continue + Result := true; + end + else + begin + // return false to indicate we want to stop emulation + Result := false; + end; + end; +end; + +procedure HookMem64(uc: uc_engine; _type: uc_mem_type; address: UInt64; size: Cardinal; value: Int64; user_data: Pointer); cdecl; +begin + case _type of + UC_MEM_READ: + begin + WriteLn(Format('>>> Memory is being READ at 0x%x, data size = %u', [address, size])); + end; + UC_MEM_WRITE: + begin + WriteLn(Format('>>> Memory is being WRITE at 0x%x, data size = %u, data value = 0x%x', [address, size, value])); + end; + end; +end; + +// callback for IN instruction (X86). +// this returns the data read from the port +function HookIn(uc: uc_engine; port: UInt32; size: integer; user_data: Pointer): Uint32; cdecl; +var + eip: UInt32; +begin + uc_reg_read(uc, UC_X86_REG_EIP, @eip); + WriteLn(Format('--- reading from port 0x%x, size: %u, address: 0x%x', [port, size, eip])); + case size of + 1: + begin + // read 1 byte to AL + Result := $f1; + end; + 2: + begin + // read 2 byte to AX + Result := $f2; + end; + 4: + begin + // read 4 byte to EAX + Result := $f4; + end; + else + begin + // should never reach this + Result := 0; + end; + end; +end; + +// callback for OUT instruction (X86). +procedure HookOut(uc: uc_engine; port: UInt32; size: integer; value: UInt32; user_data: Pointer); cdecl; +var + tmp, eip: UInt32; +begin + uc_reg_read(uc, UC_X86_REG_EIP, @eip); + WriteLn(Format('--- writing to port 0x%x, size: %u, value: 0x%x, address: 0x%x', [port, size, value, eip])); + + // confirm that value is indeed the value of AL/AX/EAX + case size of + 1: + begin + uc_reg_read(uc, UC_X86_REG_AL, @tmp); + end; + 2: + begin + uc_reg_read(uc, UC_X86_REG_AX, @tmp); + end; + 4: + begin + uc_reg_read(uc, UC_X86_REG_EAX, @tmp); + end; + else + begin + // should never reach this + Exit; + end; + end; + WriteLn(Format('--- register value = 0x%x', [tmp])); +end; + +// callback for SYSCALL instruction (X86). +procedure HookSyscall(uc: uc_engine; user_data: Pointer); cdecl; +var + rax: UInt64; +begin + uc_reg_read(uc, UC_X86_REG_RAX, @rax); + if (rax = $100) then begin + rax := $200; + uc_reg_write(uc, UC_X86_REG_RAX, @rax); + end else + WriteLn(Format('ERROR: was not expecting rax=0x%x in syscall', [rax])); +end; + +procedure TestI386; +var + uc: uc_engine; + err: uc_err; + tmp: UInt32; + trace1, trace2: uc_hook; + r_ecx, r_edx: integer; + r_xmm0,r_xmm1 : array [0..1] of UInt64; +begin + r_ecx := $1234; // ECX register + r_edx := $7890; // EDX register + r_xmm0[0] := $08090a0b0c0d0e0f; r_xmm0[1] := $0001020304050607; + r_xmm1[0] := {%H-}$8090a0b0c0d0e0f0; r_xmm1[1] := $0010203040506070; + + + WriteLn('Emulate i386 code'); + + // Initialize emulator in X86-32bit mode + err := uc_open(UC_ARCH_X86, UC_MODE_32, uc); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_open() with error returned: %u', [err])); + Exit; + end; + + // map 2MB memory for this emulation + uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL); + + // write machine code to be emulated to memory + if (uc_mem_write_(uc, ADDRESS, @X86_CODE32, SizeOf(X86_CODE32) - 1) <> UC_ERR_OK) then begin + WriteLn('Failed to write emulation code to memory, quit!'); + Exit; + end; + + // initialize machine registers + uc_reg_write(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_write(uc, UC_X86_REG_EDX, @r_edx); + uc_reg_write(uc, UC_X86_REG_XMM0, @r_xmm0); + uc_reg_write(uc, UC_X86_REG_XMM1, @r_xmm1); + + // tracing all basic blocks with customized callback + uc_hook_add(uc, trace1, UC_HOOK_BLOCK, @HookBlock, nil, 1, 0,[]); + + // tracing all instruction by having @begin > @end + uc_hook_add(uc, trace2, UC_HOOK_CODE, @HookCode, nil, 1, 0,[]); + + // emulate machine code in infinite time + err := uc_emu_start(uc, ADDRESS, ADDRESS + SizeOf(X86_CODE32) - 1, 0, 0); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_emu_start() with error returned %u: %s', [err, uc_strerror(err)])); + end; + + // now print out some registers + WriteLn('>>> Emulation done. Below is the CPU context'); + + uc_reg_read(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_read(uc, UC_X86_REG_EDX, @r_edx); + uc_reg_read(uc, UC_X86_REG_XMM0, @r_xmm0); + + WriteLn(Format('>>> ECX = 0x%x', [r_ecx])); + WriteLn(Format('>>> EDX = 0x%x', [r_edx])); + WriteLn(Format('>>> XMM0 = 0x%s%s', [IntToHex(r_xmm0[1],16),IntToHex(r_xmm0[0],16)])); + + // read from memory + err := uc_mem_read_(uc, ADDRESS, @tmp, SizeOf(tmp)); + if (err = UC_ERR_OK) then begin + WriteLn(Format('>>> Read 4 bytes from [0x%x] = 0x%x', [ADDRESS, tmp])); + end else begin + WriteLn(Format('>>> Failed to read 4 bytes from [0x%x], err = %u: %s', [ADDRESS, err, uc_strerror(err)])); + end; + + uc_close(uc); +end; + +procedure test_i386_map_ptr(); +var + uc: uc_engine; + err: uc_err; + tmp: UInt32; + trace1, trace2: uc_hook; + mem : Pointer; + r_ecx, r_edx: integer; + r_xmm0,r_xmm1 : array [0..1] of UInt64; +begin + r_ecx := $1234; // ECX register + r_edx := $7890; // EDX register + r_xmm0[0] := $08090a0b0c0d0e0f; r_xmm0[1] := $0001020304050607; + r_xmm1[0] := {%H-}$8090a0b0c0d0e0f0; r_xmm1[1] := $0010203040506070; + + + WriteLn('==================================='); + WriteLn('Emulate i386 code - use uc_mem_map_ptr()'); + + // Initialize emulator in X86-32bit mode + err := uc_open(UC_ARCH_X86, UC_MODE_32, uc); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_open() with error returned: %u', [err])); + Exit; + end; + + mem := AllocMem(2 * 1024 * 1024); + if mem = nil then + begin + Writeln('Failed to Allocmem'); + uc_close(uc); + exit; + end; + + err := uc_mem_map_ptr(uc,ADDRESS,2 * 1024 * 1024,UC_PROT_ALL,mem); + if err <> UC_ERR_OK then + begin + WriteLn(Format('Failed on uc_mem_map_ptr() with error returned: %u - %s', [err,uc_strerror(err)])); + FreeMem(mem,2 * 1024 * 1024); + uc_close(uc); + Exit; + end; + + Move(X86_CODE32,mem^,SizeOf(X86_CODE32)-1); + if CompareMem(mem,@X86_CODE32,SizeOf(X86_CODE32)-1) <> true then + begin + Writeln('Failed to write emulation code to memory, quit!'); + Freemem(mem,2 * 1024 * 1024); + uc_close(uc); + exit; + end; + uc_reg_write(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_write(uc, UC_X86_REG_EDX, @r_edx); + uc_reg_write(uc, UC_X86_REG_XMM0, @r_xmm0); + uc_reg_write(uc, UC_X86_REG_XMM1, @r_xmm1); + + // tracing all basic blocks with customized callback + uc_hook_add(uc, trace1, UC_HOOK_BLOCK, @HookBlock, nil, 1, 0,[]); + + // tracing all instruction by having @begin > @end . + uc_hook_add(uc, trace2, UC_HOOK_CODE, @HookCode, nil, 1, 0,[]); + + // emulate machine code in infinite time + err := uc_emu_start(uc, ADDRESS, ADDRESS + sizeof(X86_CODE32) - 1, 0, 0); + if err <> UC_ERR_OK then + WriteLn(Format('Failed on uc_emu_start() with error returned %u: %s', [err, uc_strerror(err)])); + + Writeln('>>> Emulation done. Below is the CPU context'); + + uc_reg_read(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_read(uc, UC_X86_REG_EDX, @r_edx); + uc_reg_read(uc, UC_X86_REG_XMM0, @r_xmm0); + + WriteLn(Format('>>> ECX = 0x%x', [r_ecx])); + WriteLn(Format('>>> EDX = 0x%x', [r_edx])); + WriteLn(Format('>>> XMM0 = 0x%s%s', [IntToHex(r_xmm0[1],16),IntToHex(r_xmm0[0],16)])); + + // read from memory + err := uc_mem_read_(uc, ADDRESS, @tmp, SizeOf(tmp)); + if (err = UC_ERR_OK) then begin + WriteLn(Format('>>> Read 4 bytes from [0x%x] = 0x%x', [ADDRESS, tmp])); + end else begin + WriteLn(Format('>>> Failed to read 4 bytes from [0x%x], err = %u: %s', [ADDRESS, err, uc_strerror(err)])); + end; + + Freemem(mem,2 * 1024 * 1024); + uc_close(uc); +end; + +procedure TestI386Jump; +var + uc: uc_engine; + err: uc_err; + trace1, trace2: uc_hook; +begin + WriteLn('==================================='); + WriteLn('Emulate i386 code with jump'); + + // Initialize emulator in X86-32bit mode + err := uc_open(UC_ARCH_X86, UC_MODE_32, uc); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_open() with error returned: %u', [err])); + Exit; + end; + + // map 2MB memory for this emulation + uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL); + + // write machine code to be emulated to memory + if (uc_mem_write_(uc, ADDRESS, @X86_CODE32_JUMP, SizeOf(X86_CODE32_JUMP) - 1) <> UC_ERR_OK) then begin + WriteLn('Failed to write emulation code to memory, quit!'); + Exit; + end; + + // tracing 1 basic block with customized callback + uc_hook_add(uc, trace1, UC_HOOK_BLOCK, @HookBlock, nil, ADDRESS, ADDRESS,[]); + + // tracing 1 instruction at ADDRESS + uc_hook_add(uc, trace2, UC_HOOK_CODE, @HookCode, nil, ADDRESS, ADDRESS,[]); + + // emulate machine code in infinite time + err := uc_emu_start(uc, ADDRESS, ADDRESS + SizeOf(X86_CODE32_JUMP) - 1, 0, 0); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_emu_start() with error returned %u: %s', [err, uc_strerror(err)])); + end; + + WriteLn('>>> Emulation done.'); + uc_close(uc); +end; + +procedure TestI386Loop; +var + uc: uc_engine; + err: uc_err; + r_ecx, r_edx: integer; +begin + r_ecx := $1234; // ECX register + r_edx := $7890; // EDX register + WriteLn('==================================='); + WriteLn('Emulate i386 code that loop forever'); + + // Initialize emulator in X86-32bit mode + err := uc_open(UC_ARCH_X86, UC_MODE_32, uc); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_open() with error returned: %u', [err])); + Exit; + end; + + // map 2MB memory for this emulation + uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL); + + // write machine code to be emulated to memory + if (uc_mem_write_(uc, ADDRESS, @X86_CODE32_LOOP, SizeOf(X86_CODE32_LOOP) - 1) <> UC_ERR_OK) then begin + WriteLn('Failed to write emulation code to memory, quit!'); + Exit; + end; + + // initialize machine registers + uc_reg_write(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_write(uc, UC_X86_REG_EDX, @r_edx); + + // emulate machine code in 2 seconds, so we can quit even + // if the code loops + err := uc_emu_start(uc, ADDRESS, ADDRESS + SizeOf(X86_CODE32_LOOP) - 1, 2 * UC_SECOND_SCALE, 0); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_emu_start() with error returned %u: %s', [err, uc_strerror(err)])); + end; + + // now print out some registers + WriteLn('>>> Emulation done. Below is the CPU context'); + + uc_reg_read(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_read(uc, UC_X86_REG_EDX, @r_edx); + WriteLn(Format('>>> ECX = 0x%x', [r_ecx])); + WriteLn(Format('>>> EDX = 0x%x', [r_edx])); + + uc_close(uc); +end; + +procedure TestI386InvalidMemRead; +var + uc: uc_engine; + err: uc_err; + trace1, trace2: uc_hook; + r_ecx, r_edx: integer; +begin + r_ecx := $1234; // ECX register + r_edx := $7890; // EDX register + WriteLn('==================================='); + WriteLn('Emulate i386 code that read from invalid memory'); + + // Initialize emulator in X86-32bit mode + err := uc_open(UC_ARCH_X86, UC_MODE_32, uc); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_open() with error returned: %u', [err])); + Exit; + end; + + // map 2MB memory for this emulation + uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL); + + // write machine code to be emulated to memory + if (uc_mem_write_(uc, ADDRESS, @X86_CODE32_MEM_READ, SizeOf(X86_CODE32_MEM_READ) - 1) <> UC_ERR_OK) then begin + WriteLn('Failed to write emulation code to memory, quit!'); + uc_close(uc); + Exit; + end; + + // initialize machine registers + uc_reg_write(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_write(uc, UC_X86_REG_EDX, @r_edx); + + // tracing all basic blocks with customized callback + uc_hook_add(uc, trace1, UC_HOOK_BLOCK, @HookBlock, nil, 1, 0,[]); + + // tracing all instruction by having @begin > @end + uc_hook_add(uc, trace2, UC_HOOK_CODE, @HookCode, nil, 1, 0,[]); + + err := uc_emu_start(uc, ADDRESS, ADDRESS + SizeOf(X86_CODE32_MEM_READ) - 1, 0, 0); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_emu_start() with error returned %u: %s', [err, uc_strerror(err)])); + end; + + // now print out some registers + WriteLn('>>> Emulation done. Below is the CPU context'); + + uc_reg_read(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_read(uc, UC_X86_REG_EDX, @r_edx); + WriteLn(Format('>>> ECX = 0x%x', [r_ecx])); + WriteLn(Format('>>> EDX = 0x%x', [r_edx])); + + uc_close(uc); +end; + +procedure TestI386InvalidMemWrite; +var + uc: uc_engine; + err: uc_err; + trace1, trace2, trace3: uc_hook; + r_ecx, r_edx: integer; + tmp: UInt32; +begin + r_ecx := $1234; // ECX register + r_edx := $7890; // EDX register + WriteLn('==================================='); + WriteLn('Emulate i386 code that write to invalid memory'); + + // Initialize emulator in X86-32bit mode + err := uc_open(UC_ARCH_X86, UC_MODE_32, uc); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_open() with error returned: %u', [err])); + Exit; + end; + + // map 2MB memory for this emulation + uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL); + + // write machine code to be emulated to memory + if (uc_mem_write_(uc, ADDRESS, @X86_CODE32_MEM_WRITE, SizeOf(X86_CODE32_MEM_WRITE) - 1) <> UC_ERR_OK) then begin + WriteLn('Failed to write emulation code to memory, quit!'); + Exit; + end; + + // initialize machine registers + uc_reg_write(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_write(uc, UC_X86_REG_EDX, @r_edx); + + // tracing all basic blocks with customized callback + uc_hook_add(uc, trace1, UC_HOOK_BLOCK, @HookBlock, nil, 1, 0,[]); + + // tracing all instruction by having @begin > @end + uc_hook_add(uc, trace2, UC_HOOK_CODE, @HookCode, nil, 1, 0,[]); + + // intercept invalid memory events + uc_hook_add(uc, trace3, UC_HOOK_MEM_READ_UNMAPPED or UC_HOOK_MEM_WRITE_UNMAPPED, @HookMemInvalid, nil,1,0,[]); + + err := uc_emu_start(uc, ADDRESS, ADDRESS + SizeOf(X86_CODE32_MEM_WRITE) - 1, 0, 0); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_emu_start() with error returned %u: %s', [err, uc_strerror(err)])); + end; + + // now print out some registers + WriteLn('>>> Emulation done. Below is the CPU context'); + + uc_reg_read(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_read(uc, UC_X86_REG_EDX, @r_edx); + WriteLn(Format('>>> ECX = 0x%x', [r_ecx])); + WriteLn(Format('>>> EDX = 0x%x', [r_edx])); + + // read from memory + err := uc_mem_read_(uc, $aaaaaaaa, @tmp, SizeOf(tmp)); + if (err = UC_ERR_OK) then + WriteLn(Format('>>> Read 4 bytes from [0x%x] = 0x%x', [$aaaaaaaa, tmp])) + else + WriteLn(Format('>>> Failed to read 4 bytes from [0x%x]', [$aaaaaaaa])); + + err := uc_mem_read_(uc, $ffffffaa, @tmp, SizeOf(tmp)); + if (err = UC_ERR_OK) then + WriteLn(Format('>>> Read 4 bytes from [0x%x] = 0x%x', [$ffffffaa, tmp])) + else + WriteLn(Format('>>> Failed to read 4 bytes from [0x%x]', [$ffffffaa])); + + uc_close(uc); +end; + +procedure TestI386JumpInvalid; +var + uc: uc_engine; + err: uc_err; + trace1, trace2: uc_hook; + r_ecx, r_edx: integer; +begin + r_ecx := $1234; // ECX register + r_edx := $7890; // EDX register + WriteLn('==================================='); + WriteLn('Emulate i386 code that jumps to invalid memory'); + + // Initialize emulator in X86-32bit mode + err := uc_open(UC_ARCH_X86, UC_MODE_32, uc); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_open() with error returned: %u', [err])); + Exit; + end; + + // map 2MB memory for this emulation + uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL); + + // write machine code to be emulated to memory + if (uc_mem_write_(uc, ADDRESS, @X86_CODE32_JMP_INVALID, SizeOf(X86_CODE32_JMP_INVALID) - 1) <> UC_ERR_OK) then begin + WriteLn('Failed to write emulation code to memory, quit!'); + uc_close(uc); + Exit; + end; + + // initialize machine registers + uc_reg_write(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_write(uc, UC_X86_REG_EDX, @r_edx); + + // tracing all basic blocks with customized callback + uc_hook_add(uc, trace1, UC_HOOK_BLOCK, @HookBlock, nil, 1, 0,[]); + + // tracing all instruction by having @begin > @end + uc_hook_add(uc, trace2, UC_HOOK_CODE, @HookCode, nil, 1, 0,[]); + + err := uc_emu_start(uc, ADDRESS, ADDRESS + SizeOf(X86_CODE32_JMP_INVALID) - 1, 0, 0); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_emu_start() with error returned %u: %s', [err, uc_strerror(err)])); + end; + + // now print out some registers + WriteLn('>>> Emulation done. Below is the CPU context'); + + uc_reg_read(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_read(uc, UC_X86_REG_EDX, @r_edx); + WriteLn(Format('>>> ECX = 0x%x', [r_ecx])); + WriteLn(Format('>>> EDX = 0x%x', [r_edx])); + + uc_close(uc); +end; + +procedure TestI386Inout; +var + uc: uc_engine; + err: uc_err; + trace1, trace2, trace3, trace4: uc_hook; + r_ecx, r_edx: integer; +begin + r_ecx := $1234; // ECX register + r_edx := $7890; // EDX register + WriteLn('==================================='); + WriteLn('Emulate i386 code with IN/OUT instructions'); + + // Initialize emulator in X86-32bit mode + err := uc_open(UC_ARCH_X86, UC_MODE_32, uc); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_open() with error returned: %u', [err])); + Exit; + end; + + // map 2MB memory for this emulation + uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL); + + // write machine code to be emulated to memory + if (uc_mem_write_(uc, ADDRESS, @X86_CODE32_INOUT, SizeOf(X86_CODE32_INOUT) - 1) <> UC_ERR_OK) then begin + WriteLn('Failed to write emulation code to memory, quit!'); + Exit; + end; + + // initialize machine registers + uc_reg_write(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_write(uc, UC_X86_REG_EDX, @r_edx); + + // tracing all basic blocks with customized callback + uc_hook_add(uc, trace1, UC_HOOK_BLOCK, @HookBlock, nil, 1, 0,[]); + + // tracing all instruction by having @begin > @end + uc_hook_add(uc, trace2, UC_HOOK_CODE, @HookCode, nil, 1, 0,[]); + + // uc IN instruction + uc_hook_add(uc, trace3, UC_HOOK_INSN, @HookIn, nil, 1,0,[UC_X86_INS_IN]); + // uc OUT instruction + uc_hook_add(uc, trace4, UC_HOOK_INSN, @HookOut, nil, 1,0,[UC_X86_INS_OUT]); + + err := uc_emu_start(uc, ADDRESS, ADDRESS + SizeOf(X86_CODE32_INOUT) - 1, 0, 0); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_emu_start() with error returned %u: %s', [err, uc_strerror(err)])); + end; + + // now print out some registers + WriteLn('>>> Emulation done. Below is the CPU context'); + + uc_reg_read(uc, UC_X86_REG_ECX, @r_ecx); + uc_reg_read(uc, UC_X86_REG_EDX, @r_edx); + WriteLn(Format('>>> ECX = 0x%x', [r_ecx])); + WriteLn(Format('>>> EDX = 0x%x', [r_edx])); + + uc_close(uc); +end; + +procedure test_i386_context_save(); +var + uc: uc_engine; + context : uc_context; + err: uc_err; + r_eax : integer; +begin + r_eax := 1; // EAX register + WriteLn('==================================='); + WriteLn('Emulate i386 code - Save/restore CPU context in opaque blob'); + + // Initialize emulator in X86-32bit mode + err := uc_open(UC_ARCH_X86, UC_MODE_32, uc); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_open() with error returned: %u', [err])); + Exit; + end; + + uc_mem_map(uc,ADDRESS,8 * 1024 , UC_PROT_ALL); + + // write machine code to be emulated to memory + if (uc_mem_write_(uc, ADDRESS, @X86_CODE32_INC, SizeOf(X86_CODE32_INC) - 1) <> UC_ERR_OK) then begin + WriteLn('Failed to write emulation code to memory, quit!'); + uc_close(uc); + Exit; + end; + // initialize machine registers + uc_reg_write(uc, UC_X86_REG_EAX, @r_eax); + + // emulate machine code in infinite time + writeln('>>> Running emulation for the first time'); + err := uc_emu_start(uc, ADDRESS, ADDRESS + sizeof(X86_CODE32_INC) - 1, 0, 0); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_emu_start() with error returned %u: %s', [err, uc_strerror(err)])); + end; + + Writeln('>>> Emulation done. Below is the CPU context'); + + uc_reg_read(uc, UC_X86_REG_EAX, @r_eax); + WriteLn(Format('>>> EAX = 0x%x', [r_eax])); + + Writeln('>>> Saving CPU context'); + + err := uc_context_alloc(uc,context); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_context_alloc() with error returned %u : %s', [err, uc_strerror(err)])); + exit; + end; + + err := uc_context_save(uc, context); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_context_save() with error returned %u : %s', [err, uc_strerror(err)])); + exit; + end; + + Writeln('>>> Running emulation for the second time'); + + err := uc_emu_start(uc, ADDRESS, ADDRESS + sizeof(X86_CODE32_INC) - 1, 0, 0); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_emu_start() with error returned %u: %s', [err, uc_strerror(err)])); + end; + + Writeln('>>> Emulation done. Below is the CPU context'); + + uc_reg_read(uc, UC_X86_REG_EAX, @r_eax); + WriteLn(Format('>>> EAX = 0x%x', [r_eax])); + + err := uc_context_restore(uc, context); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_context_restore() with error returned %u: %s', [err, uc_strerror(err)])); + exit; + end; + + Writeln('>>> CPU context restored. Below is the CPU context'); + + uc_reg_read(uc, UC_X86_REG_EAX, @r_eax); + WriteLn(Format('>>> EAX = 0x%x', [r_eax])); + + err := uc_free(context); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_free() with error returned %u: %s', [err, uc_strerror(err)])); + exit; + end; + + uc_close(uc); +end; + +procedure TestX86_64; +var + uc: uc_engine; + err: uc_err; + trace1, trace2, trace3, trace4: uc_hook; + rax, rbx, rcx, rdx, rsi, rdi, r8, r9, r10, r11, r12, r13, r14, r15, rsp: UInt64; +begin + rax := $71f3029efd49d41d; + rbx := $d87b45277f133ddb; + rcx := $ab40d1ffd8afc461; + rdx := $919317b4a733f01; + rsi := $4c24e753a17ea358; + rdi := $e509a57d2571ce96; + r8 := $ea5b108cc2b9ab1f; + r9 := $19ec097c8eb618c1; + r10 := $ec45774f00c5f682; + r11 := $e17e9dbec8c074aa; + r12 := $80f86a8dc0f6d457; + r13 := $48288ca5671c5492; + r14 := $595f72f6e4017f6e; + r15 := $1efd97aea331cccc; + + rsp := ADDRESS + $200000; + + WriteLn('Emulate x86_64 code'); + + // Initialize emulator in X86-64bit mode + err := uc_open(UC_ARCH_X86, UC_MODE_64, uc); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_open() with error returned: %u', [err])); + Exit; + end; + + // map 2MB memory for this emulation + uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL); + + // write machine code to be emulated to memory + if (uc_mem_write_(uc, ADDRESS, @X86_CODE64, SizeOf(X86_CODE64) - 1) <> UC_ERR_OK) then begin + WriteLn('Failed to write emulation code to memory, quit!'); + Exit; + end; + + // initialize machine registers + uc_reg_write(uc, UC_X86_REG_RSP, @rsp); + + uc_reg_write(uc, UC_X86_REG_RAX, @rax); + uc_reg_write(uc, UC_X86_REG_RBX, @rbx); + uc_reg_write(uc, UC_X86_REG_RCX, @rcx); + uc_reg_write(uc, UC_X86_REG_RDX, @rdx); + uc_reg_write(uc, UC_X86_REG_RSI, @rsi); + uc_reg_write(uc, UC_X86_REG_RDI, @rdi); + uc_reg_write(uc, UC_X86_REG_R8, @r8); + uc_reg_write(uc, UC_X86_REG_R9, @r9); + uc_reg_write(uc, UC_X86_REG_R10, @r10); + uc_reg_write(uc, UC_X86_REG_R11, @r11); + uc_reg_write(uc, UC_X86_REG_R12, @r12); + uc_reg_write(uc, UC_X86_REG_R13, @r13); + uc_reg_write(uc, UC_X86_REG_R14, @r14); + uc_reg_write(uc, UC_X86_REG_R15, @r15); + + // tracing all basic blocks with customized callback + uc_hook_add(uc, trace1, UC_HOOK_BLOCK, @HookBlock, nil, 1, 0,[]); + + // tracing all instruction by having @begin > @end + uc_hook_add(uc, trace2, UC_HOOK_CODE, @HookCode64, nil, ADDRESS, ADDRESS + 20,[]); + + // tracing all memory WRITE access (with @begin > @end) + uc_hook_add(uc, trace3, UC_HOOK_MEM_WRITE, @HookMem64, nil, 1, 0,[]); + // tracing all memory READ access (with @begin > @end) + uc_hook_add(uc, trace4, UC_HOOK_MEM_READ, @HookMem64, nil, 1, 0,[]); + + err := uc_emu_start(uc, ADDRESS, ADDRESS + SizeOf(X86_CODE64) - 1, 0, 0); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_emu_start() with error returned %u: %s', [err, uc_strerror(err)])); + end; + + // now print out some registers + WriteLn('>>> Emulation done. Below is the CPU context'); + + uc_reg_read(uc, UC_X86_REG_RAX, @rax); + uc_reg_read(uc, UC_X86_REG_RBX, @rbx); + uc_reg_read(uc, UC_X86_REG_RCX, @rcx); + uc_reg_read(uc, UC_X86_REG_RDX, @rdx); + uc_reg_read(uc, UC_X86_REG_RSI, @rsi); + uc_reg_read(uc, UC_X86_REG_RDI, @rdi); + uc_reg_read(uc, UC_X86_REG_R8, @r8); + uc_reg_read(uc, UC_X86_REG_R9, @r9); + uc_reg_read(uc, UC_X86_REG_R10, @r10); + uc_reg_read(uc, UC_X86_REG_R11, @r11); + uc_reg_read(uc, UC_X86_REG_R12, @r12); + uc_reg_read(uc, UC_X86_REG_R13, @r13); + uc_reg_read(uc, UC_X86_REG_R14, @r14); + uc_reg_read(uc, UC_X86_REG_R15, @r15); + + WriteLn(Format('>>> RAX = 0x%.16x', [rax])); + WriteLn(Format('>>> RBX = 0x%.16x', [rbx])); + WriteLn(Format('>>> RCX = 0x%.16x', [rcx])); + WriteLn(Format('>>> RDX = 0x%.16x', [rdx])); + WriteLn(Format('>>> RSI = 0x%.16x', [rsi])); + WriteLn(Format('>>> RDI = 0x%.16x', [rdi])); + WriteLn(Format('>>> R8 = 0x%.16x', [r8])); + WriteLn(Format('>>> R9 = 0x%.16x', [r9])); + WriteLn(Format('>>> R10 = 0x%.16x', [r10])); + WriteLn(Format('>>> R11 = 0x%.16x', [r11])); + WriteLn(Format('>>> R12 = 0x%.16x', [r12])); + WriteLn(Format('>>> R13 = 0x%.16x', [r13])); + WriteLn(Format('>>> R14 = 0x%.16x', [r14])); + WriteLn(Format('>>> R15 = 0x%.16x', [r15])); + + uc_close(uc); +end; + +procedure TestX86_64Syscall; +var + uc: uc_engine; + err: uc_err; + trace1: uc_hook; + rax: UInt64; +begin + rax := $100; + WriteLn('==================================='); + WriteLn('Emulate x86_64 code with "syscall" instruction'); + + // Initialize emulator in X86-64bit mode + err := uc_open(UC_ARCH_X86, UC_MODE_64, uc); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_open() with error returned: %u', [err])); + Exit; + end; + + // map 2MB memory for this emulation + uc_mem_map(uc, ADDRESS, 2 * 1024 * 1024, UC_PROT_ALL); + + // write machine code to be emulated to memory + if (uc_mem_write_(uc, ADDRESS, @X86_CODE64_SYSCALL, SizeOf(X86_CODE64_SYSCALL) - 1) <> UC_ERR_OK) then begin + WriteLn('Failed to write emulation code to memory, quit!'); + Exit; + end; + + // hook interrupts for syscall + uc_hook_add(uc, trace1, UC_HOOK_INSN, @HookSyscall, nil, 1 , 0 , [UC_X86_INS_SYSCALL]); + + // initialize machine registers + uc_reg_write(uc, UC_X86_REG_RAX, @rax); + + // emulate machine code in infinite time (last param = 0), or when + // finishing all the code. + err := uc_emu_start(uc, ADDRESS, ADDRESS + SizeOf(X86_CODE64_SYSCALL) - 1, 0, 0); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_emu_start() with error returned %u: %s', [err, uc_strerror(err)])); + end; + + // now print out some registers + WriteLn('>>> Emulation done. Below is the CPU context'); + + uc_reg_read(uc, UC_X86_REG_RAX, @rax); + WriteLn(Format('>>> RAX = 0x%x', [rax])); + + uc_close(uc); +end; + +procedure TestX86_16; +var + uc: uc_engine; + err: uc_err; + tmp: Word; + eax, ebx, esi: UInt32; +begin + eax := 7; + ebx := 5; + esi := 6; + + WriteLn('Emulate x86 16-bit code'); + + // Initialize emulator in X86-16bit mode + err := uc_open(UC_ARCH_X86, UC_MODE_16, uc); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_open() with error returned: %u', [err])); + Exit; + end; + + // map 8KB memory for this emulation + uc_mem_map(uc, 0, 8 * 1024, UC_PROT_ALL); + + // write machine code to be emulated to memory + if (uc_mem_write_(uc, 0, @X86_CODE16, SizeOf(X86_CODE16) - 1) <> UC_ERR_OK) then begin + WriteLn('Failed to write emulation code to memory, quit!'); + Exit; + end; + + // initialize machine registers + uc_reg_write(uc, UC_X86_REG_EAX, @eax); + uc_reg_write(uc, UC_X86_REG_EBX, @ebx); + uc_reg_write(uc, UC_X86_REG_ESI, @esi); + + // emulate machine code in infinite time (last param = 0), or when + // finishing all the code. + err := uc_emu_start(uc, 0, SizeOf(X86_CODE16) - 1, 0, 0); + if (err <> UC_ERR_OK) then begin + WriteLn(Format('Failed on uc_emu_start() with error returned %u: %s', [err, uc_strerror(err)])); + end; + + // now print out some registers + WriteLn('>>> Emulation done. Below is the CPU context'); + + err := uc_mem_read_(uc, 11, @tmp, 1); + if (err = UC_ERR_OK) then + WriteLn(Format('>>> Read 1 bytes from [0x%x] = 0x%x', [11, tmp])) + else + WriteLn(Format('>>> Failed to read 1 bytes from [0x%x]', [11])); + + uc_close(uc); +end; + +begin + if ParamCount > 0 then begin + if (ParamStr(1) = '-32') then begin + TestI386; + test_i386_map_ptr; + test_i386_context_save; + TestI386Inout; + TestI386Jump; + TestI386Loop; + TestI386InvalidMemRead; + TestI386InvalidMemWrite; + TestI386JumpInvalid; + end; + + if (ParamStr(1) = '-64') then begin + TestX86_64; + TestX86_64Syscall; + end; + + if (ParamStr(1) = '-16') then begin + TestX86_16; + end; + + end else + WriteLn(#10'Syntax: SampleX86 <-16|-32|-64>'#10); +end. diff --git a/bindings/pascal/examples/x86.lps b/bindings/pascal/examples/x86.lps new file mode 100644 index 00000000..8ea924ec --- /dev/null +++ b/bindings/pascal/examples/x86.lps @@ -0,0 +1,197 @@ +<?xml version="1.0" encoding="UTF-8"?> +<CONFIG> + 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AUTO-GENERATED FILE, DO NOT EDIT + +unit Arm64Const; + +interface + +const +// ARM64 registers + + UC_ARM64_REG_INVALID = 0; + UC_ARM64_REG_X29 = 1; + UC_ARM64_REG_X30 = 2; + UC_ARM64_REG_NZCV = 3; + UC_ARM64_REG_SP = 4; + UC_ARM64_REG_WSP = 5; + UC_ARM64_REG_WZR = 6; + UC_ARM64_REG_XZR = 7; + UC_ARM64_REG_B0 = 8; + UC_ARM64_REG_B1 = 9; + UC_ARM64_REG_B2 = 10; + UC_ARM64_REG_B3 = 11; + UC_ARM64_REG_B4 = 12; + UC_ARM64_REG_B5 = 13; + UC_ARM64_REG_B6 = 14; + UC_ARM64_REG_B7 = 15; + UC_ARM64_REG_B8 = 16; + UC_ARM64_REG_B9 = 17; + UC_ARM64_REG_B10 = 18; + UC_ARM64_REG_B11 = 19; + UC_ARM64_REG_B12 = 20; + UC_ARM64_REG_B13 = 21; + UC_ARM64_REG_B14 = 22; + UC_ARM64_REG_B15 = 23; + UC_ARM64_REG_B16 = 24; + UC_ARM64_REG_B17 = 25; + UC_ARM64_REG_B18 = 26; + UC_ARM64_REG_B19 = 27; + UC_ARM64_REG_B20 = 28; + UC_ARM64_REG_B21 = 29; + UC_ARM64_REG_B22 = 30; + UC_ARM64_REG_B23 = 31; + UC_ARM64_REG_B24 = 32; + UC_ARM64_REG_B25 = 33; + UC_ARM64_REG_B26 = 34; + UC_ARM64_REG_B27 = 35; + UC_ARM64_REG_B28 = 36; + UC_ARM64_REG_B29 = 37; + UC_ARM64_REG_B30 = 38; + UC_ARM64_REG_B31 = 39; + UC_ARM64_REG_D0 = 40; + UC_ARM64_REG_D1 = 41; + UC_ARM64_REG_D2 = 42; + UC_ARM64_REG_D3 = 43; + UC_ARM64_REG_D4 = 44; + UC_ARM64_REG_D5 = 45; + UC_ARM64_REG_D6 = 46; + UC_ARM64_REG_D7 = 47; + UC_ARM64_REG_D8 = 48; + UC_ARM64_REG_D9 = 49; + UC_ARM64_REG_D10 = 50; + UC_ARM64_REG_D11 = 51; + UC_ARM64_REG_D12 = 52; + UC_ARM64_REG_D13 = 53; + UC_ARM64_REG_D14 = 54; + UC_ARM64_REG_D15 = 55; + UC_ARM64_REG_D16 = 56; + UC_ARM64_REG_D17 = 57; + UC_ARM64_REG_D18 = 58; + UC_ARM64_REG_D19 = 59; + UC_ARM64_REG_D20 = 60; + UC_ARM64_REG_D21 = 61; + UC_ARM64_REG_D22 = 62; + UC_ARM64_REG_D23 = 63; + UC_ARM64_REG_D24 = 64; + UC_ARM64_REG_D25 = 65; + UC_ARM64_REG_D26 = 66; + UC_ARM64_REG_D27 = 67; + UC_ARM64_REG_D28 = 68; + UC_ARM64_REG_D29 = 69; + UC_ARM64_REG_D30 = 70; + UC_ARM64_REG_D31 = 71; + UC_ARM64_REG_H0 = 72; + UC_ARM64_REG_H1 = 73; + UC_ARM64_REG_H2 = 74; + UC_ARM64_REG_H3 = 75; + UC_ARM64_REG_H4 = 76; + UC_ARM64_REG_H5 = 77; + UC_ARM64_REG_H6 = 78; + UC_ARM64_REG_H7 = 79; + UC_ARM64_REG_H8 = 80; + UC_ARM64_REG_H9 = 81; + UC_ARM64_REG_H10 = 82; + UC_ARM64_REG_H11 = 83; + UC_ARM64_REG_H12 = 84; + UC_ARM64_REG_H13 = 85; + UC_ARM64_REG_H14 = 86; + UC_ARM64_REG_H15 = 87; + UC_ARM64_REG_H16 = 88; + UC_ARM64_REG_H17 = 89; + UC_ARM64_REG_H18 = 90; + UC_ARM64_REG_H19 = 91; + UC_ARM64_REG_H20 = 92; + UC_ARM64_REG_H21 = 93; + UC_ARM64_REG_H22 = 94; + UC_ARM64_REG_H23 = 95; + UC_ARM64_REG_H24 = 96; + UC_ARM64_REG_H25 = 97; + UC_ARM64_REG_H26 = 98; + UC_ARM64_REG_H27 = 99; + UC_ARM64_REG_H28 = 100; + UC_ARM64_REG_H29 = 101; + UC_ARM64_REG_H30 = 102; + UC_ARM64_REG_H31 = 103; + UC_ARM64_REG_Q0 = 104; + UC_ARM64_REG_Q1 = 105; + UC_ARM64_REG_Q2 = 106; + UC_ARM64_REG_Q3 = 107; + UC_ARM64_REG_Q4 = 108; + UC_ARM64_REG_Q5 = 109; + UC_ARM64_REG_Q6 = 110; + UC_ARM64_REG_Q7 = 111; + UC_ARM64_REG_Q8 = 112; + UC_ARM64_REG_Q9 = 113; + UC_ARM64_REG_Q10 = 114; + UC_ARM64_REG_Q11 = 115; + UC_ARM64_REG_Q12 = 116; + UC_ARM64_REG_Q13 = 117; + UC_ARM64_REG_Q14 = 118; + UC_ARM64_REG_Q15 = 119; + UC_ARM64_REG_Q16 = 120; + UC_ARM64_REG_Q17 = 121; + UC_ARM64_REG_Q18 = 122; + UC_ARM64_REG_Q19 = 123; + UC_ARM64_REG_Q20 = 124; + UC_ARM64_REG_Q21 = 125; + UC_ARM64_REG_Q22 = 126; + UC_ARM64_REG_Q23 = 127; + UC_ARM64_REG_Q24 = 128; + UC_ARM64_REG_Q25 = 129; + UC_ARM64_REG_Q26 = 130; + UC_ARM64_REG_Q27 = 131; + UC_ARM64_REG_Q28 = 132; + UC_ARM64_REG_Q29 = 133; + UC_ARM64_REG_Q30 = 134; + UC_ARM64_REG_Q31 = 135; + UC_ARM64_REG_S0 = 136; + UC_ARM64_REG_S1 = 137; + UC_ARM64_REG_S2 = 138; + UC_ARM64_REG_S3 = 139; + UC_ARM64_REG_S4 = 140; + UC_ARM64_REG_S5 = 141; + UC_ARM64_REG_S6 = 142; + UC_ARM64_REG_S7 = 143; + UC_ARM64_REG_S8 = 144; + UC_ARM64_REG_S9 = 145; + UC_ARM64_REG_S10 = 146; + UC_ARM64_REG_S11 = 147; + UC_ARM64_REG_S12 = 148; + UC_ARM64_REG_S13 = 149; + UC_ARM64_REG_S14 = 150; + UC_ARM64_REG_S15 = 151; + UC_ARM64_REG_S16 = 152; + UC_ARM64_REG_S17 = 153; + UC_ARM64_REG_S18 = 154; + UC_ARM64_REG_S19 = 155; + UC_ARM64_REG_S20 = 156; + UC_ARM64_REG_S21 = 157; + UC_ARM64_REG_S22 = 158; + UC_ARM64_REG_S23 = 159; + UC_ARM64_REG_S24 = 160; + UC_ARM64_REG_S25 = 161; + UC_ARM64_REG_S26 = 162; + UC_ARM64_REG_S27 = 163; + UC_ARM64_REG_S28 = 164; + UC_ARM64_REG_S29 = 165; + UC_ARM64_REG_S30 = 166; + UC_ARM64_REG_S31 = 167; + UC_ARM64_REG_W0 = 168; + UC_ARM64_REG_W1 = 169; + UC_ARM64_REG_W2 = 170; + UC_ARM64_REG_W3 = 171; + UC_ARM64_REG_W4 = 172; + UC_ARM64_REG_W5 = 173; + UC_ARM64_REG_W6 = 174; + UC_ARM64_REG_W7 = 175; + UC_ARM64_REG_W8 = 176; + UC_ARM64_REG_W9 = 177; + UC_ARM64_REG_W10 = 178; + UC_ARM64_REG_W11 = 179; + UC_ARM64_REG_W12 = 180; + UC_ARM64_REG_W13 = 181; + UC_ARM64_REG_W14 = 182; + UC_ARM64_REG_W15 = 183; + UC_ARM64_REG_W16 = 184; + UC_ARM64_REG_W17 = 185; + UC_ARM64_REG_W18 = 186; + UC_ARM64_REG_W19 = 187; + UC_ARM64_REG_W20 = 188; + UC_ARM64_REG_W21 = 189; + UC_ARM64_REG_W22 = 190; + UC_ARM64_REG_W23 = 191; + UC_ARM64_REG_W24 = 192; + UC_ARM64_REG_W25 = 193; + UC_ARM64_REG_W26 = 194; + UC_ARM64_REG_W27 = 195; + UC_ARM64_REG_W28 = 196; + UC_ARM64_REG_W29 = 197; + UC_ARM64_REG_W30 = 198; + UC_ARM64_REG_X0 = 199; + UC_ARM64_REG_X1 = 200; + UC_ARM64_REG_X2 = 201; + UC_ARM64_REG_X3 = 202; + UC_ARM64_REG_X4 = 203; + UC_ARM64_REG_X5 = 204; + UC_ARM64_REG_X6 = 205; + UC_ARM64_REG_X7 = 206; + UC_ARM64_REG_X8 = 207; + UC_ARM64_REG_X9 = 208; + UC_ARM64_REG_X10 = 209; + UC_ARM64_REG_X11 = 210; + UC_ARM64_REG_X12 = 211; + UC_ARM64_REG_X13 = 212; + UC_ARM64_REG_X14 = 213; + UC_ARM64_REG_X15 = 214; + UC_ARM64_REG_X16 = 215; + UC_ARM64_REG_X17 = 216; + UC_ARM64_REG_X18 = 217; + UC_ARM64_REG_X19 = 218; + UC_ARM64_REG_X20 = 219; + UC_ARM64_REG_X21 = 220; + UC_ARM64_REG_X22 = 221; + UC_ARM64_REG_X23 = 222; + UC_ARM64_REG_X24 = 223; + UC_ARM64_REG_X25 = 224; + UC_ARM64_REG_X26 = 225; + UC_ARM64_REG_X27 = 226; + UC_ARM64_REG_X28 = 227; + UC_ARM64_REG_V0 = 228; + UC_ARM64_REG_V1 = 229; + UC_ARM64_REG_V2 = 230; + UC_ARM64_REG_V3 = 231; + UC_ARM64_REG_V4 = 232; + UC_ARM64_REG_V5 = 233; + UC_ARM64_REG_V6 = 234; + UC_ARM64_REG_V7 = 235; + UC_ARM64_REG_V8 = 236; + UC_ARM64_REG_V9 = 237; + UC_ARM64_REG_V10 = 238; + UC_ARM64_REG_V11 = 239; + UC_ARM64_REG_V12 = 240; + UC_ARM64_REG_V13 = 241; + UC_ARM64_REG_V14 = 242; + UC_ARM64_REG_V15 = 243; + UC_ARM64_REG_V16 = 244; + UC_ARM64_REG_V17 = 245; + UC_ARM64_REG_V18 = 246; + UC_ARM64_REG_V19 = 247; + UC_ARM64_REG_V20 = 248; + UC_ARM64_REG_V21 = 249; + UC_ARM64_REG_V22 = 250; + UC_ARM64_REG_V23 = 251; + UC_ARM64_REG_V24 = 252; + UC_ARM64_REG_V25 = 253; + UC_ARM64_REG_V26 = 254; + UC_ARM64_REG_V27 = 255; + UC_ARM64_REG_V28 = 256; + UC_ARM64_REG_V29 = 257; + UC_ARM64_REG_V30 = 258; + UC_ARM64_REG_V31 = 259; + +// pseudo registers + UC_ARM64_REG_PC = 260; + UC_ARM64_REG_CPACR_EL1 = 261; + +// thread registers + UC_ARM64_REG_TPIDR_EL0 = 262; + UC_ARM64_REG_TPIDRRO_EL0 = 263; + UC_ARM64_REG_TPIDR_EL1 = 264; + UC_ARM64_REG_ENDING = 265; + +// alias registers + UC_ARM64_REG_IP0 = 215; + UC_ARM64_REG_IP1 = 216; + UC_ARM64_REG_FP = 1; + UC_ARM64_REG_LR = 2; + +implementation +end. \ No newline at end of file diff --git a/bindings/pascal/unicorn/ArmConst.pas b/bindings/pascal/unicorn/ArmConst.pas new file mode 100644 index 00000000..aa66f119 --- /dev/null +++ b/bindings/pascal/unicorn/ArmConst.pas @@ -0,0 +1,136 @@ +// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT + +unit ArmConst; + +interface + +const +// ARM registers + + UC_ARM_REG_INVALID = 0; + UC_ARM_REG_APSR = 1; + UC_ARM_REG_APSR_NZCV = 2; + UC_ARM_REG_CPSR = 3; + UC_ARM_REG_FPEXC = 4; + UC_ARM_REG_FPINST = 5; + UC_ARM_REG_FPSCR = 6; + UC_ARM_REG_FPSCR_NZCV = 7; + UC_ARM_REG_FPSID = 8; + UC_ARM_REG_ITSTATE = 9; + UC_ARM_REG_LR = 10; + UC_ARM_REG_PC = 11; + UC_ARM_REG_SP = 12; + UC_ARM_REG_SPSR = 13; + UC_ARM_REG_D0 = 14; + UC_ARM_REG_D1 = 15; + UC_ARM_REG_D2 = 16; + UC_ARM_REG_D3 = 17; + UC_ARM_REG_D4 = 18; + UC_ARM_REG_D5 = 19; + UC_ARM_REG_D6 = 20; + UC_ARM_REG_D7 = 21; + UC_ARM_REG_D8 = 22; + UC_ARM_REG_D9 = 23; + UC_ARM_REG_D10 = 24; + UC_ARM_REG_D11 = 25; + UC_ARM_REG_D12 = 26; + UC_ARM_REG_D13 = 27; + UC_ARM_REG_D14 = 28; + UC_ARM_REG_D15 = 29; + UC_ARM_REG_D16 = 30; + UC_ARM_REG_D17 = 31; + UC_ARM_REG_D18 = 32; + UC_ARM_REG_D19 = 33; + UC_ARM_REG_D20 = 34; + UC_ARM_REG_D21 = 35; + UC_ARM_REG_D22 = 36; + UC_ARM_REG_D23 = 37; + UC_ARM_REG_D24 = 38; + UC_ARM_REG_D25 = 39; + UC_ARM_REG_D26 = 40; + UC_ARM_REG_D27 = 41; + UC_ARM_REG_D28 = 42; + UC_ARM_REG_D29 = 43; + UC_ARM_REG_D30 = 44; + UC_ARM_REG_D31 = 45; + UC_ARM_REG_FPINST2 = 46; + UC_ARM_REG_MVFR0 = 47; + UC_ARM_REG_MVFR1 = 48; + UC_ARM_REG_MVFR2 = 49; + UC_ARM_REG_Q0 = 50; + UC_ARM_REG_Q1 = 51; + UC_ARM_REG_Q2 = 52; + UC_ARM_REG_Q3 = 53; + UC_ARM_REG_Q4 = 54; + UC_ARM_REG_Q5 = 55; + UC_ARM_REG_Q6 = 56; + UC_ARM_REG_Q7 = 57; + UC_ARM_REG_Q8 = 58; + UC_ARM_REG_Q9 = 59; + UC_ARM_REG_Q10 = 60; + UC_ARM_REG_Q11 = 61; + UC_ARM_REG_Q12 = 62; + UC_ARM_REG_Q13 = 63; + UC_ARM_REG_Q14 = 64; + UC_ARM_REG_Q15 = 65; + UC_ARM_REG_R0 = 66; + UC_ARM_REG_R1 = 67; + UC_ARM_REG_R2 = 68; + UC_ARM_REG_R3 = 69; + UC_ARM_REG_R4 = 70; + UC_ARM_REG_R5 = 71; + UC_ARM_REG_R6 = 72; + UC_ARM_REG_R7 = 73; + UC_ARM_REG_R8 = 74; + UC_ARM_REG_R9 = 75; + UC_ARM_REG_R10 = 76; + UC_ARM_REG_R11 = 77; + UC_ARM_REG_R12 = 78; + UC_ARM_REG_S0 = 79; + UC_ARM_REG_S1 = 80; + UC_ARM_REG_S2 = 81; + UC_ARM_REG_S3 = 82; + UC_ARM_REG_S4 = 83; + UC_ARM_REG_S5 = 84; + UC_ARM_REG_S6 = 85; + UC_ARM_REG_S7 = 86; + UC_ARM_REG_S8 = 87; + UC_ARM_REG_S9 = 88; + UC_ARM_REG_S10 = 89; + UC_ARM_REG_S11 = 90; + UC_ARM_REG_S12 = 91; + UC_ARM_REG_S13 = 92; + UC_ARM_REG_S14 = 93; + UC_ARM_REG_S15 = 94; + UC_ARM_REG_S16 = 95; + UC_ARM_REG_S17 = 96; + UC_ARM_REG_S18 = 97; + UC_ARM_REG_S19 = 98; + UC_ARM_REG_S20 = 99; + UC_ARM_REG_S21 = 100; + UC_ARM_REG_S22 = 101; + UC_ARM_REG_S23 = 102; + UC_ARM_REG_S24 = 103; + UC_ARM_REG_S25 = 104; + UC_ARM_REG_S26 = 105; + UC_ARM_REG_S27 = 106; + UC_ARM_REG_S28 = 107; + UC_ARM_REG_S29 = 108; + UC_ARM_REG_S30 = 109; + UC_ARM_REG_S31 = 110; + UC_ARM_REG_C1_C0_2 = 111; + UC_ARM_REG_C13_C0_2 = 112; + UC_ARM_REG_C13_C0_3 = 113; + UC_ARM_REG_ENDING = 114; + +// alias registers + UC_ARM_REG_R13 = 12; + UC_ARM_REG_R14 = 10; + UC_ARM_REG_R15 = 11; + UC_ARM_REG_SB = 75; + UC_ARM_REG_SL = 76; + UC_ARM_REG_FP = 77; + UC_ARM_REG_IP = 78; + +implementation +end. \ No newline at end of file diff --git a/bindings/pascal/unicorn/M68kConst.pas b/bindings/pascal/unicorn/M68kConst.pas new file mode 100644 index 00000000..be78f78a --- /dev/null +++ b/bindings/pascal/unicorn/M68kConst.pas @@ -0,0 +1,32 @@ +// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT + +unit M68kConst; + +interface + +const +// M68K registers + + UC_M68K_REG_INVALID = 0; + UC_M68K_REG_A0 = 1; + UC_M68K_REG_A1 = 2; + UC_M68K_REG_A2 = 3; + UC_M68K_REG_A3 = 4; + UC_M68K_REG_A4 = 5; + UC_M68K_REG_A5 = 6; + UC_M68K_REG_A6 = 7; + UC_M68K_REG_A7 = 8; + UC_M68K_REG_D0 = 9; + UC_M68K_REG_D1 = 10; + UC_M68K_REG_D2 = 11; + UC_M68K_REG_D3 = 12; + UC_M68K_REG_D4 = 13; + UC_M68K_REG_D5 = 14; + UC_M68K_REG_D6 = 15; + UC_M68K_REG_D7 = 16; + UC_M68K_REG_SR = 17; + UC_M68K_REG_PC = 18; + UC_M68K_REG_ENDING = 19; + +implementation +end. \ No newline at end of file diff --git a/bindings/pascal/unicorn/MipsConst.pas b/bindings/pascal/unicorn/MipsConst.pas new file mode 100644 index 00000000..4094eb7f --- /dev/null +++ b/bindings/pascal/unicorn/MipsConst.pas @@ -0,0 +1,203 @@ +// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT + +unit MipsConst; + +interface + +const +// MIPS registers + + UC_MIPS_REG_INVALID = 0; + +// General purpose registers + UC_MIPS_REG_PC = 1; + UC_MIPS_REG_0 = 2; + UC_MIPS_REG_1 = 3; + UC_MIPS_REG_2 = 4; + UC_MIPS_REG_3 = 5; + UC_MIPS_REG_4 = 6; + UC_MIPS_REG_5 = 7; + UC_MIPS_REG_6 = 8; + UC_MIPS_REG_7 = 9; + UC_MIPS_REG_8 = 10; + UC_MIPS_REG_9 = 11; + UC_MIPS_REG_10 = 12; + UC_MIPS_REG_11 = 13; + UC_MIPS_REG_12 = 14; + UC_MIPS_REG_13 = 15; + UC_MIPS_REG_14 = 16; + UC_MIPS_REG_15 = 17; + UC_MIPS_REG_16 = 18; + UC_MIPS_REG_17 = 19; + UC_MIPS_REG_18 = 20; + UC_MIPS_REG_19 = 21; + UC_MIPS_REG_20 = 22; + UC_MIPS_REG_21 = 23; + UC_MIPS_REG_22 = 24; + UC_MIPS_REG_23 = 25; + UC_MIPS_REG_24 = 26; + UC_MIPS_REG_25 = 27; + UC_MIPS_REG_26 = 28; + UC_MIPS_REG_27 = 29; + UC_MIPS_REG_28 = 30; + UC_MIPS_REG_29 = 31; + UC_MIPS_REG_30 = 32; + UC_MIPS_REG_31 = 33; + +// DSP registers + UC_MIPS_REG_DSPCCOND = 34; + UC_MIPS_REG_DSPCARRY = 35; + UC_MIPS_REG_DSPEFI = 36; + UC_MIPS_REG_DSPOUTFLAG = 37; + UC_MIPS_REG_DSPOUTFLAG16_19 = 38; + UC_MIPS_REG_DSPOUTFLAG20 = 39; + UC_MIPS_REG_DSPOUTFLAG21 = 40; + UC_MIPS_REG_DSPOUTFLAG22 = 41; + UC_MIPS_REG_DSPOUTFLAG23 = 42; + UC_MIPS_REG_DSPPOS = 43; + UC_MIPS_REG_DSPSCOUNT = 44; + +// ACC registers + UC_MIPS_REG_AC0 = 45; + UC_MIPS_REG_AC1 = 46; + UC_MIPS_REG_AC2 = 47; + UC_MIPS_REG_AC3 = 48; + +// COP registers + UC_MIPS_REG_CC0 = 49; + UC_MIPS_REG_CC1 = 50; + UC_MIPS_REG_CC2 = 51; + UC_MIPS_REG_CC3 = 52; + UC_MIPS_REG_CC4 = 53; + UC_MIPS_REG_CC5 = 54; + UC_MIPS_REG_CC6 = 55; + UC_MIPS_REG_CC7 = 56; + +// FPU registers + UC_MIPS_REG_F0 = 57; + UC_MIPS_REG_F1 = 58; + UC_MIPS_REG_F2 = 59; + UC_MIPS_REG_F3 = 60; + UC_MIPS_REG_F4 = 61; + UC_MIPS_REG_F5 = 62; + UC_MIPS_REG_F6 = 63; + UC_MIPS_REG_F7 = 64; + UC_MIPS_REG_F8 = 65; + UC_MIPS_REG_F9 = 66; + UC_MIPS_REG_F10 = 67; + UC_MIPS_REG_F11 = 68; + UC_MIPS_REG_F12 = 69; + UC_MIPS_REG_F13 = 70; + UC_MIPS_REG_F14 = 71; + UC_MIPS_REG_F15 = 72; + UC_MIPS_REG_F16 = 73; + UC_MIPS_REG_F17 = 74; + UC_MIPS_REG_F18 = 75; + UC_MIPS_REG_F19 = 76; + UC_MIPS_REG_F20 = 77; + UC_MIPS_REG_F21 = 78; + UC_MIPS_REG_F22 = 79; + UC_MIPS_REG_F23 = 80; + UC_MIPS_REG_F24 = 81; + UC_MIPS_REG_F25 = 82; + UC_MIPS_REG_F26 = 83; + UC_MIPS_REG_F27 = 84; + UC_MIPS_REG_F28 = 85; + UC_MIPS_REG_F29 = 86; + UC_MIPS_REG_F30 = 87; + UC_MIPS_REG_F31 = 88; + UC_MIPS_REG_FCC0 = 89; + UC_MIPS_REG_FCC1 = 90; + UC_MIPS_REG_FCC2 = 91; + UC_MIPS_REG_FCC3 = 92; + UC_MIPS_REG_FCC4 = 93; + UC_MIPS_REG_FCC5 = 94; + UC_MIPS_REG_FCC6 = 95; + UC_MIPS_REG_FCC7 = 96; + +// AFPR128 + UC_MIPS_REG_W0 = 97; + UC_MIPS_REG_W1 = 98; + UC_MIPS_REG_W2 = 99; + UC_MIPS_REG_W3 = 100; + UC_MIPS_REG_W4 = 101; + UC_MIPS_REG_W5 = 102; + UC_MIPS_REG_W6 = 103; + UC_MIPS_REG_W7 = 104; + UC_MIPS_REG_W8 = 105; + UC_MIPS_REG_W9 = 106; + UC_MIPS_REG_W10 = 107; + UC_MIPS_REG_W11 = 108; + UC_MIPS_REG_W12 = 109; + UC_MIPS_REG_W13 = 110; + UC_MIPS_REG_W14 = 111; + UC_MIPS_REG_W15 = 112; + UC_MIPS_REG_W16 = 113; + UC_MIPS_REG_W17 = 114; + UC_MIPS_REG_W18 = 115; + UC_MIPS_REG_W19 = 116; + UC_MIPS_REG_W20 = 117; + UC_MIPS_REG_W21 = 118; + UC_MIPS_REG_W22 = 119; + UC_MIPS_REG_W23 = 120; + UC_MIPS_REG_W24 = 121; + UC_MIPS_REG_W25 = 122; + UC_MIPS_REG_W26 = 123; + UC_MIPS_REG_W27 = 124; + UC_MIPS_REG_W28 = 125; + UC_MIPS_REG_W29 = 126; + UC_MIPS_REG_W30 = 127; + UC_MIPS_REG_W31 = 128; + UC_MIPS_REG_HI = 129; + UC_MIPS_REG_LO = 130; + UC_MIPS_REG_P0 = 131; + UC_MIPS_REG_P1 = 132; + UC_MIPS_REG_P2 = 133; + UC_MIPS_REG_MPL0 = 134; + UC_MIPS_REG_MPL1 = 135; + UC_MIPS_REG_MPL2 = 136; + UC_MIPS_REG_ENDING = 137; + UC_MIPS_REG_ZERO = 2; + UC_MIPS_REG_AT = 3; + UC_MIPS_REG_V0 = 4; + UC_MIPS_REG_V1 = 5; + UC_MIPS_REG_A0 = 6; + UC_MIPS_REG_A1 = 7; + UC_MIPS_REG_A2 = 8; + UC_MIPS_REG_A3 = 9; + UC_MIPS_REG_T0 = 10; + UC_MIPS_REG_T1 = 11; + UC_MIPS_REG_T2 = 12; + UC_MIPS_REG_T3 = 13; + UC_MIPS_REG_T4 = 14; + UC_MIPS_REG_T5 = 15; + UC_MIPS_REG_T6 = 16; + UC_MIPS_REG_T7 = 17; + UC_MIPS_REG_S0 = 18; + UC_MIPS_REG_S1 = 19; + UC_MIPS_REG_S2 = 20; + UC_MIPS_REG_S3 = 21; + UC_MIPS_REG_S4 = 22; + UC_MIPS_REG_S5 = 23; + UC_MIPS_REG_S6 = 24; + UC_MIPS_REG_S7 = 25; + UC_MIPS_REG_T8 = 26; + UC_MIPS_REG_T9 = 27; + UC_MIPS_REG_K0 = 28; + UC_MIPS_REG_K1 = 29; + UC_MIPS_REG_GP = 30; + UC_MIPS_REG_SP = 31; + UC_MIPS_REG_FP = 32; + UC_MIPS_REG_S8 = 32; + UC_MIPS_REG_RA = 33; + UC_MIPS_REG_HI0 = 45; + UC_MIPS_REG_HI1 = 46; + UC_MIPS_REG_HI2 = 47; + UC_MIPS_REG_HI3 = 48; + UC_MIPS_REG_LO0 = 45; + UC_MIPS_REG_LO1 = 46; + UC_MIPS_REG_LO2 = 47; + UC_MIPS_REG_LO3 = 48; + +implementation +end. \ No newline at end of file diff --git a/bindings/pascal/unicorn/SparcConst.pas b/bindings/pascal/unicorn/SparcConst.pas new file mode 100644 index 00000000..32ed3013 --- /dev/null +++ b/bindings/pascal/unicorn/SparcConst.pas @@ -0,0 +1,104 @@ +// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT + +unit SparcConst; + +interface + +const +// SPARC registers + + UC_SPARC_REG_INVALID = 0; + UC_SPARC_REG_F0 = 1; + UC_SPARC_REG_F1 = 2; + UC_SPARC_REG_F2 = 3; + UC_SPARC_REG_F3 = 4; + UC_SPARC_REG_F4 = 5; + UC_SPARC_REG_F5 = 6; + UC_SPARC_REG_F6 = 7; + UC_SPARC_REG_F7 = 8; + UC_SPARC_REG_F8 = 9; + UC_SPARC_REG_F9 = 10; + UC_SPARC_REG_F10 = 11; + UC_SPARC_REG_F11 = 12; + UC_SPARC_REG_F12 = 13; + UC_SPARC_REG_F13 = 14; + UC_SPARC_REG_F14 = 15; + UC_SPARC_REG_F15 = 16; + UC_SPARC_REG_F16 = 17; + UC_SPARC_REG_F17 = 18; + UC_SPARC_REG_F18 = 19; + UC_SPARC_REG_F19 = 20; + UC_SPARC_REG_F20 = 21; + UC_SPARC_REG_F21 = 22; + UC_SPARC_REG_F22 = 23; + UC_SPARC_REG_F23 = 24; + UC_SPARC_REG_F24 = 25; + UC_SPARC_REG_F25 = 26; + UC_SPARC_REG_F26 = 27; + UC_SPARC_REG_F27 = 28; + UC_SPARC_REG_F28 = 29; + UC_SPARC_REG_F29 = 30; + UC_SPARC_REG_F30 = 31; + UC_SPARC_REG_F31 = 32; + UC_SPARC_REG_F32 = 33; + UC_SPARC_REG_F34 = 34; + UC_SPARC_REG_F36 = 35; + UC_SPARC_REG_F38 = 36; + UC_SPARC_REG_F40 = 37; + UC_SPARC_REG_F42 = 38; + UC_SPARC_REG_F44 = 39; + UC_SPARC_REG_F46 = 40; + UC_SPARC_REG_F48 = 41; + UC_SPARC_REG_F50 = 42; + UC_SPARC_REG_F52 = 43; + UC_SPARC_REG_F54 = 44; + UC_SPARC_REG_F56 = 45; + UC_SPARC_REG_F58 = 46; + UC_SPARC_REG_F60 = 47; + UC_SPARC_REG_F62 = 48; + UC_SPARC_REG_FCC0 = 49; + UC_SPARC_REG_FCC1 = 50; + UC_SPARC_REG_FCC2 = 51; + UC_SPARC_REG_FCC3 = 52; + UC_SPARC_REG_G0 = 53; + UC_SPARC_REG_G1 = 54; + UC_SPARC_REG_G2 = 55; + UC_SPARC_REG_G3 = 56; + UC_SPARC_REG_G4 = 57; + UC_SPARC_REG_G5 = 58; + UC_SPARC_REG_G6 = 59; + UC_SPARC_REG_G7 = 60; + UC_SPARC_REG_I0 = 61; + UC_SPARC_REG_I1 = 62; + UC_SPARC_REG_I2 = 63; + UC_SPARC_REG_I3 = 64; + UC_SPARC_REG_I4 = 65; + UC_SPARC_REG_I5 = 66; + UC_SPARC_REG_FP = 67; + UC_SPARC_REG_I7 = 68; + UC_SPARC_REG_ICC = 69; + UC_SPARC_REG_L0 = 70; + UC_SPARC_REG_L1 = 71; + UC_SPARC_REG_L2 = 72; + UC_SPARC_REG_L3 = 73; + UC_SPARC_REG_L4 = 74; + UC_SPARC_REG_L5 = 75; + UC_SPARC_REG_L6 = 76; + UC_SPARC_REG_L7 = 77; + UC_SPARC_REG_O0 = 78; + UC_SPARC_REG_O1 = 79; + UC_SPARC_REG_O2 = 80; + UC_SPARC_REG_O3 = 81; + UC_SPARC_REG_O4 = 82; + UC_SPARC_REG_O5 = 83; + UC_SPARC_REG_SP = 84; + UC_SPARC_REG_O7 = 85; + UC_SPARC_REG_Y = 86; + UC_SPARC_REG_XCC = 87; + UC_SPARC_REG_PC = 88; + UC_SPARC_REG_ENDING = 89; + UC_SPARC_REG_O6 = 84; + UC_SPARC_REG_I6 = 67; + +implementation +end. \ No newline at end of file diff --git a/bindings/pascal/unicorn/UnicornConst.pas b/bindings/pascal/unicorn/UnicornConst.pas new file mode 100644 index 00000000..5c44151d --- /dev/null +++ b/bindings/pascal/unicorn/UnicornConst.pas @@ -0,0 +1,111 @@ +// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT + +unit UnicornConst; + +interface + +const UC_API_MAJOR = 1; + + UC_API_MINOR = 0; + UC_VERSION_MAJOR = 1; + + UC_VERSION_MINOR = 0; + UC_VERSION_EXTRA = 2; + UC_SECOND_SCALE = 1000000; + UC_MILISECOND_SCALE = 1000; + UC_ARCH_ARM = 1; + UC_ARCH_ARM64 = 2; + UC_ARCH_MIPS = 3; + UC_ARCH_X86 = 4; + UC_ARCH_PPC = 5; + UC_ARCH_SPARC = 6; + UC_ARCH_M68K = 7; + UC_ARCH_MAX = 8; + + UC_MODE_LITTLE_ENDIAN = 0; + UC_MODE_BIG_ENDIAN = 1073741824; + + UC_MODE_ARM = 0; + UC_MODE_THUMB = 16; + UC_MODE_MCLASS = 32; + UC_MODE_V8 = 64; + UC_MODE_MICRO = 16; + UC_MODE_MIPS3 = 32; + UC_MODE_MIPS32R6 = 64; + UC_MODE_MIPS32 = 4; + UC_MODE_MIPS64 = 8; + UC_MODE_16 = 2; + UC_MODE_32 = 4; + UC_MODE_64 = 8; + UC_MODE_PPC32 = 4; + UC_MODE_PPC64 = 8; + UC_MODE_QPX = 16; + UC_MODE_SPARC32 = 4; + UC_MODE_SPARC64 = 8; + UC_MODE_V9 = 16; + + UC_ERR_OK = 0; + UC_ERR_NOMEM = 1; + UC_ERR_ARCH = 2; + UC_ERR_HANDLE = 3; + UC_ERR_MODE = 4; + UC_ERR_VERSION = 5; + UC_ERR_READ_UNMAPPED = 6; + UC_ERR_WRITE_UNMAPPED = 7; + UC_ERR_FETCH_UNMAPPED = 8; + UC_ERR_HOOK = 9; + UC_ERR_INSN_INVALID = 10; + UC_ERR_MAP = 11; + UC_ERR_WRITE_PROT = 12; + UC_ERR_READ_PROT = 13; + UC_ERR_FETCH_PROT = 14; + UC_ERR_ARG = 15; + UC_ERR_READ_UNALIGNED = 16; + UC_ERR_WRITE_UNALIGNED = 17; + UC_ERR_FETCH_UNALIGNED = 18; + UC_ERR_HOOK_EXIST = 19; + UC_ERR_RESOURCE = 20; + UC_ERR_EXCEPTION = 21; + UC_MEM_READ = 16; + UC_MEM_WRITE = 17; + UC_MEM_FETCH = 18; + UC_MEM_READ_UNMAPPED = 19; + UC_MEM_WRITE_UNMAPPED = 20; + UC_MEM_FETCH_UNMAPPED = 21; + UC_MEM_WRITE_PROT = 22; + UC_MEM_READ_PROT = 23; + UC_MEM_FETCH_PROT = 24; + UC_MEM_READ_AFTER = 25; + UC_HOOK_INTR = 1; + UC_HOOK_INSN = 2; + UC_HOOK_CODE = 4; + UC_HOOK_BLOCK = 8; + UC_HOOK_MEM_READ_UNMAPPED = 16; + UC_HOOK_MEM_WRITE_UNMAPPED = 32; + UC_HOOK_MEM_FETCH_UNMAPPED = 64; + UC_HOOK_MEM_READ_PROT = 128; + UC_HOOK_MEM_WRITE_PROT = 256; + UC_HOOK_MEM_FETCH_PROT = 512; + UC_HOOK_MEM_READ = 1024; + UC_HOOK_MEM_WRITE = 2048; + UC_HOOK_MEM_FETCH = 4096; + UC_HOOK_MEM_READ_AFTER = 8192; + UC_HOOK_MEM_UNMAPPED = 112; + UC_HOOK_MEM_PROT = 896; + UC_HOOK_MEM_READ_INVALID = 144; + UC_HOOK_MEM_WRITE_INVALID = 288; + UC_HOOK_MEM_FETCH_INVALID = 576; + UC_HOOK_MEM_INVALID = 1008; + UC_HOOK_MEM_VALID = 7168; + UC_QUERY_MODE = 1; + UC_QUERY_PAGE_SIZE = 2; + UC_QUERY_ARCH = 3; + + UC_PROT_NONE = 0; + UC_PROT_READ = 1; + UC_PROT_WRITE = 2; + UC_PROT_EXEC = 4; + UC_PROT_ALL = 7; + +implementation +end. \ No newline at end of file diff --git a/bindings/pascal/unicorn/Unicorn_dyn.pas b/bindings/pascal/unicorn/Unicorn_dyn.pas new file mode 100755 index 00000000..7db6bae7 --- /dev/null +++ b/bindings/pascal/unicorn/Unicorn_dyn.pas @@ -0,0 +1,673 @@ +{ + FreePascal/Delphi bindings for the UnicornEngine Emulator Engine \ + Tested On Mac - Win - Linux >> with FreePascal v3.0.4 & Delphi Berlin 10.2 . + + Copyright(c) 2018 Coldzer0 <Coldzer0 [at] protonmail.ch> . + + License: GPLv2 . +} + +unit Unicorn_dyn; + +{$IFDEF FPC} + {$MODE Delphi} + {$PackRecords C} +{$ENDIF} + +interface + +uses + {$IFDEF FPC}dynlibs,Crt{$ELSE} + {$ifdef mswindows} + windows,sysutils + {$ENDIF} + {$ENDIF}; + + +const +{$IFDEF Darwin} + UNICORN_LIB = './libunicorn.dylib'; +{$ENDIF} +{$ifdef Linux} + UNICORN_LIB = './libunicorn.so'; +{$endif} +{$ifdef mswindows} + UNICORN_LIB = './unicorn.dll'; +{$endif} + +type + uc_engine = Pointer; + uc_context = Pointer; // Opaque storage for CPU context, used with uc_context_*() + uc_hook = UIntPtr; + uc_arch = Cardinal; + uc_mode = Cardinal; + uc_err = Cardinal; + uc_query_type = Cardinal; + + {$IFNDEF FPC} // Delphi Support . + PUInt32 = ^UInt32; + {$ENDIF} + +type + { + Callback functions + Callback function for tracing code (UC_HOOK_CODE & UC_HOOK_BLOCK) + @address: address where the code is being executed + @size: size of machine instruction(s) being executed, or 0 when size is unknown + @user_data: user data passed to tracing APIs. + } + uc_cb_hookcode_t = procedure(uc : uc_engine; address : UInt64; size : UInt32; user_data : Pointer); cdecl; + + { + Callback function for tracing interrupts (for uc_hook_intr()) + @intno: interrupt number + @user_data: user data passed to tracing APIs. + } + uc_cb_hookintr_t = procedure(uc : uc_engine; intno : UInt32; user_data : Pointer); cdecl; + + { + Callback function for tracing IN instruction of X86 + @port: port number + @size: data size (1/2/4) to be read from this port + @user_data: user data passed to tracing APIs. + } + uc_cb_insn_in_t = function(uc : uc_engine; port : UInt32; siz : integer; user_data : Pointer) : UInt32; cdecl; + + { + Callback function for OUT instruction of X86 . + @port: port number + @size: data size (1/2/4) to be written to this port + @value: data value to be written to this port + } + uc_cb_insn_out_t = procedure(uc : uc_engine; port : UInt32; size : integer; value : UInt32; user_data : Pointer); cdecl; + + // All type of memory accesses for UC_HOOK_MEM_* + uc_mem_type = integer; + + // All type of hooks for uc_hook_add() API. + uc_hook_type = integer; + + { + Callback function for hooking memory (UC_MEM_READ, UC_MEM_WRITE & UC_MEM_FETCH) + @type: this memory is being READ, or WRITE + @address: address where the code is being executed + @size: size of data being read or written + @value: value of data being written to memory, or irrelevant if type = READ. + @user_data: user data passed to tracing APIs + } + uc_cb_hookmem_t = procedure(uc : uc_engine; _type : uc_mem_type; address : UInt64; size : integer; value : Int64; user_data : Pointer); cdecl; + + { + Callback function for handling invalid memory access events (UNMAPPED and + PROT events) + + @type: this memory is being READ, or WRITE + @address: address where the code is being executed + @size: size of data being read or written + @value: value of data being written to memory, or irrelevant if type = READ. + @user_data: user data passed to tracing APIs + + @return: return true to continue, or false to stop program (due to invalid memory). + NOTE: returning true to continue execution will only work if if the accessed + memory is made accessible with the correct permissions during the hook. + + In the event of a UC_MEM_READ_UNMAPPED or UC_MEM_WRITE_UNMAPPED callback, + the memory should be uc_mem_map()-ed with the correct permissions, and the + instruction will then read or write to the address as it was supposed to. + + In the event of a UC_MEM_FETCH_UNMAPPED callback, the memory can be mapped + in as executable, in which case execution will resume from the fetched address. + The instruction pointer may be written to in order to change where execution resumes, + but the fetch must succeed if execution is to resume. + } + uc_cb_eventmem_t = function(uc : uc_engine; _type : uc_mem_type; address : UInt64; size : integer; value : Int64; user_data : Pointer) : LongBool; cdecl; + + +type + { + Memory region mapped by uc_mem_map() and uc_mem_map_ptr() + Retrieve the list of memory regions with uc_mem_regions() + } + uc_mem_region = record + rBegin : UInt64; // begin address of the region (inclusive) + rEnd : UInt64; // end address of the region (inclusive) + rPerms : UInt32; // memory permissions of the region + end; + uc_mem_regionArray = array[0..(MaxInt div SizeOf(uc_mem_region))-1] of uc_mem_region; + Puc_mem_regionArray = ^uc_mem_regionArray; + + +// Exports +var +(* + Return combined API version & major and minor version numbers. + + @major: major number of API version + @minor: minor number of API version + + @return hexical number as (major << 8 | minor), which encodes both + major & minor versions. + NOTE: This returned value can be compared with version number made + with macro UC_MAKE_VERSION . + + For example, second API version would return 1 in @major, and 1 in @minor + The return value would be 0x0101 + + NOTE: if you only care about returned value, but not major and minor values, + set both @major & @minor arguments to NULL. +*) + uc_version : function (var major, minor : Cardinal) : Cardinal; cdecl; + +(* + Determine if the given architecture is supported by this library. + + @arch: architecture type (UC_ARCH_* ) + + @return True if this library supports the given arch. +*) + uc_arch_supported : function (arch : uc_arch) : LongBool; cdecl; + +(* + Create new instance of unicorn engine. + + @arch: architecture type (UC_ARCH_* ) + @mode: hardware mode. This is combined of UC_MODE_* + @uc: pointer to uc_engine, which will be updated at return time + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*) + uc_open : function (arch : uc_arch; mode : uc_mode; var uc : uc_engine) : uc_err; cdecl; + +(* + Close UC instance: MUST do to release the handle when it is not used anymore. + NOTE: this must be called only when there is no longer usage of Unicorn. + The reason is the this API releases some cached memory, thus access to any + Unicorn API after uc_close() might crash your application. + After this, @uc is invalid, and nolonger usable. + + @uc: pointer to a handle returned by uc_open() + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*) + uc_close : function (uc : uc_engine) : uc_err; cdecl; + +(* + Query internal status of engine. + + @uc: handle returned by uc_open() + @type: query type. See uc_query_type + + @result: save the internal status queried . + + @return: error code of uc_err enum type (UC_ERR_*, see above) +*) + uc_query : function (uc : uc_engine; qtype : uc_query_type; result : PCardinal) : uc_err ; cdecl; + + +(* + Report the last error number when some API function fail. + Like glibc's errno, uc_errno might not retain its old value once accessed. + + @uc: handle returned by uc_open() + + @return: error code of uc_err enum type (UC_ERR_*, see above) +*) + uc_errno : function (uc : uc_engine) : uc_err; cdecl; + +(* + Return a string describing given error code. + + @code: error code (see UC_ERR_* ) + + @return: returns a pointer to a string that describes the error code + passed in the argument @code +*) + uc_strerror : function (code : uc_err) : PAnsiChar; cdecl; + +(* + Write to register. + + @uc: handle returned by uc_open() + @regid: register ID that is to be modified. + @value: pointer to the value that will set to register @regid . + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum \ + for detailed error). +*) + uc_reg_write : function (uc : uc_engine; regid : Integer; const value : Pointer) : uc_err; cdecl; + +(* + Read register value. + + @uc: handle returned by uc_open() + @regid: register ID that is to be retrieved. + @value: pointer to a variable storing the register value. + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*) + uc_reg_read: function (uc : uc_engine; regid : Integer; value : Pointer) : uc_err; cdecl ; + + +(* + Write multiple register values. + + @uc: handle returned by uc_open() + @rges: array of register IDs to store + @value: pointer to array of register values + @count: length of both *regs and *vals + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*) + uc_reg_write_batch : function(uc : uc_engine; regs : PIntegerArray; const values : Pointer; count : Integer) : uc_err; cdecl; + +(* + Read multiple register values. + + @uc: handle returned by uc_open() + @rges: array of register IDs to retrieve + @value: pointer to array of values to hold registers + @count: length of both *regs and *vals + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*) + uc_reg_read_batch : function(uc : uc_engine; regs : PIntegerArray; var values : Pointer; count : integer) : uc_err; cdecl; + +(* + Write to a range of bytes in memory. + + @uc: handle returned by uc_open() + @address: starting memory address of bytes to set. + @bytes: pointer to a variable containing data to be written to memory. + @size: size of memory to write to. + + NOTE: @bytes must be big enough to contain @size bytes. + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum \ + for detailed error). +*) + uc_mem_write_ : function (uc : uc_engine; address : UInt64; const bytes : Pointer; + size : Cardinal) : uc_err; cdecl; + +(* + Read a range of bytes in memory. + + @uc: handle returned by uc_open() + @address: starting memory address of bytes to get. + @bytes: pointer to a variable containing data copied from memory. + @size: size of memory to read. + + NOTE: @bytes must be big enough to contain @size bytes. + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*) + uc_mem_read_ : function (uc : uc_engine; address : UInt64; bytes : Pointer; + size : Cardinal) : uc_err; cdecl; + +(* + Emulate machine code in a specific duration of time. + + @uc: handle returned by uc_open() + @begin: address where emulation starts + @until: address where emulation stops (i.e when this address is hit) + @timeout: duration to emulate the code (in microseconds). When this value is 0, + we will emulate the code in infinite time, until the code is finished. + @count: the number of instructions to be emulated. When this value is 0, + we will emulate all the code available, until the code is finished. + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*) + uc_emu_start : function (uc : uc_engine; _begin, _until , timeout : UInt64; + count : Cardinal) : uc_err; cdecl; + +(* + Stop emulation (which was started by uc_emu_start() API. + This is typically called from callback functions registered via tracing APIs. + NOTE: for now, this will stop the execution only after the current block. + + @uc: handle returned by uc_open() + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*) + uc_emu_stop : function (uc : uc_engine) : uc_err; cdecl; + +(* +function (uc : uc_engine; var hh : uc_hook; _type : integer; + callback : Pointer; user_data : Pointer; _Begin, _End : UInt64; args : Array Of Const) : uc_err; cdecl; + +Register callback for a hook event. +The callback will be run when the hook event is hit. + +@uc: handle returned by uc_open() +@hh: hook handle returned from this registration. To be used in uc_hook_del() API +@type: hook type +@callback: callback to be run when instruction is hit +@user_data: user-defined data. This will be passed to callback function in its + last argument @user_data +@begin: start address of the area where the callback is effect (inclusive) +@end: end address of the area where the callback is effect (inclusive) + NOTE 1: the callback is called only if related address is in range [@begin, @end] + NOTE 2: if @begin > @end, callback is called whenever this hook type is triggered +@...: variable arguments (depending on @type) + NOTE: if @type = UC_HOOK_INSN, this is the instruction ID (ex: UC_X86_INS_OUT) + +@return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*) + uc_hook_add : function (uc : uc_engine; var hh : uc_hook; _type : integer; + callback : Pointer; user_data : Pointer; _Begin, _End : UInt64; args : Array Of Const) : uc_err; cdecl; + + //uc_hook_add_1 : function (uc : uc_engine; var hh : uc_hook; _type : integer; + // callback : Pointer; user_data : Pointer; _Begin, _End : UInt64; arg1 : integer) : uc_err; cdecl; + // + //uc_hook_add_2 : function (uc : uc_engine; var hh : uc_hook; _type : integer; + // callback : Pointer; user_data : Pointer; _Begin, _End : UInt64; arg1, arg2 : UInt64) : uc_err; cdecl; + // +(* + Unregister (remove) a hook callback. + This API removes the hook callback registered by uc_hook_add(). + NOTE: this should be called only when you no longer want to trace. + After this, @hh is invalid, and nolonger usable. + + @uc: handle returned by uc_open() + @hh: handle returned by uc_hook_add() + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum \ + for detailed error). +*) + uc_hook_del : function (uc : uc_engine; hh : uc_hook) : uc_err; cdecl ; + +(* + Map memory in for emulation. + This API adds a memory region that can be used by emulation. + + @uc: handle returned by uc_open() + @address: starting address of the new memory region to be mapped in. + This address must be aligned to 4KB, or this will return with UC_ERR_ARG error. + @size: size of the new memory region to be mapped in. + This size must be multiple of 4KB, or this will return with UC_ERR_ARG error. + @perms: Permissions for the newly mapped region. + This must be some combination of UC_PROT_READ | UC_PROT_WRITE | UC_PROT_EXEC, + or this will return with UC_ERR_ARG error. + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*) + uc_mem_map : function (uc : uc_engine; address : UInt64; size : Cardinal; perms : UInt32) : uc_err; cdecl; + + +(* + Map existing host memory in for emulation. + This API adds a memory region that can be used by emulation. + + @uc: handle returned by uc_open() + @address: starting address of the new memory region to be mapped in. + This address must be aligned to 4KB, or this will return with UC_ERR_ARG error. + @size: size of the new memory region to be mapped in. + This size must be multiple of 4KB, or this will return with UC_ERR_ARG error. + @perms: Permissions for the newly mapped region. + This must be some combination of UC_PROT_READ | UC_PROT_WRITE | UC_PROT_EXEC, + or this will return with UC_ERR_ARG error. + @ptr: pointer to host memory backing the newly mapped memory. This host memory is + expected to be an equal or larger size than provided, and be mapped with at + least PROT_READ | PROT_WRITE. If it is not, the resulting behavior is undefined. + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*) + uc_mem_map_ptr : function(uc : uc_engine; address : UInt64; size : Cardinal; perms : UInt32; ptr : Pointer) : uc_err; cdecl; + + +(* + Unmap a region of emulation memory. + This API deletes a memory mapping from the emulation memory space. + + @handle: handle returned by uc_open() + @address: starting address of the memory region to be unmapped. + This address must be aligned to 4KB, or this will return with UC_ERR_ARG error. + @size: size of the memory region to be modified. + This size must be multiple of 4KB, or this will return with UC_ERR_ARG error. + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum \ + for detailed error). +*) + uc_mem_unmap : function (uc : uc_engine; address : UInt64; size : Cardinal) : uc_err; cdecl ; + +(* + Set memory permissions for emulation memory. + This API changes permissions on an existing memory region. + + @handle: handle returned by uc_open() + @address: starting address of the memory region to be modified. + This address must be aligned to 4KB, or this will return with UC_ERR_ARG error. + @size: size of the memory region to be modified. + This size must be multiple of 4KB, or this will return with UC_ERR_ARG error. + @perms: New permissions for the mapped region. + This must be some combination of UC_PROT_READ | UC_PROT_WRITE | UC_PROT_EXEC, + or this will return with UC_ERR_ARG error. + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum \ + for detailed error). +*) + uc_mem_protect : function (uc : uc_engine; address : UInt64; size : Cardinal; perms : UInt32) : uc_err; cdecl ; + +(* + Retrieve all memory regions mapped by uc_mem_map() and uc_mem_map_ptr() + This API allocates memory for @regions, and user must free this memory later + by free() to avoid leaking memory. + NOTE: memory regions may be splitted by uc_mem_unmap() + + @uc: handle returned by uc_open() + @regions: pointer to an array of uc_mem_region struct. >> Check "Puc_mem_regionArray" + This is allocated by Unicorn, and must be freed by user later. + @count: pointer to number of struct uc_mem_region contained in @regions + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*) + uc_mem_regions : function(uc : uc_engine; var regions : Puc_mem_regionArray; count : PUInt32) : uc_err; cdecl ; + +(* + Allocate a region that can be used with uc_context_{save,restore} to perform + quick save/rollback of the CPU context, which includes registers and some + internal metadata. Contexts may not be shared across engine instances with + differing arches or modes. + + @uc: handle returned by uc_open() + @context: pointer to a uc_engine*. This will be updated with the pointer to + the new context on successful return of this function. + Later, this allocated memory must be freed with uc_free(). + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*) + uc_context_alloc : function ( uc : uc_engine; var context : uc_context) : uc_err; cdecl ; + +(* + Free the memory allocated by uc_context_alloc & uc_mem_regions. + + @mem: memory allocated by uc_context_alloc (returned in *context), or + by uc_mem_regions (returned in *regions) + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum \ + for detailed error). +*) + uc_free : function (context : Pointer) : uc_err; cdecl ; + + +(* + Save a copy of the internal CPU context. + This API should be used to efficiently make or update a saved copy of the + internal CPU state. + + @uc: handle returned by uc_open() + @context: handle returned by uc_context_alloc() + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum \ + for detailed error). +*) + uc_context_save : function ( uc : uc_engine; context : uc_context) : uc_err; cdecl; + +(* + Restore the current CPU context from a saved copy. + This API should be used to roll the CPU context back to a previous + state saved by uc_context_save(). + + @uc: handle returned by uc_open() + @context: handle returned by uc_context_alloc that has been used with uc_context_save + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum \ + for detailed error). +*) + uc_context_restore : function(uc : uc_engine; context : uc_context) : uc_err; cdecl; + + +{============================= Global Functions ================================} + +// function uc_hook_add(uc : uc_engine; var hh : uc_hook; _type : integer; +// callback : Pointer; user_data : Pointer; mBegin, mEnd : UInt64) : uc_err; overload; + //function uc_hook_add(uc : uc_engine; var hh : uc_hook; _type : integer; + // callback : Pointer; user_data : Pointer; mBegin, mEnd , arg1 : UInt64) : uc_err; overload; + //function uc_hook_add(uc : uc_engine; var hh : uc_hook; _type : integer; + // callback : Pointer; user_data : Pointer; mBegin, mEnd , arg1, arg2 : UInt64) : uc_err; overload; + // + + function UC_MAKE_VERSION(major,minor : Cardinal): Cardinal; + +implementation + +function UC_MAKE_VERSION(major,minor : Cardinal): Cardinal; +begin + Result := ((major shl 8) + minor); +end; + +var + UC_Handle : {$IFDEF FPC}dynlibs.{$ENDIF}HModule; + +function dyn_loadfunc(name : {$IFDEF FPC}string{$ELSE}PChar{$ENDIF}) : Pointer; +begin + Result := {$IFDEF FPC}dynlibs.{$ENDIF}GetProcAddress(UC_Handle,name); +end; + +function loadUC(): Boolean; +var + LastError : String; +begin + Result := false; + UC_Handle := {$IFDEF FPC}dynlibs.{$ENDIF}LoadLibrary(UNICORN_LIB); + if UC_Handle <> 0 then + begin + @uc_version := dyn_loadfunc('uc_version'); + if (@uc_version = nil) then exit(false); + + @uc_arch_supported := dyn_loadfunc('uc_arch_supported'); + if (@uc_arch_supported = nil) then exit(false); + + @uc_open := dyn_loadfunc('uc_open'); + if (@uc_open = nil) then exit(false); + + @uc_close := dyn_loadfunc('uc_close'); + if (@uc_close = nil) then exit(false); + + @uc_query := dyn_loadfunc('uc_query'); + if (@uc_query = nil) then exit(false); + + @uc_errno := dyn_loadfunc('uc_errno'); + if (@uc_errno = nil) then exit(false); + + @uc_strerror := dyn_loadfunc('uc_strerror'); + if (@uc_strerror = nil) then exit(false); + + @uc_reg_write := dyn_loadfunc('uc_reg_write'); + if (@uc_reg_write = nil) then exit(false); + + @uc_reg_read := dyn_loadfunc('uc_reg_read'); + if (@uc_reg_read = nil) then exit(false); + + @uc_reg_write_batch := dyn_loadfunc('uc_reg_write_batch'); + if (@uc_reg_write_batch = nil) then exit(false); + + @uc_reg_read_batch := dyn_loadfunc('uc_reg_read_batch'); + if (@uc_reg_read_batch = nil) then exit(false); + + @uc_mem_write_ := dyn_loadfunc('uc_mem_write'); + if (@uc_mem_write_ = nil) then exit(false); + + @uc_mem_read_ := dyn_loadfunc('uc_mem_read'); + if (@uc_mem_read_ = nil) then exit(false); + + @uc_emu_start := dyn_loadfunc('uc_emu_start'); + if (@uc_emu_start = nil) then exit(false); + + @uc_emu_stop := dyn_loadfunc('uc_emu_stop'); + if (@uc_emu_stop = nil) then exit(false); + + @uc_hook_add := dyn_loadfunc('uc_hook_add'); + if (@uc_hook_add = nil) then exit(false); + + @uc_hook_del := dyn_loadfunc('uc_hook_del'); + if (@uc_hook_del = nil) then exit(false); + + @uc_mem_map := dyn_loadfunc('uc_mem_map'); + if (@uc_mem_map = nil) then exit(false); + + @uc_mem_map_ptr := dyn_loadfunc('uc_mem_map_ptr'); + if (@uc_mem_map_ptr = nil) then exit(false); + + @uc_mem_unmap := dyn_loadfunc('uc_mem_unmap'); + if (@uc_mem_unmap = nil) then exit(false); + + @uc_mem_protect := dyn_loadfunc('uc_mem_protect'); + if (@uc_mem_protect = nil) then exit(false); + + @uc_mem_regions := dyn_loadfunc('uc_mem_regions'); + if (@uc_mem_regions = nil) then exit(false); + + @uc_context_alloc := dyn_loadfunc('uc_context_alloc'); + if (@uc_context_alloc = nil) then exit(false); + + @uc_context_save := dyn_loadfunc('uc_context_save'); + if (@uc_context_save = nil) then exit(false); + + @uc_context_restore := dyn_loadfunc('uc_context_restore'); + if (@uc_context_restore = nil) then exit(false); + + @uc_free := dyn_loadfunc('uc_free'); + if (@uc_free = nil) then exit(false); + + Result := true; + end + else + begin + {$IFDEF FPC}TextColor(LightRed);{$ENDIF} + LastError := {$IFDEF FPC}GetLoadErrorStr;{$ELSE} + {$ifdef mswindows} + SysErrorMessage(GetLastError,UC_Handle); + SetLastError(0); + {$ENDIF} + {$ENDIF} + WriteLn('error while loading unicorn library : ',LastError,#10); + {$IFDEF FPC}NormVideo;{$ENDIF} + end; +end; + +procedure FreeUC(); +begin + if UC_Handle <> 0 then + {$IFDEF FPC}dynlibs.{$ENDIF}FreeLibrary(UC_Handle); +end; + +initialization + UC_Handle := 0; + if not loadUC then halt(0); + +finalization + FreeUC(); +end. diff --git a/bindings/pascal/unicorn/X86Const.pas b/bindings/pascal/unicorn/X86Const.pas new file mode 100644 index 00000000..2b2f986c --- /dev/null +++ b/bindings/pascal/unicorn/X86Const.pas @@ -0,0 +1,1604 @@ +// For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT + +unit X86Const; + +interface + +const +// X86 registers + + UC_X86_REG_INVALID = 0; + UC_X86_REG_AH = 1; + UC_X86_REG_AL = 2; + UC_X86_REG_AX = 3; + UC_X86_REG_BH = 4; + UC_X86_REG_BL = 5; + UC_X86_REG_BP = 6; + UC_X86_REG_BPL = 7; + UC_X86_REG_BX = 8; + UC_X86_REG_CH = 9; + UC_X86_REG_CL = 10; + UC_X86_REG_CS = 11; + UC_X86_REG_CX = 12; + UC_X86_REG_DH = 13; + UC_X86_REG_DI = 14; + UC_X86_REG_DIL = 15; + UC_X86_REG_DL = 16; + UC_X86_REG_DS = 17; + UC_X86_REG_DX = 18; + UC_X86_REG_EAX = 19; + UC_X86_REG_EBP = 20; + UC_X86_REG_EBX = 21; + UC_X86_REG_ECX = 22; + UC_X86_REG_EDI = 23; + UC_X86_REG_EDX = 24; + UC_X86_REG_EFLAGS = 25; + UC_X86_REG_EIP = 26; + UC_X86_REG_EIZ = 27; + UC_X86_REG_ES = 28; + UC_X86_REG_ESI = 29; + UC_X86_REG_ESP = 30; + UC_X86_REG_FPSW = 31; + UC_X86_REG_FS = 32; + UC_X86_REG_GS = 33; + UC_X86_REG_IP = 34; + UC_X86_REG_RAX = 35; + UC_X86_REG_RBP = 36; + UC_X86_REG_RBX = 37; + UC_X86_REG_RCX = 38; + UC_X86_REG_RDI = 39; + UC_X86_REG_RDX = 40; + UC_X86_REG_RIP = 41; + UC_X86_REG_RIZ = 42; + UC_X86_REG_RSI = 43; + UC_X86_REG_RSP = 44; + UC_X86_REG_SI = 45; + UC_X86_REG_SIL = 46; + UC_X86_REG_SP = 47; + UC_X86_REG_SPL = 48; + UC_X86_REG_SS = 49; + UC_X86_REG_CR0 = 50; + UC_X86_REG_CR1 = 51; + UC_X86_REG_CR2 = 52; + UC_X86_REG_CR3 = 53; + UC_X86_REG_CR4 = 54; + UC_X86_REG_CR5 = 55; + UC_X86_REG_CR6 = 56; + UC_X86_REG_CR7 = 57; + UC_X86_REG_CR8 = 58; + UC_X86_REG_CR9 = 59; + UC_X86_REG_CR10 = 60; + UC_X86_REG_CR11 = 61; + UC_X86_REG_CR12 = 62; + UC_X86_REG_CR13 = 63; + UC_X86_REG_CR14 = 64; + UC_X86_REG_CR15 = 65; + UC_X86_REG_DR0 = 66; + UC_X86_REG_DR1 = 67; + UC_X86_REG_DR2 = 68; + UC_X86_REG_DR3 = 69; + UC_X86_REG_DR4 = 70; + UC_X86_REG_DR5 = 71; + UC_X86_REG_DR6 = 72; + UC_X86_REG_DR7 = 73; + UC_X86_REG_DR8 = 74; + UC_X86_REG_DR9 = 75; + UC_X86_REG_DR10 = 76; + UC_X86_REG_DR11 = 77; + UC_X86_REG_DR12 = 78; + UC_X86_REG_DR13 = 79; + UC_X86_REG_DR14 = 80; + UC_X86_REG_DR15 = 81; + UC_X86_REG_FP0 = 82; + UC_X86_REG_FP1 = 83; + UC_X86_REG_FP2 = 84; + UC_X86_REG_FP3 = 85; + UC_X86_REG_FP4 = 86; + UC_X86_REG_FP5 = 87; + UC_X86_REG_FP6 = 88; + UC_X86_REG_FP7 = 89; + UC_X86_REG_K0 = 90; + UC_X86_REG_K1 = 91; + UC_X86_REG_K2 = 92; + UC_X86_REG_K3 = 93; + UC_X86_REG_K4 = 94; + UC_X86_REG_K5 = 95; + UC_X86_REG_K6 = 96; + UC_X86_REG_K7 = 97; + UC_X86_REG_MM0 = 98; + UC_X86_REG_MM1 = 99; + UC_X86_REG_MM2 = 100; + UC_X86_REG_MM3 = 101; + UC_X86_REG_MM4 = 102; + UC_X86_REG_MM5 = 103; + UC_X86_REG_MM6 = 104; + UC_X86_REG_MM7 = 105; + UC_X86_REG_R8 = 106; + UC_X86_REG_R9 = 107; + UC_X86_REG_R10 = 108; + UC_X86_REG_R11 = 109; + UC_X86_REG_R12 = 110; + UC_X86_REG_R13 = 111; + UC_X86_REG_R14 = 112; + UC_X86_REG_R15 = 113; + UC_X86_REG_ST0 = 114; + UC_X86_REG_ST1 = 115; + UC_X86_REG_ST2 = 116; + UC_X86_REG_ST3 = 117; + UC_X86_REG_ST4 = 118; + UC_X86_REG_ST5 = 119; + UC_X86_REG_ST6 = 120; + UC_X86_REG_ST7 = 121; + UC_X86_REG_XMM0 = 122; + UC_X86_REG_XMM1 = 123; + UC_X86_REG_XMM2 = 124; + UC_X86_REG_XMM3 = 125; + UC_X86_REG_XMM4 = 126; + UC_X86_REG_XMM5 = 127; + UC_X86_REG_XMM6 = 128; + UC_X86_REG_XMM7 = 129; + UC_X86_REG_XMM8 = 130; + UC_X86_REG_XMM9 = 131; + UC_X86_REG_XMM10 = 132; + UC_X86_REG_XMM11 = 133; + UC_X86_REG_XMM12 = 134; + UC_X86_REG_XMM13 = 135; + UC_X86_REG_XMM14 = 136; + UC_X86_REG_XMM15 = 137; + UC_X86_REG_XMM16 = 138; + UC_X86_REG_XMM17 = 139; + UC_X86_REG_XMM18 = 140; + UC_X86_REG_XMM19 = 141; + UC_X86_REG_XMM20 = 142; + UC_X86_REG_XMM21 = 143; + UC_X86_REG_XMM22 = 144; + UC_X86_REG_XMM23 = 145; + UC_X86_REG_XMM24 = 146; + UC_X86_REG_XMM25 = 147; + UC_X86_REG_XMM26 = 148; + UC_X86_REG_XMM27 = 149; + UC_X86_REG_XMM28 = 150; + UC_X86_REG_XMM29 = 151; + UC_X86_REG_XMM30 = 152; + UC_X86_REG_XMM31 = 153; + UC_X86_REG_YMM0 = 154; + UC_X86_REG_YMM1 = 155; + UC_X86_REG_YMM2 = 156; + UC_X86_REG_YMM3 = 157; + UC_X86_REG_YMM4 = 158; + UC_X86_REG_YMM5 = 159; + UC_X86_REG_YMM6 = 160; + UC_X86_REG_YMM7 = 161; + UC_X86_REG_YMM8 = 162; + UC_X86_REG_YMM9 = 163; + UC_X86_REG_YMM10 = 164; + UC_X86_REG_YMM11 = 165; + UC_X86_REG_YMM12 = 166; + UC_X86_REG_YMM13 = 167; + UC_X86_REG_YMM14 = 168; + UC_X86_REG_YMM15 = 169; + UC_X86_REG_YMM16 = 170; + UC_X86_REG_YMM17 = 171; + UC_X86_REG_YMM18 = 172; + UC_X86_REG_YMM19 = 173; + UC_X86_REG_YMM20 = 174; + UC_X86_REG_YMM21 = 175; + UC_X86_REG_YMM22 = 176; + UC_X86_REG_YMM23 = 177; + UC_X86_REG_YMM24 = 178; + UC_X86_REG_YMM25 = 179; + UC_X86_REG_YMM26 = 180; + UC_X86_REG_YMM27 = 181; + UC_X86_REG_YMM28 = 182; + UC_X86_REG_YMM29 = 183; + UC_X86_REG_YMM30 = 184; + UC_X86_REG_YMM31 = 185; + UC_X86_REG_ZMM0 = 186; + UC_X86_REG_ZMM1 = 187; + UC_X86_REG_ZMM2 = 188; + UC_X86_REG_ZMM3 = 189; + UC_X86_REG_ZMM4 = 190; + UC_X86_REG_ZMM5 = 191; + UC_X86_REG_ZMM6 = 192; + UC_X86_REG_ZMM7 = 193; + UC_X86_REG_ZMM8 = 194; + UC_X86_REG_ZMM9 = 195; + UC_X86_REG_ZMM10 = 196; + UC_X86_REG_ZMM11 = 197; + UC_X86_REG_ZMM12 = 198; + UC_X86_REG_ZMM13 = 199; + UC_X86_REG_ZMM14 = 200; + UC_X86_REG_ZMM15 = 201; + UC_X86_REG_ZMM16 = 202; + UC_X86_REG_ZMM17 = 203; + UC_X86_REG_ZMM18 = 204; + UC_X86_REG_ZMM19 = 205; + UC_X86_REG_ZMM20 = 206; + UC_X86_REG_ZMM21 = 207; + UC_X86_REG_ZMM22 = 208; + UC_X86_REG_ZMM23 = 209; + UC_X86_REG_ZMM24 = 210; + UC_X86_REG_ZMM25 = 211; + UC_X86_REG_ZMM26 = 212; + UC_X86_REG_ZMM27 = 213; + UC_X86_REG_ZMM28 = 214; + UC_X86_REG_ZMM29 = 215; + UC_X86_REG_ZMM30 = 216; + UC_X86_REG_ZMM31 = 217; + UC_X86_REG_R8B = 218; + UC_X86_REG_R9B = 219; + UC_X86_REG_R10B = 220; + UC_X86_REG_R11B = 221; + UC_X86_REG_R12B = 222; + UC_X86_REG_R13B = 223; + UC_X86_REG_R14B = 224; + UC_X86_REG_R15B = 225; + UC_X86_REG_R8D = 226; + UC_X86_REG_R9D = 227; + UC_X86_REG_R10D = 228; + UC_X86_REG_R11D = 229; + UC_X86_REG_R12D = 230; + UC_X86_REG_R13D = 231; + UC_X86_REG_R14D = 232; + UC_X86_REG_R15D = 233; + UC_X86_REG_R8W = 234; + UC_X86_REG_R9W = 235; + UC_X86_REG_R10W = 236; + UC_X86_REG_R11W = 237; + UC_X86_REG_R12W = 238; + UC_X86_REG_R13W = 239; + UC_X86_REG_R14W = 240; + UC_X86_REG_R15W = 241; + UC_X86_REG_IDTR = 242; + UC_X86_REG_GDTR = 243; + UC_X86_REG_LDTR = 244; + UC_X86_REG_TR = 245; + UC_X86_REG_FPCW = 246; + UC_X86_REG_FPTAG = 247; + UC_X86_REG_MSR = 248; + UC_X86_REG_ENDING = 249; + +// X86 instructions + + UC_X86_INS_INVALID = 0; + UC_X86_INS_AAA = 1; + UC_X86_INS_AAD = 2; + UC_X86_INS_AAM = 3; + UC_X86_INS_AAS = 4; + UC_X86_INS_FABS = 5; + UC_X86_INS_ADC = 6; + UC_X86_INS_ADCX = 7; + UC_X86_INS_ADD = 8; + UC_X86_INS_ADDPD = 9; + UC_X86_INS_ADDPS = 10; + UC_X86_INS_ADDSD = 11; + UC_X86_INS_ADDSS = 12; + UC_X86_INS_ADDSUBPD = 13; + UC_X86_INS_ADDSUBPS = 14; + UC_X86_INS_FADD = 15; + UC_X86_INS_FIADD = 16; + UC_X86_INS_FADDP = 17; + UC_X86_INS_ADOX = 18; + UC_X86_INS_AESDECLAST = 19; + UC_X86_INS_AESDEC = 20; + UC_X86_INS_AESENCLAST = 21; + UC_X86_INS_AESENC = 22; + UC_X86_INS_AESIMC = 23; + UC_X86_INS_AESKEYGENASSIST = 24; + UC_X86_INS_AND = 25; + UC_X86_INS_ANDN = 26; + UC_X86_INS_ANDNPD = 27; + UC_X86_INS_ANDNPS = 28; + UC_X86_INS_ANDPD = 29; + UC_X86_INS_ANDPS = 30; + UC_X86_INS_ARPL = 31; + UC_X86_INS_BEXTR = 32; + UC_X86_INS_BLCFILL = 33; + UC_X86_INS_BLCI = 34; + UC_X86_INS_BLCIC = 35; + UC_X86_INS_BLCMSK = 36; + UC_X86_INS_BLCS = 37; + UC_X86_INS_BLENDPD = 38; + UC_X86_INS_BLENDPS = 39; + UC_X86_INS_BLENDVPD = 40; + UC_X86_INS_BLENDVPS = 41; + UC_X86_INS_BLSFILL = 42; + UC_X86_INS_BLSI = 43; + UC_X86_INS_BLSIC = 44; + UC_X86_INS_BLSMSK = 45; + UC_X86_INS_BLSR = 46; + UC_X86_INS_BOUND = 47; + UC_X86_INS_BSF = 48; + UC_X86_INS_BSR = 49; + UC_X86_INS_BSWAP = 50; + UC_X86_INS_BT = 51; + UC_X86_INS_BTC = 52; + UC_X86_INS_BTR = 53; + UC_X86_INS_BTS = 54; + UC_X86_INS_BZHI = 55; + UC_X86_INS_CALL = 56; + UC_X86_INS_CBW = 57; + UC_X86_INS_CDQ = 58; + UC_X86_INS_CDQE = 59; + UC_X86_INS_FCHS = 60; + UC_X86_INS_CLAC = 61; + UC_X86_INS_CLC = 62; + UC_X86_INS_CLD = 63; + UC_X86_INS_CLFLUSH = 64; + UC_X86_INS_CLFLUSHOPT = 65; + UC_X86_INS_CLGI = 66; + UC_X86_INS_CLI = 67; + UC_X86_INS_CLTS = 68; + UC_X86_INS_CLWB = 69; + UC_X86_INS_CMC = 70; + UC_X86_INS_CMOVA = 71; + UC_X86_INS_CMOVAE = 72; + UC_X86_INS_CMOVB = 73; + UC_X86_INS_CMOVBE = 74; + UC_X86_INS_FCMOVBE = 75; + UC_X86_INS_FCMOVB = 76; + UC_X86_INS_CMOVE = 77; + UC_X86_INS_FCMOVE = 78; + UC_X86_INS_CMOVG = 79; + UC_X86_INS_CMOVGE = 80; + UC_X86_INS_CMOVL = 81; + UC_X86_INS_CMOVLE = 82; + UC_X86_INS_FCMOVNBE = 83; + UC_X86_INS_FCMOVNB = 84; + UC_X86_INS_CMOVNE = 85; + UC_X86_INS_FCMOVNE = 86; + UC_X86_INS_CMOVNO = 87; + UC_X86_INS_CMOVNP = 88; + UC_X86_INS_FCMOVNU = 89; + UC_X86_INS_CMOVNS = 90; + UC_X86_INS_CMOVO = 91; + UC_X86_INS_CMOVP = 92; + UC_X86_INS_FCMOVU = 93; + UC_X86_INS_CMOVS = 94; + UC_X86_INS_CMP = 95; + UC_X86_INS_CMPPD = 96; + UC_X86_INS_CMPPS = 97; + UC_X86_INS_CMPSB = 98; + UC_X86_INS_CMPSD = 99; + UC_X86_INS_CMPSQ = 100; + UC_X86_INS_CMPSS = 101; + UC_X86_INS_CMPSW = 102; + UC_X86_INS_CMPXCHG16B = 103; + UC_X86_INS_CMPXCHG = 104; + UC_X86_INS_CMPXCHG8B = 105; + UC_X86_INS_COMISD = 106; + UC_X86_INS_COMISS = 107; + UC_X86_INS_FCOMP = 108; + UC_X86_INS_FCOMPI = 109; + UC_X86_INS_FCOMI = 110; + UC_X86_INS_FCOM = 111; + UC_X86_INS_FCOS = 112; + UC_X86_INS_CPUID = 113; + UC_X86_INS_CQO = 114; + UC_X86_INS_CRC32 = 115; + UC_X86_INS_CVTDQ2PD = 116; + UC_X86_INS_CVTDQ2PS = 117; + UC_X86_INS_CVTPD2DQ = 118; + UC_X86_INS_CVTPD2PS = 119; + UC_X86_INS_CVTPS2DQ = 120; + UC_X86_INS_CVTPS2PD = 121; + UC_X86_INS_CVTSD2SI = 122; + UC_X86_INS_CVTSD2SS = 123; + UC_X86_INS_CVTSI2SD = 124; + UC_X86_INS_CVTSI2SS = 125; + UC_X86_INS_CVTSS2SD = 126; + UC_X86_INS_CVTSS2SI = 127; + UC_X86_INS_CVTTPD2DQ = 128; + UC_X86_INS_CVTTPS2DQ = 129; + UC_X86_INS_CVTTSD2SI = 130; + UC_X86_INS_CVTTSS2SI = 131; + UC_X86_INS_CWD = 132; + UC_X86_INS_CWDE = 133; + UC_X86_INS_DAA = 134; + UC_X86_INS_DAS = 135; + UC_X86_INS_DATA16 = 136; + UC_X86_INS_DEC = 137; + UC_X86_INS_DIV = 138; + UC_X86_INS_DIVPD = 139; + UC_X86_INS_DIVPS = 140; + UC_X86_INS_FDIVR = 141; + UC_X86_INS_FIDIVR = 142; + UC_X86_INS_FDIVRP = 143; + UC_X86_INS_DIVSD = 144; + UC_X86_INS_DIVSS = 145; + UC_X86_INS_FDIV = 146; + UC_X86_INS_FIDIV = 147; + UC_X86_INS_FDIVP = 148; + UC_X86_INS_DPPD = 149; + UC_X86_INS_DPPS = 150; + UC_X86_INS_RET = 151; + UC_X86_INS_ENCLS = 152; + UC_X86_INS_ENCLU = 153; + UC_X86_INS_ENTER = 154; + UC_X86_INS_EXTRACTPS = 155; + UC_X86_INS_EXTRQ = 156; + UC_X86_INS_F2XM1 = 157; + UC_X86_INS_LCALL = 158; + UC_X86_INS_LJMP = 159; + UC_X86_INS_FBLD = 160; + UC_X86_INS_FBSTP = 161; + UC_X86_INS_FCOMPP = 162; + UC_X86_INS_FDECSTP = 163; + UC_X86_INS_FEMMS = 164; + UC_X86_INS_FFREE = 165; + UC_X86_INS_FICOM = 166; + UC_X86_INS_FICOMP = 167; + UC_X86_INS_FINCSTP = 168; + UC_X86_INS_FLDCW = 169; + UC_X86_INS_FLDENV = 170; + UC_X86_INS_FLDL2E = 171; + UC_X86_INS_FLDL2T = 172; + UC_X86_INS_FLDLG2 = 173; + UC_X86_INS_FLDLN2 = 174; + UC_X86_INS_FLDPI = 175; + UC_X86_INS_FNCLEX = 176; + UC_X86_INS_FNINIT = 177; + UC_X86_INS_FNOP = 178; + UC_X86_INS_FNSTCW = 179; + UC_X86_INS_FNSTSW = 180; + UC_X86_INS_FPATAN = 181; + UC_X86_INS_FPREM = 182; + UC_X86_INS_FPREM1 = 183; + UC_X86_INS_FPTAN = 184; + UC_X86_INS_FFREEP = 185; + UC_X86_INS_FRNDINT = 186; + UC_X86_INS_FRSTOR = 187; + UC_X86_INS_FNSAVE = 188; + UC_X86_INS_FSCALE = 189; + UC_X86_INS_FSETPM = 190; + UC_X86_INS_FSINCOS = 191; + UC_X86_INS_FNSTENV = 192; + UC_X86_INS_FXAM = 193; + UC_X86_INS_FXRSTOR = 194; + UC_X86_INS_FXRSTOR64 = 195; + UC_X86_INS_FXSAVE = 196; + UC_X86_INS_FXSAVE64 = 197; + UC_X86_INS_FXTRACT = 198; + UC_X86_INS_FYL2X = 199; + UC_X86_INS_FYL2XP1 = 200; + UC_X86_INS_MOVAPD = 201; + UC_X86_INS_MOVAPS = 202; + UC_X86_INS_ORPD = 203; + UC_X86_INS_ORPS = 204; + UC_X86_INS_VMOVAPD = 205; + UC_X86_INS_VMOVAPS = 206; + UC_X86_INS_XORPD = 207; + UC_X86_INS_XORPS = 208; + UC_X86_INS_GETSEC = 209; + UC_X86_INS_HADDPD = 210; + UC_X86_INS_HADDPS = 211; + UC_X86_INS_HLT = 212; + UC_X86_INS_HSUBPD = 213; + UC_X86_INS_HSUBPS = 214; + UC_X86_INS_IDIV = 215; + UC_X86_INS_FILD = 216; + UC_X86_INS_IMUL = 217; + UC_X86_INS_IN = 218; + UC_X86_INS_INC = 219; + UC_X86_INS_INSB = 220; + UC_X86_INS_INSERTPS = 221; + UC_X86_INS_INSERTQ = 222; + UC_X86_INS_INSD = 223; + UC_X86_INS_INSW = 224; + UC_X86_INS_INT = 225; + UC_X86_INS_INT1 = 226; + UC_X86_INS_INT3 = 227; + UC_X86_INS_INTO = 228; + UC_X86_INS_INVD = 229; + UC_X86_INS_INVEPT = 230; + UC_X86_INS_INVLPG = 231; + UC_X86_INS_INVLPGA = 232; + UC_X86_INS_INVPCID = 233; + UC_X86_INS_INVVPID = 234; + UC_X86_INS_IRET = 235; + UC_X86_INS_IRETD = 236; + UC_X86_INS_IRETQ = 237; + UC_X86_INS_FISTTP = 238; + UC_X86_INS_FIST = 239; + UC_X86_INS_FISTP = 240; + UC_X86_INS_UCOMISD = 241; + UC_X86_INS_UCOMISS = 242; + UC_X86_INS_VCOMISD = 243; + UC_X86_INS_VCOMISS = 244; + UC_X86_INS_VCVTSD2SS = 245; + UC_X86_INS_VCVTSI2SD = 246; + UC_X86_INS_VCVTSI2SS = 247; + UC_X86_INS_VCVTSS2SD = 248; + UC_X86_INS_VCVTTSD2SI = 249; + UC_X86_INS_VCVTTSD2USI = 250; + UC_X86_INS_VCVTTSS2SI = 251; + UC_X86_INS_VCVTTSS2USI = 252; + UC_X86_INS_VCVTUSI2SD = 253; + UC_X86_INS_VCVTUSI2SS = 254; + UC_X86_INS_VUCOMISD = 255; + UC_X86_INS_VUCOMISS = 256; + UC_X86_INS_JAE = 257; + UC_X86_INS_JA = 258; + UC_X86_INS_JBE = 259; + UC_X86_INS_JB = 260; + UC_X86_INS_JCXZ = 261; + UC_X86_INS_JECXZ = 262; + UC_X86_INS_JE = 263; + UC_X86_INS_JGE = 264; + UC_X86_INS_JG = 265; + UC_X86_INS_JLE = 266; + UC_X86_INS_JL = 267; + UC_X86_INS_JMP = 268; + UC_X86_INS_JNE = 269; + UC_X86_INS_JNO = 270; + UC_X86_INS_JNP = 271; + UC_X86_INS_JNS = 272; + UC_X86_INS_JO = 273; + UC_X86_INS_JP = 274; + UC_X86_INS_JRCXZ = 275; + UC_X86_INS_JS = 276; + UC_X86_INS_KANDB = 277; + UC_X86_INS_KANDD = 278; + UC_X86_INS_KANDNB = 279; + UC_X86_INS_KANDND = 280; + UC_X86_INS_KANDNQ = 281; + UC_X86_INS_KANDNW = 282; + UC_X86_INS_KANDQ = 283; + UC_X86_INS_KANDW = 284; + UC_X86_INS_KMOVB = 285; + UC_X86_INS_KMOVD = 286; + UC_X86_INS_KMOVQ = 287; + UC_X86_INS_KMOVW = 288; + UC_X86_INS_KNOTB = 289; + UC_X86_INS_KNOTD = 290; + UC_X86_INS_KNOTQ = 291; + UC_X86_INS_KNOTW = 292; + UC_X86_INS_KORB = 293; + UC_X86_INS_KORD = 294; + UC_X86_INS_KORQ = 295; + UC_X86_INS_KORTESTB = 296; + UC_X86_INS_KORTESTD = 297; + UC_X86_INS_KORTESTQ = 298; + UC_X86_INS_KORTESTW = 299; + UC_X86_INS_KORW = 300; + UC_X86_INS_KSHIFTLB = 301; + UC_X86_INS_KSHIFTLD = 302; + UC_X86_INS_KSHIFTLQ = 303; + UC_X86_INS_KSHIFTLW = 304; + UC_X86_INS_KSHIFTRB = 305; + UC_X86_INS_KSHIFTRD = 306; + UC_X86_INS_KSHIFTRQ = 307; + UC_X86_INS_KSHIFTRW = 308; + UC_X86_INS_KUNPCKBW = 309; + UC_X86_INS_KXNORB = 310; + UC_X86_INS_KXNORD = 311; + UC_X86_INS_KXNORQ = 312; + UC_X86_INS_KXNORW = 313; + UC_X86_INS_KXORB = 314; + UC_X86_INS_KXORD = 315; + UC_X86_INS_KXORQ = 316; + UC_X86_INS_KXORW = 317; + UC_X86_INS_LAHF = 318; + UC_X86_INS_LAR = 319; + UC_X86_INS_LDDQU = 320; + UC_X86_INS_LDMXCSR = 321; + UC_X86_INS_LDS = 322; + UC_X86_INS_FLDZ = 323; + UC_X86_INS_FLD1 = 324; + UC_X86_INS_FLD = 325; + UC_X86_INS_LEA = 326; + UC_X86_INS_LEAVE = 327; + UC_X86_INS_LES = 328; + UC_X86_INS_LFENCE = 329; + UC_X86_INS_LFS = 330; + UC_X86_INS_LGDT = 331; + UC_X86_INS_LGS = 332; + UC_X86_INS_LIDT = 333; + UC_X86_INS_LLDT = 334; + UC_X86_INS_LMSW = 335; + UC_X86_INS_OR = 336; + UC_X86_INS_SUB = 337; + UC_X86_INS_XOR = 338; + UC_X86_INS_LODSB = 339; + UC_X86_INS_LODSD = 340; + UC_X86_INS_LODSQ = 341; + UC_X86_INS_LODSW = 342; + UC_X86_INS_LOOP = 343; + UC_X86_INS_LOOPE = 344; + UC_X86_INS_LOOPNE = 345; + UC_X86_INS_RETF = 346; + UC_X86_INS_RETFQ = 347; + UC_X86_INS_LSL = 348; + UC_X86_INS_LSS = 349; + UC_X86_INS_LTR = 350; + UC_X86_INS_XADD = 351; + UC_X86_INS_LZCNT = 352; + UC_X86_INS_MASKMOVDQU = 353; + UC_X86_INS_MAXPD = 354; + UC_X86_INS_MAXPS = 355; + UC_X86_INS_MAXSD = 356; + UC_X86_INS_MAXSS = 357; + UC_X86_INS_MFENCE = 358; + UC_X86_INS_MINPD = 359; + UC_X86_INS_MINPS = 360; + UC_X86_INS_MINSD = 361; + UC_X86_INS_MINSS = 362; + UC_X86_INS_CVTPD2PI = 363; + UC_X86_INS_CVTPI2PD = 364; + UC_X86_INS_CVTPI2PS = 365; + UC_X86_INS_CVTPS2PI = 366; + UC_X86_INS_CVTTPD2PI = 367; + UC_X86_INS_CVTTPS2PI = 368; + UC_X86_INS_EMMS = 369; + UC_X86_INS_MASKMOVQ = 370; + UC_X86_INS_MOVD = 371; + UC_X86_INS_MOVDQ2Q = 372; + UC_X86_INS_MOVNTQ = 373; + UC_X86_INS_MOVQ2DQ = 374; + UC_X86_INS_MOVQ = 375; + UC_X86_INS_PABSB = 376; + UC_X86_INS_PABSD = 377; + UC_X86_INS_PABSW = 378; + UC_X86_INS_PACKSSDW = 379; + UC_X86_INS_PACKSSWB = 380; + UC_X86_INS_PACKUSWB = 381; + UC_X86_INS_PADDB = 382; + UC_X86_INS_PADDD = 383; + UC_X86_INS_PADDQ = 384; + UC_X86_INS_PADDSB = 385; + UC_X86_INS_PADDSW = 386; + UC_X86_INS_PADDUSB = 387; + UC_X86_INS_PADDUSW = 388; + UC_X86_INS_PADDW = 389; + UC_X86_INS_PALIGNR = 390; + UC_X86_INS_PANDN = 391; + UC_X86_INS_PAND = 392; + UC_X86_INS_PAVGB = 393; + UC_X86_INS_PAVGW = 394; + UC_X86_INS_PCMPEQB = 395; + UC_X86_INS_PCMPEQD = 396; + UC_X86_INS_PCMPEQW = 397; + UC_X86_INS_PCMPGTB = 398; + UC_X86_INS_PCMPGTD = 399; + UC_X86_INS_PCMPGTW = 400; + UC_X86_INS_PEXTRW = 401; + UC_X86_INS_PHADDSW = 402; + UC_X86_INS_PHADDW = 403; + UC_X86_INS_PHADDD = 404; + UC_X86_INS_PHSUBD = 405; + UC_X86_INS_PHSUBSW = 406; + UC_X86_INS_PHSUBW = 407; + UC_X86_INS_PINSRW = 408; + UC_X86_INS_PMADDUBSW = 409; + UC_X86_INS_PMADDWD = 410; + UC_X86_INS_PMAXSW = 411; + UC_X86_INS_PMAXUB = 412; + UC_X86_INS_PMINSW = 413; + UC_X86_INS_PMINUB = 414; + UC_X86_INS_PMOVMSKB = 415; + UC_X86_INS_PMULHRSW = 416; + UC_X86_INS_PMULHUW = 417; + UC_X86_INS_PMULHW = 418; + UC_X86_INS_PMULLW = 419; + UC_X86_INS_PMULUDQ = 420; + UC_X86_INS_POR = 421; + UC_X86_INS_PSADBW = 422; + UC_X86_INS_PSHUFB = 423; + UC_X86_INS_PSHUFW = 424; + UC_X86_INS_PSIGNB = 425; + UC_X86_INS_PSIGND = 426; + UC_X86_INS_PSIGNW = 427; + UC_X86_INS_PSLLD = 428; + UC_X86_INS_PSLLQ = 429; + UC_X86_INS_PSLLW = 430; + UC_X86_INS_PSRAD = 431; + UC_X86_INS_PSRAW = 432; + UC_X86_INS_PSRLD = 433; + UC_X86_INS_PSRLQ = 434; + UC_X86_INS_PSRLW = 435; + UC_X86_INS_PSUBB = 436; + UC_X86_INS_PSUBD = 437; + UC_X86_INS_PSUBQ = 438; + UC_X86_INS_PSUBSB = 439; + UC_X86_INS_PSUBSW = 440; + UC_X86_INS_PSUBUSB = 441; + UC_X86_INS_PSUBUSW = 442; + UC_X86_INS_PSUBW = 443; + UC_X86_INS_PUNPCKHBW = 444; + UC_X86_INS_PUNPCKHDQ = 445; + UC_X86_INS_PUNPCKHWD = 446; + UC_X86_INS_PUNPCKLBW = 447; + UC_X86_INS_PUNPCKLDQ = 448; + UC_X86_INS_PUNPCKLWD = 449; + UC_X86_INS_PXOR = 450; + UC_X86_INS_MONITOR = 451; + UC_X86_INS_MONTMUL = 452; + UC_X86_INS_MOV = 453; + UC_X86_INS_MOVABS = 454; + UC_X86_INS_MOVBE = 455; + UC_X86_INS_MOVDDUP = 456; + UC_X86_INS_MOVDQA = 457; + UC_X86_INS_MOVDQU = 458; + UC_X86_INS_MOVHLPS = 459; + UC_X86_INS_MOVHPD = 460; + UC_X86_INS_MOVHPS = 461; + UC_X86_INS_MOVLHPS = 462; + UC_X86_INS_MOVLPD = 463; + UC_X86_INS_MOVLPS = 464; + UC_X86_INS_MOVMSKPD = 465; + UC_X86_INS_MOVMSKPS = 466; + UC_X86_INS_MOVNTDQA = 467; + UC_X86_INS_MOVNTDQ = 468; + UC_X86_INS_MOVNTI = 469; + UC_X86_INS_MOVNTPD = 470; + UC_X86_INS_MOVNTPS = 471; + UC_X86_INS_MOVNTSD = 472; + UC_X86_INS_MOVNTSS = 473; + UC_X86_INS_MOVSB = 474; + UC_X86_INS_MOVSD = 475; + UC_X86_INS_MOVSHDUP = 476; + UC_X86_INS_MOVSLDUP = 477; + UC_X86_INS_MOVSQ = 478; + UC_X86_INS_MOVSS = 479; + UC_X86_INS_MOVSW = 480; + UC_X86_INS_MOVSX = 481; + UC_X86_INS_MOVSXD = 482; + UC_X86_INS_MOVUPD = 483; + UC_X86_INS_MOVUPS = 484; + UC_X86_INS_MOVZX = 485; + UC_X86_INS_MPSADBW = 486; + UC_X86_INS_MUL = 487; + UC_X86_INS_MULPD = 488; + UC_X86_INS_MULPS = 489; + UC_X86_INS_MULSD = 490; + UC_X86_INS_MULSS = 491; + UC_X86_INS_MULX = 492; + UC_X86_INS_FMUL = 493; + UC_X86_INS_FIMUL = 494; + UC_X86_INS_FMULP = 495; + UC_X86_INS_MWAIT = 496; + UC_X86_INS_NEG = 497; + UC_X86_INS_NOP = 498; + UC_X86_INS_NOT = 499; + UC_X86_INS_OUT = 500; + UC_X86_INS_OUTSB = 501; + UC_X86_INS_OUTSD = 502; + UC_X86_INS_OUTSW = 503; + UC_X86_INS_PACKUSDW = 504; + UC_X86_INS_PAUSE = 505; + UC_X86_INS_PAVGUSB = 506; + UC_X86_INS_PBLENDVB = 507; + UC_X86_INS_PBLENDW = 508; + UC_X86_INS_PCLMULQDQ = 509; + UC_X86_INS_PCMPEQQ = 510; + UC_X86_INS_PCMPESTRI = 511; + UC_X86_INS_PCMPESTRM = 512; + UC_X86_INS_PCMPGTQ = 513; + UC_X86_INS_PCMPISTRI = 514; + UC_X86_INS_PCMPISTRM = 515; + UC_X86_INS_PCOMMIT = 516; + UC_X86_INS_PDEP = 517; + UC_X86_INS_PEXT = 518; + UC_X86_INS_PEXTRB = 519; + UC_X86_INS_PEXTRD = 520; + UC_X86_INS_PEXTRQ = 521; + UC_X86_INS_PF2ID = 522; + UC_X86_INS_PF2IW = 523; + UC_X86_INS_PFACC = 524; + UC_X86_INS_PFADD = 525; + UC_X86_INS_PFCMPEQ = 526; + UC_X86_INS_PFCMPGE = 527; + UC_X86_INS_PFCMPGT = 528; + UC_X86_INS_PFMAX = 529; + UC_X86_INS_PFMIN = 530; + UC_X86_INS_PFMUL = 531; + UC_X86_INS_PFNACC = 532; + UC_X86_INS_PFPNACC = 533; + UC_X86_INS_PFRCPIT1 = 534; + UC_X86_INS_PFRCPIT2 = 535; + UC_X86_INS_PFRCP = 536; + UC_X86_INS_PFRSQIT1 = 537; + UC_X86_INS_PFRSQRT = 538; + UC_X86_INS_PFSUBR = 539; + UC_X86_INS_PFSUB = 540; + UC_X86_INS_PHMINPOSUW = 541; + UC_X86_INS_PI2FD = 542; + UC_X86_INS_PI2FW = 543; + UC_X86_INS_PINSRB = 544; + UC_X86_INS_PINSRD = 545; + UC_X86_INS_PINSRQ = 546; + UC_X86_INS_PMAXSB = 547; + UC_X86_INS_PMAXSD = 548; + UC_X86_INS_PMAXUD = 549; + UC_X86_INS_PMAXUW = 550; + UC_X86_INS_PMINSB = 551; + UC_X86_INS_PMINSD = 552; + UC_X86_INS_PMINUD = 553; + UC_X86_INS_PMINUW = 554; + UC_X86_INS_PMOVSXBD = 555; + UC_X86_INS_PMOVSXBQ = 556; + UC_X86_INS_PMOVSXBW = 557; + UC_X86_INS_PMOVSXDQ = 558; + UC_X86_INS_PMOVSXWD = 559; + UC_X86_INS_PMOVSXWQ = 560; + UC_X86_INS_PMOVZXBD = 561; + UC_X86_INS_PMOVZXBQ = 562; + UC_X86_INS_PMOVZXBW = 563; + UC_X86_INS_PMOVZXDQ = 564; + UC_X86_INS_PMOVZXWD = 565; + UC_X86_INS_PMOVZXWQ = 566; + UC_X86_INS_PMULDQ = 567; + UC_X86_INS_PMULHRW = 568; + UC_X86_INS_PMULLD = 569; + UC_X86_INS_POP = 570; + UC_X86_INS_POPAW = 571; + UC_X86_INS_POPAL = 572; + UC_X86_INS_POPCNT = 573; + UC_X86_INS_POPF = 574; + UC_X86_INS_POPFD = 575; + UC_X86_INS_POPFQ = 576; + UC_X86_INS_PREFETCH = 577; + UC_X86_INS_PREFETCHNTA = 578; + UC_X86_INS_PREFETCHT0 = 579; + UC_X86_INS_PREFETCHT1 = 580; + UC_X86_INS_PREFETCHT2 = 581; + UC_X86_INS_PREFETCHW = 582; + UC_X86_INS_PSHUFD = 583; + UC_X86_INS_PSHUFHW = 584; + UC_X86_INS_PSHUFLW = 585; + UC_X86_INS_PSLLDQ = 586; + UC_X86_INS_PSRLDQ = 587; + UC_X86_INS_PSWAPD = 588; + UC_X86_INS_PTEST = 589; + UC_X86_INS_PUNPCKHQDQ = 590; + UC_X86_INS_PUNPCKLQDQ = 591; + UC_X86_INS_PUSH = 592; + UC_X86_INS_PUSHAW = 593; + UC_X86_INS_PUSHAL = 594; + UC_X86_INS_PUSHF = 595; + UC_X86_INS_PUSHFD = 596; + UC_X86_INS_PUSHFQ = 597; + UC_X86_INS_RCL = 598; + UC_X86_INS_RCPPS = 599; + UC_X86_INS_RCPSS = 600; + UC_X86_INS_RCR = 601; + UC_X86_INS_RDFSBASE = 602; + UC_X86_INS_RDGSBASE = 603; + UC_X86_INS_RDMSR = 604; + UC_X86_INS_RDPMC = 605; + UC_X86_INS_RDRAND = 606; + UC_X86_INS_RDSEED = 607; + UC_X86_INS_RDTSC = 608; + UC_X86_INS_RDTSCP = 609; + UC_X86_INS_ROL = 610; + UC_X86_INS_ROR = 611; + UC_X86_INS_RORX = 612; + UC_X86_INS_ROUNDPD = 613; + UC_X86_INS_ROUNDPS = 614; + UC_X86_INS_ROUNDSD = 615; + UC_X86_INS_ROUNDSS = 616; + UC_X86_INS_RSM = 617; + UC_X86_INS_RSQRTPS = 618; + UC_X86_INS_RSQRTSS = 619; + UC_X86_INS_SAHF = 620; + UC_X86_INS_SAL = 621; + UC_X86_INS_SALC = 622; + UC_X86_INS_SAR = 623; + UC_X86_INS_SARX = 624; + UC_X86_INS_SBB = 625; + UC_X86_INS_SCASB = 626; + UC_X86_INS_SCASD = 627; + UC_X86_INS_SCASQ = 628; + UC_X86_INS_SCASW = 629; + UC_X86_INS_SETAE = 630; + UC_X86_INS_SETA = 631; + UC_X86_INS_SETBE = 632; + UC_X86_INS_SETB = 633; + UC_X86_INS_SETE = 634; + UC_X86_INS_SETGE = 635; + UC_X86_INS_SETG = 636; + UC_X86_INS_SETLE = 637; + UC_X86_INS_SETL = 638; + UC_X86_INS_SETNE = 639; + UC_X86_INS_SETNO = 640; + UC_X86_INS_SETNP = 641; + UC_X86_INS_SETNS = 642; + UC_X86_INS_SETO = 643; + UC_X86_INS_SETP = 644; + UC_X86_INS_SETS = 645; + UC_X86_INS_SFENCE = 646; + UC_X86_INS_SGDT = 647; + UC_X86_INS_SHA1MSG1 = 648; + UC_X86_INS_SHA1MSG2 = 649; + UC_X86_INS_SHA1NEXTE = 650; + UC_X86_INS_SHA1RNDS4 = 651; + UC_X86_INS_SHA256MSG1 = 652; + UC_X86_INS_SHA256MSG2 = 653; + UC_X86_INS_SHA256RNDS2 = 654; + UC_X86_INS_SHL = 655; + UC_X86_INS_SHLD = 656; + UC_X86_INS_SHLX = 657; + UC_X86_INS_SHR = 658; + UC_X86_INS_SHRD = 659; + UC_X86_INS_SHRX = 660; + UC_X86_INS_SHUFPD = 661; + UC_X86_INS_SHUFPS = 662; + UC_X86_INS_SIDT = 663; + UC_X86_INS_FSIN = 664; + UC_X86_INS_SKINIT = 665; + UC_X86_INS_SLDT = 666; + UC_X86_INS_SMSW = 667; + UC_X86_INS_SQRTPD = 668; + UC_X86_INS_SQRTPS = 669; + UC_X86_INS_SQRTSD = 670; + UC_X86_INS_SQRTSS = 671; + UC_X86_INS_FSQRT = 672; + UC_X86_INS_STAC = 673; + UC_X86_INS_STC = 674; + UC_X86_INS_STD = 675; + UC_X86_INS_STGI = 676; + UC_X86_INS_STI = 677; + UC_X86_INS_STMXCSR = 678; + UC_X86_INS_STOSB = 679; + UC_X86_INS_STOSD = 680; + UC_X86_INS_STOSQ = 681; + UC_X86_INS_STOSW = 682; + UC_X86_INS_STR = 683; + UC_X86_INS_FST = 684; + UC_X86_INS_FSTP = 685; + UC_X86_INS_FSTPNCE = 686; + UC_X86_INS_FXCH = 687; + UC_X86_INS_SUBPD = 688; + UC_X86_INS_SUBPS = 689; + UC_X86_INS_FSUBR = 690; + UC_X86_INS_FISUBR = 691; + UC_X86_INS_FSUBRP = 692; + UC_X86_INS_SUBSD = 693; + UC_X86_INS_SUBSS = 694; + UC_X86_INS_FSUB = 695; + UC_X86_INS_FISUB = 696; + UC_X86_INS_FSUBP = 697; + UC_X86_INS_SWAPGS = 698; + UC_X86_INS_SYSCALL = 699; + UC_X86_INS_SYSENTER = 700; + UC_X86_INS_SYSEXIT = 701; + UC_X86_INS_SYSRET = 702; + UC_X86_INS_T1MSKC = 703; + UC_X86_INS_TEST = 704; + UC_X86_INS_UD2 = 705; + UC_X86_INS_FTST = 706; + UC_X86_INS_TZCNT = 707; + UC_X86_INS_TZMSK = 708; + UC_X86_INS_FUCOMPI = 709; + UC_X86_INS_FUCOMI = 710; + UC_X86_INS_FUCOMPP = 711; + UC_X86_INS_FUCOMP = 712; + UC_X86_INS_FUCOM = 713; + UC_X86_INS_UD2B = 714; + UC_X86_INS_UNPCKHPD = 715; + UC_X86_INS_UNPCKHPS = 716; + UC_X86_INS_UNPCKLPD = 717; + UC_X86_INS_UNPCKLPS = 718; + UC_X86_INS_VADDPD = 719; + UC_X86_INS_VADDPS = 720; + UC_X86_INS_VADDSD = 721; + UC_X86_INS_VADDSS = 722; + UC_X86_INS_VADDSUBPD = 723; + UC_X86_INS_VADDSUBPS = 724; + UC_X86_INS_VAESDECLAST = 725; + UC_X86_INS_VAESDEC = 726; + UC_X86_INS_VAESENCLAST = 727; + UC_X86_INS_VAESENC = 728; + UC_X86_INS_VAESIMC = 729; + UC_X86_INS_VAESKEYGENASSIST = 730; + UC_X86_INS_VALIGND = 731; + UC_X86_INS_VALIGNQ = 732; + UC_X86_INS_VANDNPD = 733; + UC_X86_INS_VANDNPS = 734; + UC_X86_INS_VANDPD = 735; + UC_X86_INS_VANDPS = 736; + UC_X86_INS_VBLENDMPD = 737; + UC_X86_INS_VBLENDMPS = 738; + UC_X86_INS_VBLENDPD = 739; + UC_X86_INS_VBLENDPS = 740; + UC_X86_INS_VBLENDVPD = 741; + UC_X86_INS_VBLENDVPS = 742; + UC_X86_INS_VBROADCASTF128 = 743; + UC_X86_INS_VBROADCASTI32X4 = 744; + UC_X86_INS_VBROADCASTI64X4 = 745; + UC_X86_INS_VBROADCASTSD = 746; + UC_X86_INS_VBROADCASTSS = 747; + UC_X86_INS_VCMPPD = 748; + UC_X86_INS_VCMPPS = 749; + UC_X86_INS_VCMPSD = 750; + UC_X86_INS_VCMPSS = 751; + UC_X86_INS_VCOMPRESSPD = 752; + UC_X86_INS_VCOMPRESSPS = 753; + UC_X86_INS_VCVTDQ2PD = 754; + UC_X86_INS_VCVTDQ2PS = 755; + UC_X86_INS_VCVTPD2DQX = 756; + UC_X86_INS_VCVTPD2DQ = 757; + UC_X86_INS_VCVTPD2PSX = 758; + UC_X86_INS_VCVTPD2PS = 759; + UC_X86_INS_VCVTPD2UDQ = 760; + UC_X86_INS_VCVTPH2PS = 761; + UC_X86_INS_VCVTPS2DQ = 762; + UC_X86_INS_VCVTPS2PD = 763; + UC_X86_INS_VCVTPS2PH = 764; + UC_X86_INS_VCVTPS2UDQ = 765; + UC_X86_INS_VCVTSD2SI = 766; + UC_X86_INS_VCVTSD2USI = 767; + UC_X86_INS_VCVTSS2SI = 768; + UC_X86_INS_VCVTSS2USI = 769; + UC_X86_INS_VCVTTPD2DQX = 770; + UC_X86_INS_VCVTTPD2DQ = 771; + UC_X86_INS_VCVTTPD2UDQ = 772; + UC_X86_INS_VCVTTPS2DQ = 773; + UC_X86_INS_VCVTTPS2UDQ = 774; + UC_X86_INS_VCVTUDQ2PD = 775; + UC_X86_INS_VCVTUDQ2PS = 776; + UC_X86_INS_VDIVPD = 777; + UC_X86_INS_VDIVPS = 778; + UC_X86_INS_VDIVSD = 779; + UC_X86_INS_VDIVSS = 780; + UC_X86_INS_VDPPD = 781; + UC_X86_INS_VDPPS = 782; + UC_X86_INS_VERR = 783; + UC_X86_INS_VERW = 784; + UC_X86_INS_VEXP2PD = 785; + UC_X86_INS_VEXP2PS = 786; + UC_X86_INS_VEXPANDPD = 787; + UC_X86_INS_VEXPANDPS = 788; + UC_X86_INS_VEXTRACTF128 = 789; + UC_X86_INS_VEXTRACTF32X4 = 790; + UC_X86_INS_VEXTRACTF64X4 = 791; + UC_X86_INS_VEXTRACTI128 = 792; + UC_X86_INS_VEXTRACTI32X4 = 793; + UC_X86_INS_VEXTRACTI64X4 = 794; + UC_X86_INS_VEXTRACTPS = 795; + UC_X86_INS_VFMADD132PD = 796; + UC_X86_INS_VFMADD132PS = 797; + UC_X86_INS_VFMADDPD = 798; + UC_X86_INS_VFMADD213PD = 799; + UC_X86_INS_VFMADD231PD = 800; + UC_X86_INS_VFMADDPS = 801; + UC_X86_INS_VFMADD213PS = 802; + UC_X86_INS_VFMADD231PS = 803; + UC_X86_INS_VFMADDSD = 804; + UC_X86_INS_VFMADD213SD = 805; + UC_X86_INS_VFMADD132SD = 806; + UC_X86_INS_VFMADD231SD = 807; + UC_X86_INS_VFMADDSS = 808; + UC_X86_INS_VFMADD213SS = 809; + UC_X86_INS_VFMADD132SS = 810; + UC_X86_INS_VFMADD231SS = 811; + UC_X86_INS_VFMADDSUB132PD = 812; + UC_X86_INS_VFMADDSUB132PS = 813; + UC_X86_INS_VFMADDSUBPD = 814; + UC_X86_INS_VFMADDSUB213PD = 815; + UC_X86_INS_VFMADDSUB231PD = 816; + UC_X86_INS_VFMADDSUBPS = 817; + UC_X86_INS_VFMADDSUB213PS = 818; + UC_X86_INS_VFMADDSUB231PS = 819; + UC_X86_INS_VFMSUB132PD = 820; + UC_X86_INS_VFMSUB132PS = 821; + UC_X86_INS_VFMSUBADD132PD = 822; + UC_X86_INS_VFMSUBADD132PS = 823; + UC_X86_INS_VFMSUBADDPD = 824; + UC_X86_INS_VFMSUBADD213PD = 825; + UC_X86_INS_VFMSUBADD231PD = 826; + UC_X86_INS_VFMSUBADDPS = 827; + UC_X86_INS_VFMSUBADD213PS = 828; + UC_X86_INS_VFMSUBADD231PS = 829; + UC_X86_INS_VFMSUBPD = 830; + UC_X86_INS_VFMSUB213PD = 831; + UC_X86_INS_VFMSUB231PD = 832; + UC_X86_INS_VFMSUBPS = 833; + UC_X86_INS_VFMSUB213PS = 834; + UC_X86_INS_VFMSUB231PS = 835; + UC_X86_INS_VFMSUBSD = 836; + UC_X86_INS_VFMSUB213SD = 837; + UC_X86_INS_VFMSUB132SD = 838; + UC_X86_INS_VFMSUB231SD = 839; + UC_X86_INS_VFMSUBSS = 840; + UC_X86_INS_VFMSUB213SS = 841; + UC_X86_INS_VFMSUB132SS = 842; + UC_X86_INS_VFMSUB231SS = 843; + UC_X86_INS_VFNMADD132PD = 844; + UC_X86_INS_VFNMADD132PS = 845; + UC_X86_INS_VFNMADDPD = 846; + UC_X86_INS_VFNMADD213PD = 847; + UC_X86_INS_VFNMADD231PD = 848; + UC_X86_INS_VFNMADDPS = 849; + UC_X86_INS_VFNMADD213PS = 850; + UC_X86_INS_VFNMADD231PS = 851; + UC_X86_INS_VFNMADDSD = 852; + UC_X86_INS_VFNMADD213SD = 853; + UC_X86_INS_VFNMADD132SD = 854; + UC_X86_INS_VFNMADD231SD = 855; + UC_X86_INS_VFNMADDSS = 856; + UC_X86_INS_VFNMADD213SS = 857; + UC_X86_INS_VFNMADD132SS = 858; + UC_X86_INS_VFNMADD231SS = 859; + UC_X86_INS_VFNMSUB132PD = 860; + UC_X86_INS_VFNMSUB132PS = 861; + UC_X86_INS_VFNMSUBPD = 862; + UC_X86_INS_VFNMSUB213PD = 863; + UC_X86_INS_VFNMSUB231PD = 864; + UC_X86_INS_VFNMSUBPS = 865; + UC_X86_INS_VFNMSUB213PS = 866; + UC_X86_INS_VFNMSUB231PS = 867; + UC_X86_INS_VFNMSUBSD = 868; + UC_X86_INS_VFNMSUB213SD = 869; + UC_X86_INS_VFNMSUB132SD = 870; + UC_X86_INS_VFNMSUB231SD = 871; + UC_X86_INS_VFNMSUBSS = 872; + UC_X86_INS_VFNMSUB213SS = 873; + UC_X86_INS_VFNMSUB132SS = 874; + UC_X86_INS_VFNMSUB231SS = 875; + UC_X86_INS_VFRCZPD = 876; + UC_X86_INS_VFRCZPS = 877; + UC_X86_INS_VFRCZSD = 878; + UC_X86_INS_VFRCZSS = 879; + UC_X86_INS_VORPD = 880; + UC_X86_INS_VORPS = 881; + UC_X86_INS_VXORPD = 882; + UC_X86_INS_VXORPS = 883; + UC_X86_INS_VGATHERDPD = 884; + UC_X86_INS_VGATHERDPS = 885; + UC_X86_INS_VGATHERPF0DPD = 886; + UC_X86_INS_VGATHERPF0DPS = 887; + UC_X86_INS_VGATHERPF0QPD = 888; + UC_X86_INS_VGATHERPF0QPS = 889; + UC_X86_INS_VGATHERPF1DPD = 890; + UC_X86_INS_VGATHERPF1DPS = 891; + UC_X86_INS_VGATHERPF1QPD = 892; + UC_X86_INS_VGATHERPF1QPS = 893; + UC_X86_INS_VGATHERQPD = 894; + UC_X86_INS_VGATHERQPS = 895; + UC_X86_INS_VHADDPD = 896; + UC_X86_INS_VHADDPS = 897; + UC_X86_INS_VHSUBPD = 898; + UC_X86_INS_VHSUBPS = 899; + UC_X86_INS_VINSERTF128 = 900; + UC_X86_INS_VINSERTF32X4 = 901; + UC_X86_INS_VINSERTF32X8 = 902; + UC_X86_INS_VINSERTF64X2 = 903; + UC_X86_INS_VINSERTF64X4 = 904; + UC_X86_INS_VINSERTI128 = 905; + UC_X86_INS_VINSERTI32X4 = 906; + UC_X86_INS_VINSERTI32X8 = 907; + UC_X86_INS_VINSERTI64X2 = 908; + UC_X86_INS_VINSERTI64X4 = 909; + UC_X86_INS_VINSERTPS = 910; + UC_X86_INS_VLDDQU = 911; + UC_X86_INS_VLDMXCSR = 912; + UC_X86_INS_VMASKMOVDQU = 913; + UC_X86_INS_VMASKMOVPD = 914; + UC_X86_INS_VMASKMOVPS = 915; + UC_X86_INS_VMAXPD = 916; + UC_X86_INS_VMAXPS = 917; + UC_X86_INS_VMAXSD = 918; + UC_X86_INS_VMAXSS = 919; + UC_X86_INS_VMCALL = 920; + UC_X86_INS_VMCLEAR = 921; + UC_X86_INS_VMFUNC = 922; + UC_X86_INS_VMINPD = 923; + UC_X86_INS_VMINPS = 924; + UC_X86_INS_VMINSD = 925; + UC_X86_INS_VMINSS = 926; + UC_X86_INS_VMLAUNCH = 927; + UC_X86_INS_VMLOAD = 928; + UC_X86_INS_VMMCALL = 929; + UC_X86_INS_VMOVQ = 930; + UC_X86_INS_VMOVDDUP = 931; + UC_X86_INS_VMOVD = 932; + UC_X86_INS_VMOVDQA32 = 933; + UC_X86_INS_VMOVDQA64 = 934; + UC_X86_INS_VMOVDQA = 935; + UC_X86_INS_VMOVDQU16 = 936; + UC_X86_INS_VMOVDQU32 = 937; + UC_X86_INS_VMOVDQU64 = 938; + UC_X86_INS_VMOVDQU8 = 939; + UC_X86_INS_VMOVDQU = 940; + UC_X86_INS_VMOVHLPS = 941; + UC_X86_INS_VMOVHPD = 942; + UC_X86_INS_VMOVHPS = 943; + UC_X86_INS_VMOVLHPS = 944; + UC_X86_INS_VMOVLPD = 945; + UC_X86_INS_VMOVLPS = 946; + UC_X86_INS_VMOVMSKPD = 947; + UC_X86_INS_VMOVMSKPS = 948; + UC_X86_INS_VMOVNTDQA = 949; + UC_X86_INS_VMOVNTDQ = 950; + UC_X86_INS_VMOVNTPD = 951; + UC_X86_INS_VMOVNTPS = 952; + UC_X86_INS_VMOVSD = 953; + UC_X86_INS_VMOVSHDUP = 954; + UC_X86_INS_VMOVSLDUP = 955; + UC_X86_INS_VMOVSS = 956; + UC_X86_INS_VMOVUPD = 957; + UC_X86_INS_VMOVUPS = 958; + UC_X86_INS_VMPSADBW = 959; + UC_X86_INS_VMPTRLD = 960; + UC_X86_INS_VMPTRST = 961; + UC_X86_INS_VMREAD = 962; + UC_X86_INS_VMRESUME = 963; + UC_X86_INS_VMRUN = 964; + UC_X86_INS_VMSAVE = 965; + UC_X86_INS_VMULPD = 966; + UC_X86_INS_VMULPS = 967; + UC_X86_INS_VMULSD = 968; + UC_X86_INS_VMULSS = 969; + UC_X86_INS_VMWRITE = 970; + UC_X86_INS_VMXOFF = 971; + UC_X86_INS_VMXON = 972; + UC_X86_INS_VPABSB = 973; + UC_X86_INS_VPABSD = 974; + UC_X86_INS_VPABSQ = 975; + UC_X86_INS_VPABSW = 976; + UC_X86_INS_VPACKSSDW = 977; + UC_X86_INS_VPACKSSWB = 978; + UC_X86_INS_VPACKUSDW = 979; + UC_X86_INS_VPACKUSWB = 980; + UC_X86_INS_VPADDB = 981; + UC_X86_INS_VPADDD = 982; + UC_X86_INS_VPADDQ = 983; + UC_X86_INS_VPADDSB = 984; + UC_X86_INS_VPADDSW = 985; + UC_X86_INS_VPADDUSB = 986; + UC_X86_INS_VPADDUSW = 987; + UC_X86_INS_VPADDW = 988; + UC_X86_INS_VPALIGNR = 989; + UC_X86_INS_VPANDD = 990; + UC_X86_INS_VPANDND = 991; + UC_X86_INS_VPANDNQ = 992; + UC_X86_INS_VPANDN = 993; + UC_X86_INS_VPANDQ = 994; + UC_X86_INS_VPAND = 995; + UC_X86_INS_VPAVGB = 996; + UC_X86_INS_VPAVGW = 997; + UC_X86_INS_VPBLENDD = 998; + UC_X86_INS_VPBLENDMB = 999; + UC_X86_INS_VPBLENDMD = 1000; + UC_X86_INS_VPBLENDMQ = 1001; + UC_X86_INS_VPBLENDMW = 1002; + UC_X86_INS_VPBLENDVB = 1003; + UC_X86_INS_VPBLENDW = 1004; + UC_X86_INS_VPBROADCASTB = 1005; + UC_X86_INS_VPBROADCASTD = 1006; + UC_X86_INS_VPBROADCASTMB2Q = 1007; + UC_X86_INS_VPBROADCASTMW2D = 1008; + UC_X86_INS_VPBROADCASTQ = 1009; + UC_X86_INS_VPBROADCASTW = 1010; + UC_X86_INS_VPCLMULQDQ = 1011; + UC_X86_INS_VPCMOV = 1012; + UC_X86_INS_VPCMPB = 1013; + UC_X86_INS_VPCMPD = 1014; + UC_X86_INS_VPCMPEQB = 1015; + UC_X86_INS_VPCMPEQD = 1016; + UC_X86_INS_VPCMPEQQ = 1017; + UC_X86_INS_VPCMPEQW = 1018; + UC_X86_INS_VPCMPESTRI = 1019; + UC_X86_INS_VPCMPESTRM = 1020; + UC_X86_INS_VPCMPGTB = 1021; + UC_X86_INS_VPCMPGTD = 1022; + UC_X86_INS_VPCMPGTQ = 1023; + UC_X86_INS_VPCMPGTW = 1024; + UC_X86_INS_VPCMPISTRI = 1025; + UC_X86_INS_VPCMPISTRM = 1026; + UC_X86_INS_VPCMPQ = 1027; + UC_X86_INS_VPCMPUB = 1028; + UC_X86_INS_VPCMPUD = 1029; + UC_X86_INS_VPCMPUQ = 1030; + UC_X86_INS_VPCMPUW = 1031; + UC_X86_INS_VPCMPW = 1032; + UC_X86_INS_VPCOMB = 1033; + UC_X86_INS_VPCOMD = 1034; + UC_X86_INS_VPCOMPRESSD = 1035; + UC_X86_INS_VPCOMPRESSQ = 1036; + UC_X86_INS_VPCOMQ = 1037; + UC_X86_INS_VPCOMUB = 1038; + UC_X86_INS_VPCOMUD = 1039; + UC_X86_INS_VPCOMUQ = 1040; + UC_X86_INS_VPCOMUW = 1041; + UC_X86_INS_VPCOMW = 1042; + UC_X86_INS_VPCONFLICTD = 1043; + UC_X86_INS_VPCONFLICTQ = 1044; + UC_X86_INS_VPERM2F128 = 1045; + UC_X86_INS_VPERM2I128 = 1046; + UC_X86_INS_VPERMD = 1047; + UC_X86_INS_VPERMI2D = 1048; + UC_X86_INS_VPERMI2PD = 1049; + UC_X86_INS_VPERMI2PS = 1050; + UC_X86_INS_VPERMI2Q = 1051; + UC_X86_INS_VPERMIL2PD = 1052; + UC_X86_INS_VPERMIL2PS = 1053; + UC_X86_INS_VPERMILPD = 1054; + UC_X86_INS_VPERMILPS = 1055; + UC_X86_INS_VPERMPD = 1056; + UC_X86_INS_VPERMPS = 1057; + UC_X86_INS_VPERMQ = 1058; + UC_X86_INS_VPERMT2D = 1059; + UC_X86_INS_VPERMT2PD = 1060; + UC_X86_INS_VPERMT2PS = 1061; + UC_X86_INS_VPERMT2Q = 1062; + UC_X86_INS_VPEXPANDD = 1063; + UC_X86_INS_VPEXPANDQ = 1064; + UC_X86_INS_VPEXTRB = 1065; + UC_X86_INS_VPEXTRD = 1066; + UC_X86_INS_VPEXTRQ = 1067; + UC_X86_INS_VPEXTRW = 1068; + UC_X86_INS_VPGATHERDD = 1069; + UC_X86_INS_VPGATHERDQ = 1070; + UC_X86_INS_VPGATHERQD = 1071; + UC_X86_INS_VPGATHERQQ = 1072; + UC_X86_INS_VPHADDBD = 1073; + UC_X86_INS_VPHADDBQ = 1074; + UC_X86_INS_VPHADDBW = 1075; + UC_X86_INS_VPHADDDQ = 1076; + UC_X86_INS_VPHADDD = 1077; + UC_X86_INS_VPHADDSW = 1078; + UC_X86_INS_VPHADDUBD = 1079; + UC_X86_INS_VPHADDUBQ = 1080; + UC_X86_INS_VPHADDUBW = 1081; + UC_X86_INS_VPHADDUDQ = 1082; + UC_X86_INS_VPHADDUWD = 1083; + UC_X86_INS_VPHADDUWQ = 1084; + UC_X86_INS_VPHADDWD = 1085; + UC_X86_INS_VPHADDWQ = 1086; + UC_X86_INS_VPHADDW = 1087; + UC_X86_INS_VPHMINPOSUW = 1088; + UC_X86_INS_VPHSUBBW = 1089; + UC_X86_INS_VPHSUBDQ = 1090; + UC_X86_INS_VPHSUBD = 1091; + UC_X86_INS_VPHSUBSW = 1092; + UC_X86_INS_VPHSUBWD = 1093; + UC_X86_INS_VPHSUBW = 1094; + UC_X86_INS_VPINSRB = 1095; + UC_X86_INS_VPINSRD = 1096; + UC_X86_INS_VPINSRQ = 1097; + UC_X86_INS_VPINSRW = 1098; + UC_X86_INS_VPLZCNTD = 1099; + UC_X86_INS_VPLZCNTQ = 1100; + UC_X86_INS_VPMACSDD = 1101; + UC_X86_INS_VPMACSDQH = 1102; + UC_X86_INS_VPMACSDQL = 1103; + UC_X86_INS_VPMACSSDD = 1104; + UC_X86_INS_VPMACSSDQH = 1105; + UC_X86_INS_VPMACSSDQL = 1106; + UC_X86_INS_VPMACSSWD = 1107; + UC_X86_INS_VPMACSSWW = 1108; + UC_X86_INS_VPMACSWD = 1109; + UC_X86_INS_VPMACSWW = 1110; + UC_X86_INS_VPMADCSSWD = 1111; + UC_X86_INS_VPMADCSWD = 1112; + UC_X86_INS_VPMADDUBSW = 1113; + UC_X86_INS_VPMADDWD = 1114; + UC_X86_INS_VPMASKMOVD = 1115; + UC_X86_INS_VPMASKMOVQ = 1116; + UC_X86_INS_VPMAXSB = 1117; + UC_X86_INS_VPMAXSD = 1118; + UC_X86_INS_VPMAXSQ = 1119; + UC_X86_INS_VPMAXSW = 1120; + UC_X86_INS_VPMAXUB = 1121; + UC_X86_INS_VPMAXUD = 1122; + UC_X86_INS_VPMAXUQ = 1123; + UC_X86_INS_VPMAXUW = 1124; + UC_X86_INS_VPMINSB = 1125; + UC_X86_INS_VPMINSD = 1126; + UC_X86_INS_VPMINSQ = 1127; + UC_X86_INS_VPMINSW = 1128; + UC_X86_INS_VPMINUB = 1129; + UC_X86_INS_VPMINUD = 1130; + UC_X86_INS_VPMINUQ = 1131; + UC_X86_INS_VPMINUW = 1132; + UC_X86_INS_VPMOVDB = 1133; + UC_X86_INS_VPMOVDW = 1134; + UC_X86_INS_VPMOVM2B = 1135; + UC_X86_INS_VPMOVM2D = 1136; + UC_X86_INS_VPMOVM2Q = 1137; + UC_X86_INS_VPMOVM2W = 1138; + UC_X86_INS_VPMOVMSKB = 1139; + UC_X86_INS_VPMOVQB = 1140; + UC_X86_INS_VPMOVQD = 1141; + UC_X86_INS_VPMOVQW = 1142; + UC_X86_INS_VPMOVSDB = 1143; + UC_X86_INS_VPMOVSDW = 1144; + UC_X86_INS_VPMOVSQB = 1145; + UC_X86_INS_VPMOVSQD = 1146; + UC_X86_INS_VPMOVSQW = 1147; + UC_X86_INS_VPMOVSXBD = 1148; + UC_X86_INS_VPMOVSXBQ = 1149; + UC_X86_INS_VPMOVSXBW = 1150; + UC_X86_INS_VPMOVSXDQ = 1151; + UC_X86_INS_VPMOVSXWD = 1152; + UC_X86_INS_VPMOVSXWQ = 1153; + UC_X86_INS_VPMOVUSDB = 1154; + UC_X86_INS_VPMOVUSDW = 1155; + UC_X86_INS_VPMOVUSQB = 1156; + UC_X86_INS_VPMOVUSQD = 1157; + UC_X86_INS_VPMOVUSQW = 1158; + UC_X86_INS_VPMOVZXBD = 1159; + UC_X86_INS_VPMOVZXBQ = 1160; + UC_X86_INS_VPMOVZXBW = 1161; + UC_X86_INS_VPMOVZXDQ = 1162; + UC_X86_INS_VPMOVZXWD = 1163; + UC_X86_INS_VPMOVZXWQ = 1164; + UC_X86_INS_VPMULDQ = 1165; + UC_X86_INS_VPMULHRSW = 1166; + UC_X86_INS_VPMULHUW = 1167; + UC_X86_INS_VPMULHW = 1168; + UC_X86_INS_VPMULLD = 1169; + UC_X86_INS_VPMULLQ = 1170; + UC_X86_INS_VPMULLW = 1171; + UC_X86_INS_VPMULUDQ = 1172; + UC_X86_INS_VPORD = 1173; + UC_X86_INS_VPORQ = 1174; + UC_X86_INS_VPOR = 1175; + UC_X86_INS_VPPERM = 1176; + UC_X86_INS_VPROTB = 1177; + UC_X86_INS_VPROTD = 1178; + UC_X86_INS_VPROTQ = 1179; + UC_X86_INS_VPROTW = 1180; + UC_X86_INS_VPSADBW = 1181; + UC_X86_INS_VPSCATTERDD = 1182; + UC_X86_INS_VPSCATTERDQ = 1183; + UC_X86_INS_VPSCATTERQD = 1184; + UC_X86_INS_VPSCATTERQQ = 1185; + UC_X86_INS_VPSHAB = 1186; + UC_X86_INS_VPSHAD = 1187; + UC_X86_INS_VPSHAQ = 1188; + UC_X86_INS_VPSHAW = 1189; + UC_X86_INS_VPSHLB = 1190; + UC_X86_INS_VPSHLD = 1191; + UC_X86_INS_VPSHLQ = 1192; + UC_X86_INS_VPSHLW = 1193; + UC_X86_INS_VPSHUFB = 1194; + UC_X86_INS_VPSHUFD = 1195; + UC_X86_INS_VPSHUFHW = 1196; + UC_X86_INS_VPSHUFLW = 1197; + UC_X86_INS_VPSIGNB = 1198; + UC_X86_INS_VPSIGND = 1199; + UC_X86_INS_VPSIGNW = 1200; + UC_X86_INS_VPSLLDQ = 1201; + UC_X86_INS_VPSLLD = 1202; + UC_X86_INS_VPSLLQ = 1203; + UC_X86_INS_VPSLLVD = 1204; + UC_X86_INS_VPSLLVQ = 1205; + UC_X86_INS_VPSLLW = 1206; + UC_X86_INS_VPSRAD = 1207; + UC_X86_INS_VPSRAQ = 1208; + UC_X86_INS_VPSRAVD = 1209; + UC_X86_INS_VPSRAVQ = 1210; + UC_X86_INS_VPSRAW = 1211; + UC_X86_INS_VPSRLDQ = 1212; + UC_X86_INS_VPSRLD = 1213; + UC_X86_INS_VPSRLQ = 1214; + UC_X86_INS_VPSRLVD = 1215; + UC_X86_INS_VPSRLVQ = 1216; + UC_X86_INS_VPSRLW = 1217; + UC_X86_INS_VPSUBB = 1218; + UC_X86_INS_VPSUBD = 1219; + UC_X86_INS_VPSUBQ = 1220; + UC_X86_INS_VPSUBSB = 1221; + UC_X86_INS_VPSUBSW = 1222; + UC_X86_INS_VPSUBUSB = 1223; + UC_X86_INS_VPSUBUSW = 1224; + UC_X86_INS_VPSUBW = 1225; + UC_X86_INS_VPTESTMD = 1226; + UC_X86_INS_VPTESTMQ = 1227; + UC_X86_INS_VPTESTNMD = 1228; + UC_X86_INS_VPTESTNMQ = 1229; + UC_X86_INS_VPTEST = 1230; + UC_X86_INS_VPUNPCKHBW = 1231; + UC_X86_INS_VPUNPCKHDQ = 1232; + UC_X86_INS_VPUNPCKHQDQ = 1233; + UC_X86_INS_VPUNPCKHWD = 1234; + UC_X86_INS_VPUNPCKLBW = 1235; + UC_X86_INS_VPUNPCKLDQ = 1236; + UC_X86_INS_VPUNPCKLQDQ = 1237; + UC_X86_INS_VPUNPCKLWD = 1238; + UC_X86_INS_VPXORD = 1239; + UC_X86_INS_VPXORQ = 1240; + UC_X86_INS_VPXOR = 1241; + UC_X86_INS_VRCP14PD = 1242; + UC_X86_INS_VRCP14PS = 1243; + UC_X86_INS_VRCP14SD = 1244; + UC_X86_INS_VRCP14SS = 1245; + UC_X86_INS_VRCP28PD = 1246; + UC_X86_INS_VRCP28PS = 1247; + UC_X86_INS_VRCP28SD = 1248; + UC_X86_INS_VRCP28SS = 1249; + UC_X86_INS_VRCPPS = 1250; + UC_X86_INS_VRCPSS = 1251; + UC_X86_INS_VRNDSCALEPD = 1252; + UC_X86_INS_VRNDSCALEPS = 1253; + UC_X86_INS_VRNDSCALESD = 1254; + UC_X86_INS_VRNDSCALESS = 1255; + UC_X86_INS_VROUNDPD = 1256; + UC_X86_INS_VROUNDPS = 1257; + UC_X86_INS_VROUNDSD = 1258; + UC_X86_INS_VROUNDSS = 1259; + UC_X86_INS_VRSQRT14PD = 1260; + UC_X86_INS_VRSQRT14PS = 1261; + UC_X86_INS_VRSQRT14SD = 1262; + UC_X86_INS_VRSQRT14SS = 1263; + UC_X86_INS_VRSQRT28PD = 1264; + UC_X86_INS_VRSQRT28PS = 1265; + UC_X86_INS_VRSQRT28SD = 1266; + UC_X86_INS_VRSQRT28SS = 1267; + UC_X86_INS_VRSQRTPS = 1268; + UC_X86_INS_VRSQRTSS = 1269; + UC_X86_INS_VSCATTERDPD = 1270; + UC_X86_INS_VSCATTERDPS = 1271; + UC_X86_INS_VSCATTERPF0DPD = 1272; + UC_X86_INS_VSCATTERPF0DPS = 1273; + UC_X86_INS_VSCATTERPF0QPD = 1274; + UC_X86_INS_VSCATTERPF0QPS = 1275; + UC_X86_INS_VSCATTERPF1DPD = 1276; + UC_X86_INS_VSCATTERPF1DPS = 1277; + UC_X86_INS_VSCATTERPF1QPD = 1278; + UC_X86_INS_VSCATTERPF1QPS = 1279; + UC_X86_INS_VSCATTERQPD = 1280; + UC_X86_INS_VSCATTERQPS = 1281; + UC_X86_INS_VSHUFPD = 1282; + UC_X86_INS_VSHUFPS = 1283; + UC_X86_INS_VSQRTPD = 1284; + UC_X86_INS_VSQRTPS = 1285; + UC_X86_INS_VSQRTSD = 1286; + UC_X86_INS_VSQRTSS = 1287; + UC_X86_INS_VSTMXCSR = 1288; + UC_X86_INS_VSUBPD = 1289; + UC_X86_INS_VSUBPS = 1290; + UC_X86_INS_VSUBSD = 1291; + UC_X86_INS_VSUBSS = 1292; + UC_X86_INS_VTESTPD = 1293; + UC_X86_INS_VTESTPS = 1294; + UC_X86_INS_VUNPCKHPD = 1295; + UC_X86_INS_VUNPCKHPS = 1296; + UC_X86_INS_VUNPCKLPD = 1297; + UC_X86_INS_VUNPCKLPS = 1298; + UC_X86_INS_VZEROALL = 1299; + UC_X86_INS_VZEROUPPER = 1300; + UC_X86_INS_WAIT = 1301; + UC_X86_INS_WBINVD = 1302; + UC_X86_INS_WRFSBASE = 1303; + UC_X86_INS_WRGSBASE = 1304; + UC_X86_INS_WRMSR = 1305; + UC_X86_INS_XABORT = 1306; + UC_X86_INS_XACQUIRE = 1307; + UC_X86_INS_XBEGIN = 1308; + UC_X86_INS_XCHG = 1309; + UC_X86_INS_XCRYPTCBC = 1310; + UC_X86_INS_XCRYPTCFB = 1311; + UC_X86_INS_XCRYPTCTR = 1312; + UC_X86_INS_XCRYPTECB = 1313; + UC_X86_INS_XCRYPTOFB = 1314; + UC_X86_INS_XEND = 1315; + UC_X86_INS_XGETBV = 1316; + UC_X86_INS_XLATB = 1317; + UC_X86_INS_XRELEASE = 1318; + UC_X86_INS_XRSTOR = 1319; + UC_X86_INS_XRSTOR64 = 1320; + UC_X86_INS_XRSTORS = 1321; + UC_X86_INS_XRSTORS64 = 1322; + UC_X86_INS_XSAVE = 1323; + UC_X86_INS_XSAVE64 = 1324; + UC_X86_INS_XSAVEC = 1325; + UC_X86_INS_XSAVEC64 = 1326; + UC_X86_INS_XSAVEOPT = 1327; + UC_X86_INS_XSAVEOPT64 = 1328; + UC_X86_INS_XSAVES = 1329; + UC_X86_INS_XSAVES64 = 1330; + UC_X86_INS_XSETBV = 1331; + UC_X86_INS_XSHA1 = 1332; + UC_X86_INS_XSHA256 = 1333; + UC_X86_INS_XSTORE = 1334; + UC_X86_INS_XTEST = 1335; + UC_X86_INS_FDISI8087_NOP = 1336; + UC_X86_INS_FENI8087_NOP = 1337; + UC_X86_INS_ENDING = 1338; + +implementation +end. \ No newline at end of file