cleanup

bindings/rust/src/lib.rs

@@ -308,7 +308,7 @@ impl<'a, D> Unicorn<'a, D> {
     /// Write variable sized values into registers.
     ///
     /// The user has to make sure that the buffer length matches the register size.
-    /// This adds support for registers >64 bit (GDTR/IDTR, XMM, YMM, ZMM, ST (x86); Q, V (arm64)).
+    /// This adds support for registers >64 bit (GDTR/IDTR, XMM, YMM, ZMM (x86); Q, V (arm64)).
     pub fn reg_write_long<T: Into<i32>>(&self, regid: T, value: &[u8]) -> Result<(), uc_error> {
         let err = unsafe { ffi::uc_reg_write(self.inner().uc, regid.into(), value.as_ptr() as _) };
         if err == uc_error::OK {
@@ -334,7 +334,7 @@ impl<'a, D> Unicorn<'a, D> {
 
     /// Read 128, 256 or 512 bit register value into heap allocated byte array.
     ///
-    /// This adds safe support for registers >64 bit (GDTR/IDTR, XMM, YMM, ZMM (x86); Q, V (arm64)).
+    /// This adds safe support for registers >64 bit (GDTR/IDTR, XMM, YMM, ZMM, ST (x86); Q, V (arm64)).
     pub fn reg_read_long<T: Into<i32>>(&self, regid: T) -> Result<Box<[u8]>, uc_error> {
         let err: uc_error;
         let boxed: Box<[u8]>;

bindings/rust/src/sparc.rs

@@ -92,6 +92,15 @@ pub enum RegisterSPARC {
     Y = 86,
     XCC = 87,
     PC = 88,
+    ENDING = 89,
+}
+
+impl RegisterSPARC {
+    // alias registers
+    // (assoc) O6 = 84,
+    // (assoc) I6 = 67,
+    pub const O6: RegisterSPARC = RegisterSPARC::SP;
+    pub const I6: RegisterSPARC = RegisterSPARC::FP;
 }
 
 impl From<RegisterSPARC> for i32 {

include/uc_priv.h

@@ -342,7 +342,6 @@ struct uc_struct {
     bool no_exit_request;       // Disable check_exit_request temporarily. A
                           // workaround to treat the IT block as a whole block.
     bool init_done; // Whether the initialization is done.
-    void *data_ptr; // optional data pointer for bindings
 };
 
 // Metadata stub for the variable-size cpu context used with uc_context_*()