diff --git a/qemu/target-i386/translate.c b/qemu/target-i386/translate.c
index 2e7a822e..f644b4fa 100644
--- a/qemu/target-i386/translate.c
+++ b/qemu/target-i386/translate.c
@@ -4155,8 +4155,10 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
                     break;
 #ifdef TARGET_X86_64
                 case MO_64:
-                    tcg_gen_mulu2_i64(tcg_ctx, *cpu_regs[s->vex_v], *cpu_regs[reg],
-                                      *cpu_T[0], *cpu_regs[R_EDX]);
+                    tcg_gen_mulu2_i64(tcg_ctx, *cpu_T[0], *cpu_T[1],
+                                       *cpu_T[0], *cpu_regs[R_EDX]);
+                    tcg_gen_mov_i64(tcg_ctx, *cpu_regs[s->vex_v], *cpu_T[0]);
+                    tcg_gen_mov_i64(tcg_ctx, *cpu_regs[reg], *cpu_T[1]);
                     break;
 #endif
                 }
diff --git a/qemu/tcg/tcg.c b/qemu/tcg/tcg.c
index 381fde94..abdcb9e4 100644
--- a/qemu/tcg/tcg.c
+++ b/qemu/tcg/tcg.c
@@ -2053,6 +2053,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
             ts->mem_coherent = 1;
         } else if (ts->val_type == TEMP_VAL_CONST) {
             tcg_out_movi(s, itype, ts->reg, ts->val);
+            ts->mem_coherent = 0;
         }
         s->reg_to_temp[ts->reg] = args[1];
         ts->val_type = TEMP_VAL_REG;