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Update riscv pc and fix #1465

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mio 2021-10-19 23:22:13 +02:00
parent 30f0e24407
commit 567bd08b86
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1 changed files with 2 additions and 0 deletions
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qemu/target/riscv/translate.c
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@ -899,6 +899,7 @@ static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
static void riscv_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) static void riscv_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
{ {
DisasContext *ctx = container_of(dcbase, DisasContext, base); DisasContext *ctx = container_of(dcbase, DisasContext, base);
TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
switch (ctx->base.is_jmp) { switch (ctx->base.is_jmp) {
case DISAS_TOO_MANY: case DISAS_TOO_MANY:
@ -907,6 +908,7 @@ static void riscv_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
case DISAS_NORETURN: case DISAS_NORETURN:
break; break;
case DISAS_UC_EXIT: case DISAS_UC_EXIT:
tcg_gen_movi_tl(tcg_ctx, tcg_ctx->cpu_pc, ctx->base.pc_next);
gen_helper_uc_riscv_exit(ctx->uc->tcg_ctx, ctx->uc->tcg_ctx->cpu_env); gen_helper_uc_riscv_exit(ctx->uc->tcg_ctx, ctx->uc->tcg_ctx->cpu_env);
break; break;
default: default: