From 4eca426fb6bb67d3fc76e07803390ec69b4707d1 Mon Sep 17 00:00:00 2001 From: bunnei Date: Thu, 30 Mar 2017 22:21:45 -0400 Subject: [PATCH] unicorn_aarch64: Expose UC_ARM64_REG_NZCV register. (#791) --- qemu/target-arm/unicorn_aarch64.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/qemu/target-arm/unicorn_aarch64.c b/qemu/target-arm/unicorn_aarch64.c index 5b9980f1..9d94b64c 100644 --- a/qemu/target-arm/unicorn_aarch64.c +++ b/qemu/target-arm/unicorn_aarch64.c @@ -86,6 +86,9 @@ int arm64_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int co case UC_ARM64_REG_SP: *(int64_t *)value = ARM_CPU(uc, mycpu)->env.xregs[31]; break; + case UC_ARM64_REG_NZCV: + *(int32_t *)value = cpsr_read(&ARM_CPU(uc, mycpu)->env) & CPSR_NZCV; + break; } } } @@ -139,6 +142,9 @@ int arm64_reg_write(struct uc_struct *uc, unsigned int *regs, void* const* vals, case UC_ARM64_REG_SP: ARM_CPU(uc, mycpu)->env.xregs[31] = *(uint64_t *)value; break; + case UC_ARM64_REG_NZCV: + cpsr_write(&ARM_CPU(uc, mycpu)->env, *(uint32_t *) value, CPSR_NZCV); + break; } } }